JP3740896B2

JP3740896B2 - Loop current detection circuit

Info

Publication number: JP3740896B2
Application number: JP16466799A
Authority: JP
Inventors: 正博今村
Original assignee: NEC Corp
Current assignee: NEC Corp
Priority date: 1999-06-11
Filing date: 1999-06-11
Publication date: 2006-02-01
Anticipated expiration: 2019-06-11
Also published as: JP2000354262A

Description

【０００１】
【発明の属する技術分野】
本発明は、ループ電流検出回路に関し、特に、加入者回線を介して通信端末に直流電流を供給する電流供給回路におけるループ電流検出回路に関する。
【０００２】
【従来の技術】
２線式加入者回線を経由して直流電流を供給する通話電流供給回路に流れるループ電流の検出回路の従来の構成の一例を図４に示す。図４を参照すると、このループ電流検出回路は、給電抵抗の両端の電圧を差動増幅器で検出するものであり、ループ電流検出回路２２は、第１、第２の給電抵抗１、２の両端電圧をそれぞれ差動増幅する第１、第２の差動増幅回路１９、２０と、第１、第２の差動増幅器の出力を加算する加算回路２１と、加算回路２１と出力を基準電圧１３と比較する比較器１４と、を備えている。
【０００３】
第１の給電抵抗１の端子間電圧を第１の差動増幅回路１９で増幅し、加算回路２１に出力し、第２の給電抵抗２の端子間電圧を第２の差動増幅回路２０で増幅し、加算回路２１に出力する。加算回路２１は、第１、第２の差動増幅回路１９、２０の出力電圧を加算して比較器１４へ信号を送出する。比較器１４では、加算回路２１からの出力電圧を基準電圧１３と比較してループ電流を検出している。
【０００４】
なお、２線式加入者回線を経由して直流電流を供給する通話電流供給回路に流れるループ電流の検出回路として、例えば特開昭６１−１５２１５９号公報等の記載も参照される。
【０００５】
【発明が解決しようとする課題】
しかしながら、図４に示した構成は、給電抵抗の電圧を差動増幅器で検出しているために、回路規模が大きくなり、ＬＳＩのチップサイズも大きくなる、という問題点を有している。
【０００６】
また、抵抗値が大きく、且つ、相対精度が必要な抵抗が多数必要とされており、このためチップ面積巾で抵抗の占める面積が大きくなる、と問題点もある。
【０００７】
したがって、本発明は、上記問題点に鑑みてなされたものであって、その目的は、回路規模を縮減し、集積回路化に好適とされるループ電流検出回路を提供することにある。
【０００８】
また本発明の他の目的は、相対精度が必要な抵抗の本数を削減し、集積回路化に好適とされるループ電流検出回路を提供することにある。
【０００９】
【課題を解決するための手段】
前記目的を達成する本発明は、回線に接続され通信端末に電流を供給する第１給電抵抗と第２の給電抵抗の各端子間電圧を、それぞれ第１、第２の抵抗と、第３、第４の抵抗とを介して電流に変換し、前記第１、第３の抵抗に流れる電流の和電流を入力とする第１のカレントミラー回路と、前記第２、第４の抵抗に流れる電流の和電流を入力とする第２のカレントミラー回路と、を備え前記第１のカレントミラー回路の出力電流と前記第２のカレントミラー回路の出力電流の差電流を出力抵抗に供給し、前記出力抵抗の端子電圧を基準電圧と比較する比較器を備える。
【００１０】
【発明の実施の形態】
本発明の実施の形態について説明する。本発明のループ電流検出回路は、通信回線に電源を供給する給電抵抗の端子に接続した抵抗に流れる電流の差を２つ足し合わせてループ電流を検出するようにしたものである。
【００１１】
本発明において、ループ電流検出回路は、通信回線に電流を供給する第１、第２の給電抵抗１、２と、第１の給電抵抗１の両端にそれぞれ一端が接続された第１、第２の抵抗５、７と、第２の給電抵抗２の両端にそれぞれ一端が接続された第３、第４の抵抗６、８と、第１、第３の抵抗５、６の他端が共通接続されて入力端に接続され、第１、第３の抵抗５、６に流れる電流の和電流を入力とする第１のカレントミラー回路９と、第２、第４の抵抗７、８の他端が共通接続されて入力端に接続され、第２、第４の抵抗７、８に流れる電流の和電流を入力とする第２のカレントミラー回路１１と、入力端が第１のカレントミラー回路９の出力端に接続され、出力端が第２のカレントミラー回路１１の出力端に接続された第３のカレントミラー回路１０を備え、第２、第３のカレントミラー回路１０、１１の出力端の接続点を出力抵抗１２の一端に接続し、出力抵抗１２の端子電圧を基準電圧１３と比較する比較器１４を備えている。出力抵抗１２の他端は、ループ電流検出回路の地気側に接続されている。
【００１２】
第１の給電抵抗１、通信端末３、第２の給電抵抗２、電源４よりなるループに流れる電流は、給電抵抗１、２のそれぞれの端子間に電位差を作る。
【００１３】
通信端末３に接続される第１の給電抵抗１の両側の端子には、抵抗５と、抵抗７の一端がそれぞれ接続され、第１の給電抵抗１の端子間の電位差の分だけ異なる電流を流す。
【００１４】
同様にして、通信端末３に接続される第２の給電抵抗２の両側の端子には、抵抗６と、抵抗８の一端がそれぞれ接続され、第２の給電抵抗２の端子間の電位差の分だけ異なる電流を流す。
【００１５】
抵抗５と抵抗６に流れる電流を足し合わせた電流を、第１のカレントミラー回路９の入力とし、抵抗７と抵抗８を流れる電流を足し合わせた電流を第２のカレントミラー回路１１の入力とする。
【００１６】
第１のカレントミラー回路９の出力を入力とする第３のカレントミラー回路１０の出力を第２のカレントミラー回路１１の出力と接続し、差分の電流を、出力抵抗１２に流す。
【００１７】
この差電流による出力抵抗１２の端子電圧と基準電圧１３とを比較器１４で比較することで、ループ電流を検出する。
【００１８】
【実施例】
本発明の実施例について図面を参照して説明する。図１は、本発明の一実施例の構成を示す図である。図１を参照すると、本発明の一実施例をなすループ電流検出回路１５は、通信端末３に接続された給電抵抗１の両側端子に一端がそれぞれ接続された抵抗５と抵抗７と、通信端末３に接続された給電抵抗２の両側端子に一端がそれぞれ接続された抵抗６と抵抗８とを有している。給電抵抗１と抵抗５の接続点は、地気側に接続されている。
【００１９】
抵抗５と抵抗７の他端は、それぞれ第１のカレントミラー回路９の入力端と第２のカレントミラー回路１１の入力端に接続されている。
【００２０】
また、抵抗６と抵抗８の他端もそれぞれ第１のカレントミラー回路９の入力端と第２のカレントミラー回路１１入力端に接続されている。
【００２１】
第１のカレントミラー回路９の出力端からは、抵抗５と抵抗６を流れる電流を加算した電流が出力される。同様に第２のカレントミラー回路１１の出力端からは、抵抗７と抵抗８を流れる電流を加算した電流が出力される。
【００２２】
第３のカレントミラー回路１０は、入力端を第１のカレントミラー回路９の出力端に接続し、出力端を第２のカレントミラー回路１１の出力端に接続し、第３のカレントミラー回路１０の出力端と第２のカレントミラー回路１１の出力端には、第２のカレントミラー回路１１の出力電流から第１のカレントミラー回路９の出力電流を差し引いた差電流が出力される。第２のカレントミラー回路１１の出力と第１のカレントミラー回路９の出力の差電流は、出力抵抗１２に流れ、電圧に変換される。
【００２３】
出力抵抗１２の端子間電圧と基準電圧１３とを比較器１４で比較して、ループ電流を検出する。
【００２４】
図２は、本発明の一実施例におけるカレントミラー回路の構成を示す図であり、公知の構成が用いられる。すなわち入力側のトランジスタ３０と出力側トランジスタ３１のベースを共通接続し、入力側のトランジスタ３０のベースとコレクタを接続して構成される。なお、第１、第２のカレントミラー回路９、１１は、トランジスタのエミッタが電源１６の高電位側に接続され、第３のカレントミラー回路１０は、トランジスタのエミッタが電源１６の低電位側に接続される。
【００２５】
本発明の一実施例の動作について説明する。通常、通信端末３を起動（発呼）した場合、端末内の直流抵抗は小さくなり、給電抵抗１、２を通して電流が流れる。この時、給電抵抗１、２の端子間には電位差が生じる。
【００２６】
電源１６から給電抵抗１、２の各端子までの電圧を、抵抗５、６、７、８によって電流に変換している。抵抗５、６、７、８の抵抗値は同一にする。
【００２７】
抵抗５と抵抗６に流れる電流は第１のカレントミラー回路９に入力される。同様に、抵抗７と抵抗８を流れる電流は第２のカレントミラー回路１１に入力される。入力を第１のカレントミラー回路９の出力に接続し、出力を第２のカレントミラー回路１１の出力に接続した第３のカレントミラー回路１０は、その出力から、第１のカレントミラー回路９の出力電流を折り返した電流をミラー電流として出力し、第２のカレントミラー回路１１の出力と第３のカレントミラー回路１０の出力の接続点からは、第１のカレントミラー回路９の出力電流分を第２のカレントミラー回路１１の出力電流から引き抜いた（差し引いた）電流が出力される。第２のカレントミラー回路１１の出力電流と第１のカレントミラー回路９の出力電流の差電流Ｉoutは、出力抵抗１２に流れ、出力抵抗１２で電圧に変換される。
【００２８】
この差電流Ｉoutは、次式（１）で示される電流となる。すなわち、Ｖ16を電源１６の電圧、ＶAを電池側の給電抵抗２（抵抗値ＲA）の回線側端子電圧、ＶBを地気側の給電抵抗１（抵抗値ＲB）の回線側端子電圧、Ｖ4を電源４の電圧、Ｒを抵抗５、６、７、８の抵抗値とし、ＶRB、ＶRAをそれぞれ給電抵抗１、２の端子間電圧、ＩLをループ電流とすると、抵抗５に流れる電流Ｉ1＝（Ｖ16−ＶBE）／Ｒ5（但し、ＶBEはカレントミラー回路のトランジスタのベース・エミッタ間電圧）、抵抗６に流れる電流Ｉ3＝(Ｖ16-ＶBE−ＶA)／Ｒ6、抵抗７に流れる電流Ｉ2＝(Ｖ16-ＶBE−ＶB)／Ｒ7、抵抗８に流れる電流Ｉ4＝(Ｖ16-ＶBE−Ｖ4)／Ｒ8となり、第１のカレントミラー回路９の入力には、和電流Ｉ1＋Ｉ3が入力され、第２のカレントミラー回路１１の入力には和電流Ｉ2＋Ｉ4が入力され、（Ｉ2＋Ｉ4）−（Ｉ1＋Ｉ3）から次式（１）が導出される。
【００２９】

【００３０】
比較器１４は、基準電圧１３と出力抵抗１２の電圧を比較し、ループ電流を検出する。
【００３１】
本発明の一実施例によれば、給電抵抗に流れる電流の差を足し合わせてループ電流を検出しているため、回線に交流雑音等があり、電源４の電圧範囲を超えた場合でもループ電流を検出することができる。
【００３２】
本発明の第２の実施例について説明する。図３は、本発明の第２の実施例の構成を示す図である。図３を参照すると、本発明の第２の実施例においては、図１に示した構成に加えて、比較器１４に入力される基準電圧１３に、電圧切替制御回路１８を備えたものである。
【００３３】
この電圧切替回路１８に、上位装置から制御信号を供給することで、比較器１４に供給する基準電圧１３の電圧値を変化させることで、ループ電流検出用の閾値を複数持たせている。
【００３４】
更に、出力抵抗１２の電圧を入力とするミラー比制御回路１７を追加し、第１、及び第２のカレントミラー回路９、１１、又はいずれか一方におけるミラー比を変化させることで、検出電流の範囲を広くすることができる。カレントミラー回路の入力電流値と出力電流値の比であるミラー比を１：１から１：Ｎとする場合、通常、図２に示したカレントミラー回路の出力側トランジスタ３１としてそのエミッタ面積が入力側トランジスタ３０のエミッタ面積のＮ倍のものが用いられるが、ミラー比を可変に制御するには、例えば図２に示したカレントミラー回路の出力側トランジスタとして、ベースを入力側トランジスタとベースと共通接続した同一エミッタ面積の出力側トランジスタを複数備え、各トランジスタのエミッタと電源間にスイッチを備え、ミラー比に応じてスイッチをオン・オフ制御して１又は複数の出力側トランジスタをアクティブとし、選択された出力側トランジスタのコレクタの出力電流の和電流を出力とすることで構成される。
【００３５】
【発明の効果】
以上説明したように、本発明によれば、オペアンプを使わずにループ電流検出回路を構成することができるため、回路規模を縮減することが出来る、という効果を奏する。
【００３６】
また本発明によれば、相対精度の必要な抵抗値の大きい抵抗の個数が少なく、集積回路化に有効である。
【００３７】
また、本発明によれば、回線に交流誘導等があり、電源の電圧範囲を超えた場合でもループ電流を検出することができる。
【図面の簡単な説明】
【図１】本発明の一実施例の構成を示す図である。
【図２】本発明の一実施例におけるカレントミラー回路の構成を示す図である。
【図３】本発明の別の実施例の構成を示す図である。
【図４】従来のループ電流検出回路の構成を示す図である。
【符号の説明】
１、２給電抵抗
３通信端末
４電源
５、６、７、８抵抗
９、１０、１１カレントミラー回路
１２出力抵抗
１３基準電圧
１６電源
１７ミラー比制御回路
１８電圧切替制御回路
１９、２０差動増幅回路[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a loop current detection circuit, and more particularly to a loop current detection circuit in a current supply circuit that supplies a direct current to a communication terminal via a subscriber line.
[0002]
[Prior art]
FIG. 4 shows an example of a conventional configuration of a loop current detection circuit that flows in a call current supply circuit that supplies a direct current via a two-wire subscriber line. Referring to FIG. 4, this loop current detection circuit detects a voltage across the power supply resistor with a differential amplifier, and the loop current detection circuit 22 includes both ends of the first and second

power supply resistors

1 and 2. First and second differential amplifier circuits 19 and 20 for differentially amplifying the voltages, an adder circuit 21 for adding the outputs of the first and second differential amplifiers, an adder circuit 21 and the output of reference voltage 13 And a comparator 14 for comparison.
[0003]
The voltage between the terminals of the first feed resistor 1 is amplified by the first differential amplifier circuit 19 and output to the adder circuit 21, and the voltage between the terminals of the second feed resistor 2 is amplified by the second differential amplifier circuit 20. Amplified and output to the adder circuit 21. The adder circuit 21 adds the output voltages of the first and second differential amplifier circuits 19 and 20 and sends a signal to the comparator 14. The comparator 14 detects the loop current by comparing the output voltage from the adding circuit 21 with the reference voltage 13.
[0004]
For example, Japanese Patent Application Laid-Open No. Sho 61-152159 is also referred to as a detection circuit for a loop current flowing in a call current supply circuit that supplies a direct current via a two-wire subscriber line.
[0005]
[Problems to be solved by the invention]
However, the configuration shown in FIG. 4 has a problem that the circuit scale increases and the chip size of the LSI also increases because the voltage of the feeding resistor is detected by the differential amplifier.
[0006]
There is also a problem that a large resistance value and a large number of resistors that require relative accuracy are required, and therefore, the area occupied by the resistor increases with the chip area width.
[0007]
Therefore, the present invention has been made in view of the above problems, and an object of the present invention is to provide a loop current detection circuit that is suitable for integration into an integrated circuit with a reduced circuit scale.
[0008]
Another object of the present invention is to provide a loop current detection circuit that is suitable for integration in an integrated circuit by reducing the number of resistors that require relative accuracy.
[0009]
[Means for Solving the Problems]
The present invention that achieves the above-described object is characterized in that voltages between terminals of a first feeding resistor and a second feeding resistor that are connected to a line and supply current to a communication terminal are respectively set as first, second resistors, and third, A first current mirror circuit that receives a sum current of the currents flowing through the first and third resistors as input, and a current that flows through the second and fourth resistors. A second current mirror circuit that inputs a sum current of the first current mirror circuit and an output resistor for supplying a difference current between the output current of the first current mirror circuit and the output current of the second current mirror circuit to the output resistor. A comparator is provided that compares the terminal voltage of the resistor with a reference voltage.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described. The loop current detection circuit of the present invention detects a loop current by adding two differences in current flowing through a resistor connected to a terminal of a power supply resistor that supplies power to a communication line.
[0011]
In the present invention, the loop current detection circuit includes first and

second feeding resistors

1 and 2 that supply current to the communication line, and first and second ends connected to both ends of the first feeding resistor 1, respectively. Resistors 5 and 7 and third and fourth resistors 6 and 8 having one ends connected to both ends of the second feeding resistor 2 and the other ends of the first and third resistors 5 and 6 are connected in common. The first current mirror circuit 9 connected to the input terminal and receiving the sum of the currents flowing through the first and third resistors 5 and 6 and the other ends of the second and fourth resistors 7 and 8 Are connected in common and connected to the input terminal, and the second current mirror circuit 11 that receives the sum of the currents flowing through the second and fourth resistors 7 and 8 and the input terminal of the first current mirror circuit 9 Is connected to the output terminal of the second current mirror circuit 11, and the output terminal is connected to the output terminal of the second current mirror circuit 11. And a comparator 14 for connecting the connection point of the output ends of the second and third current mirror circuits 10 and 11 to one end of the output resistor 12 and comparing the terminal voltage of the output resistor 12 with the reference voltage 13. ing. The other end of the output resistor 12 is connected to the ground side of the loop current detection circuit.
[0012]
The current flowing through the loop including the first feeding resistor 1, the communication terminal 3, the second feeding resistor 2, and the power source 4 creates a potential difference between the terminals of the

feeding resistors

1 and 2.
[0013]
The terminals on both sides of the first feeding resistor 1 connected to the communication terminal 3 are connected to one end of the resistor 5 and the resistor 7, respectively, and have different currents corresponding to the potential difference between the terminals of the first feeding resistor 1. Shed.
[0014]
Similarly, one end of each of the resistor 6 and the resistor 8 is connected to the terminals on both sides of the second feeding resistor 2 connected to the communication terminal 3, and the potential difference between the terminals of the second feeding resistor 2 is determined. Only different currents flow.
[0015]
The current obtained by adding the currents flowing through the resistors 5 and 6 is input to the first current mirror circuit 9, and the current adding the currents flowing through the resistors 7 and 8 is input to the second current mirror circuit 11. To do.
[0016]
The output of the third current mirror circuit 10 that receives the output of the first current mirror circuit 9 is connected to the output of the second current mirror circuit 11, and a difference current flows through the output resistor 12.
[0017]
A loop current is detected by comparing the terminal voltage of the output resistor 12 based on this difference current with the reference voltage 13 by the comparator 14.
[0018]
【Example】
Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a diagram showing the configuration of an embodiment of the present invention. Referring to FIG. 1, a loop current detection circuit 15 according to an embodiment of the present invention includes a resistor 5 and a resistor 7 each having one end connected to both terminals of a feeding resistor 1 connected to the communication terminal 3, and a communication terminal. 3 has a resistor 6 and a resistor 8 each having one end connected to both side terminals of the feeding resistor 2 connected to 3. The connection point between the feeding resistor 1 and the resistor 5 is connected to the ground side.
[0019]
The other ends of the resistor 5 and the resistor 7 are connected to the input end of the first current mirror circuit 9 and the input end of the second current mirror circuit 11, respectively.
[0020]
The other ends of the resistors 6 and 8 are also connected to the input terminal of the first current mirror circuit 9 and the input terminal of the second current mirror circuit 11, respectively.
[0021]
From the output terminal of the first current mirror circuit 9, a current obtained by adding the currents flowing through the resistors 5 and 6 is output. Similarly, a current obtained by adding the currents flowing through the resistors 7 and 8 is output from the output terminal of the second current mirror circuit 11.
[0022]
The third current mirror circuit 10 has an input terminal connected to the output terminal of the first current mirror circuit 9, an output terminal connected to the output terminal of the second current mirror circuit 11, and the third current mirror circuit 10. A difference current obtained by subtracting the output current of the first current mirror circuit 9 from the output current of the second current mirror circuit 11 is output to the output terminal of the second current mirror circuit 11 and the output terminal of the second current mirror circuit 11. The difference current between the output of the second current mirror circuit 11 and the output of the first current mirror circuit 9 flows through the output resistor 12 and is converted into a voltage.
[0023]
The inter-terminal voltage of the output resistor 12 and the reference voltage 13 are compared by a comparator 14 to detect a loop current.
[0024]
FIG. 2 is a diagram showing a configuration of a current mirror circuit in one embodiment of the present invention, and a known configuration is used. That is, the bases of the input-side transistor 30 and the output-side transistor 31 are connected in common, and the base and collector of the input-side transistor 30 are connected. In the first and second current mirror circuits 9 and 11, the emitter of the transistor is connected to the high potential side of the power supply 16, and the third current mirror circuit 10 is configured such that the emitter of the transistor is on the low potential side of the power supply 16. Connected.
[0025]
The operation of one embodiment of the present invention will be described. Normally, when the communication terminal 3 is activated (called), the DC resistance in the terminal becomes small, and a current flows through the

feed resistors

1 and 2. At this time, a potential difference is generated between the terminals of the

feeding resistors

1 and 2.
[0026]
The voltage from the power source 16 to each terminal of the

feeding resistors

1 and 2 is converted into current by the resistors 5, 6, 7, and 8. The resistance values of the resistors 5, 6, 7, and 8 are the same.
[0027]
The current flowing through the resistors 5 and 6 is input to the first current mirror circuit 9. Similarly, the current flowing through the resistors 7 and 8 is input to the second current mirror circuit 11. The third current mirror circuit 10 whose input is connected to the output of the first current mirror circuit 9 and whose output is connected to the output of the second current mirror circuit 11 is connected to the output of the first current mirror circuit 9 from the output. A current obtained by folding the output current is output as a mirror current. From the connection point between the output of the second current mirror circuit 11 and the output of the third current mirror circuit 10, the output current of the first current mirror circuit 9 is obtained. A current drawn (subtracted) from the output current of the second current mirror circuit 11 is output. A difference current Iout between the output current of the second current mirror circuit 11 and the output current of the first current mirror circuit 9 flows to the output resistor 12 and is converted into a voltage by the output resistor 12.
[0028]
The difference current Iout is a current represented by the following equation (1). That is, V16 is the voltage of the power supply 16, VA is the line-side terminal voltage of the battery-side feeding resistor 2 (resistance value RA), VB is the line-side terminal voltage of the ground-side feeding resistor 1 (resistance value RB), and V4 is When the voltage of the power supply 4 is R, the resistance values of the resistors 5, 6, 7, and 8 are VRB and VRA are the voltages across the terminals of the feeding resistors 1 and 2, and IL is the loop current, the current I1 = ( V16-VBE) / R5 (where VBE is the base-emitter voltage of the transistor in the current mirror circuit), current I3 flowing through resistor 6 = (V16-VBE-VA) / R6, current flowing through resistor 7 = (V16 -VBE-VB) / R7, the current I4 flowing through the resistor 8 = (V16-VBE-V4) / R8, and the input of the first current mirror circuit 9 is the sum current I1 + I3, and the second current mirror The sum current I2 + I4 is input to the input of the circuit 11, and from (I2 + I4)-(I1 + I3) The following equation (1) is derived.
[0029]

[0030]
The comparator 14 compares the reference voltage 13 and the voltage of the output resistor 12 to detect a loop current.
[0031]
According to one embodiment of the present invention, since the loop current is detected by adding the difference between the currents flowing through the feeding resistors, the loop current is present even when the line has AC noise or the like and exceeds the voltage range of the power source 4. Can be detected.
[0032]
A second embodiment of the present invention will be described. FIG. 3 is a diagram showing the configuration of the second exemplary embodiment of the present invention. Referring to FIG. 3, in the second embodiment of the present invention, in addition to the configuration shown in FIG. 1, the reference voltage 13 input to the comparator 14 is provided with a voltage switching control circuit 18. .
[0033]
By supplying a control signal from the host device to the voltage switching circuit 18, the voltage value of the reference voltage 13 supplied to the comparator 14 is changed, so that a plurality of threshold values for loop current detection are provided.
[0034]
Further, a mirror ratio control circuit 17 that receives the voltage of the output resistor 12 as an input is added, and the mirror ratio in the first and / or second current mirror circuits 9 and 11 or any one of them is changed, so that the detection current can be reduced. The range can be widened. When the mirror ratio, which is the ratio between the input current value and the output current value of the current mirror circuit, is 1: 1 to 1: N, the emitter area is usually input as the output-side transistor 31 of the current mirror circuit shown in FIG. A transistor having an N times the emitter area of the side transistor 30 is used. To control the mirror ratio variably, for example, as the output side transistor of the current mirror circuit shown in FIG. 2, the base is shared with the input side transistor and the base. A plurality of output side transistors with the same emitter area are connected, a switch is provided between the emitter and power supply of each transistor, and one or a plurality of output side transistors are made active by controlling on / off of the switch according to the mirror ratio. The output current is the sum of the output currents of the collectors of the output side transistors.
[0035]
【The invention's effect】
As described above, according to the present invention, since the loop current detection circuit can be configured without using an operational amplifier, the circuit scale can be reduced.
[0036]
In addition, according to the present invention, the number of resistors having a large resistance value that requires relative accuracy is small, which is effective for integrated circuits.
[0037]
Further, according to the present invention, the line includes AC induction and the like, and the loop current can be detected even when the voltage range of the power source is exceeded.
[Brief description of the drawings]
FIG. 1 is a diagram showing a configuration of an embodiment of the present invention.
FIG. 2 is a diagram showing a configuration of a current mirror circuit in an embodiment of the present invention.
FIG. 3 is a diagram showing the configuration of another embodiment of the present invention.
FIG. 4 is a diagram showing a configuration of a conventional loop current detection circuit.
[Explanation of symbols]
DESCRIPTION OF

SYMBOLS

1, 2 Feed resistance 3 Communication terminal 4 Power supply 5, 6, 7, 8 Resistance 9, 10, 11 Current mirror circuit 12 Output resistance 13 Reference voltage 16 Power supply 17 Miller ratio control circuit 18 Voltage switching control circuit 19, 20 Differential amplification circuit

Claims

A first resistor having one end connected to the power supply side terminal of the first power supply resistor connected between the positive terminal of the power supply and the terminal to supply current to the terminal connected to the line;
A second resistor having one end connected to a terminal side terminal of the first feeding resistor;
A third resistor having one end connected to a terminal side terminal of a second feeding resistor connected between the terminal and the negative terminal of the power source ;
A fourth resistor having one end connected to the power supply side terminal of the second feeding resistor ;
A first current mirror circuit in which the other ends of the first and third resistors are connected in common and connected to an input end, and a sum current of currents flowing through the first and third resistors is input;
A second current mirror circuit in which the other ends of the second and fourth resistors are connected in common and connected to an input end, and a sum current of currents flowing through the second and fourth resistors is input,
With
An output resistor for converting said difference current difference current is supplied to the output current of the output current and the second current mirror circuit of the first current mirror circuit into a voltage,
A comparator for comparing the terminal voltage of the output resistor with a reference voltage ;
A loop current detection circuit comprising:

First and second feeding resistors for supplying current to the communication line;
First and second resistors each having one end connected to both ends of the first feeding resistor;
A third resistor and a fourth resistor each having one end connected to both ends of the second feeding resistor;
A first current mirror circuit in which the other ends of the first and third resistors are connected in common and connected to an input end, and a sum current of currents flowing through the first and third resistors is input;
A second current mirror circuit in which the other ends of the second and fourth resistors are connected in common and connected to an input end, and a sum current of currents flowing through the second and fourth resistors is input,
A third current mirror circuit having an input terminal connected to the output terminal of the first current mirror circuit and an output terminal connected to the output terminal of the second current mirror circuit;
An output resistor having one end connected to a connection point between the output end of the second current mirror circuit and the output end of the third current mirror circuit;
A comparator for comparing the terminal voltage of the output resistor with a reference voltage;
A loop current detection circuit comprising:

2. The loop current detection circuit according to claim 1, further comprising means for varying a voltage value of the reference voltage.

3. The loop current detection circuit according to claim 1, further comprising means for changing a mirror ratio in the first current mirror circuit and / or the second current mirror circuit.