JPH0359731U - - Google Patents

Info

Publication number
JPH0359731U
JPH0359731U JP12106289U JP12106289U JPH0359731U JP H0359731 U JPH0359731 U JP H0359731U JP 12106289 U JP12106289 U JP 12106289U JP 12106289 U JP12106289 U JP 12106289U JP H0359731 U JPH0359731 U JP H0359731U
Authority
JP
Japan
Prior art keywords
switch
terminal
resistor
connect
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12106289U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12106289U priority Critical patent/JPH0359731U/ja
Publication of JPH0359731U publication Critical patent/JPH0359731U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Synchronizing For Television (AREA)
  • Television Systems (AREA)
  • Electronic Switches (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の波形合成回路の一実施例を示
す電気回路図、第2図は同第1図の動作波形図で
ある。 5,6はアナログスイツチ、A,Bはスイツチ
のコントロール信号である。
FIG. 1 is an electric circuit diagram showing an embodiment of the waveform synthesis circuit of the present invention, and FIG. 2 is an operational waveform diagram of FIG. 1. 5 and 6 are analog switches, and A and B are switch control signals.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 第1の抵抗を電源ラインと第1のスイツチの入
力端子間に接続し、第2の抵抗を同電源ラインと
同第1のスイツチの出力端子間に接続し、第1の
コントロール信号を同第1のスイツチのコントロ
ール端子に接続し、第2のスイツチの入力端子を
第3の抵抗で接地し、同第2のスイツチの出力端
子を第4の抵抗で接地し、第2のコントロール信
号を同第2のスイツチのコントロール端子に接続
し、前記第1のスイツチの出力端子と同第2のス
イツチの出力端子とを接続し、同第1,2のスイ
ツチの出力端子より三値信号を出力してなるアナ
ログスイツチ素子の利用を特徴とする波形合成回
路。
A first resistor is connected between the power supply line and the input terminal of the first switch, a second resistor is connected between the power supply line and the output terminal of the first switch, and a first control signal is connected between the power supply line and the input terminal of the first switch. Connect the control terminal of the first switch to the control terminal of the first switch, ground the input terminal of the second switch through a third resistor, ground the output terminal of the second switch through a fourth resistor, and connect the second control signal to the control terminal of the second switch. Connect to the control terminal of the second switch, connect the output terminal of the first switch and the output terminal of the second switch, and output a three-value signal from the output terminals of the first and second switches. A waveform synthesis circuit characterized by the use of analog switch elements.
JP12106289U 1989-10-17 1989-10-17 Pending JPH0359731U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12106289U JPH0359731U (en) 1989-10-17 1989-10-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12106289U JPH0359731U (en) 1989-10-17 1989-10-17

Publications (1)

Publication Number Publication Date
JPH0359731U true JPH0359731U (en) 1991-06-12

Family

ID=31669105

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12106289U Pending JPH0359731U (en) 1989-10-17 1989-10-17

Country Status (1)

Country Link
JP (1) JPH0359731U (en)

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