JPH0359609B2 - - Google Patents

Info

Publication number
JPH0359609B2
JPH0359609B2 JP55023060A JP2306080A JPH0359609B2 JP H0359609 B2 JPH0359609 B2 JP H0359609B2 JP 55023060 A JP55023060 A JP 55023060A JP 2306080 A JP2306080 A JP 2306080A JP H0359609 B2 JPH0359609 B2 JP H0359609B2
Authority
JP
Japan
Prior art keywords
transistor
base
output
level
supplied
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP55023060A
Other languages
English (en)
Japanese (ja)
Other versions
JPS56119531A (en
Inventor
Masayuki Komon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2306080A priority Critical patent/JPS56119531A/ja
Publication of JPS56119531A publication Critical patent/JPS56119531A/ja
Publication of JPH0359609B2 publication Critical patent/JPH0359609B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01806—Interface arrangements
    • H03K19/01812—Interface arrangements with at least one differential stage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00307—Modifications for increasing the reliability for protection in bipolar transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
JP2306080A 1980-02-26 1980-02-26 Level converting circuit Granted JPS56119531A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2306080A JPS56119531A (en) 1980-02-26 1980-02-26 Level converting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2306080A JPS56119531A (en) 1980-02-26 1980-02-26 Level converting circuit

Publications (2)

Publication Number Publication Date
JPS56119531A JPS56119531A (en) 1981-09-19
JPH0359609B2 true JPH0359609B2 (enrdf_load_stackoverflow) 1991-09-11

Family

ID=12099878

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2306080A Granted JPS56119531A (en) 1980-02-26 1980-02-26 Level converting circuit

Country Status (1)

Country Link
JP (1) JPS56119531A (enrdf_load_stackoverflow)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4525836A (en) * 1982-12-27 1985-06-25 The Grass Valley Group, Inc. Circuit for converting a logical signal into two balanced logical signals
JP2646786B2 (ja) * 1990-02-27 1997-08-27 日本電気株式会社 半導体出力回路
JP2674344B2 (ja) * 1991-03-12 1997-11-12 日本電気株式会社 レベル変換回路

Also Published As

Publication number Publication date
JPS56119531A (en) 1981-09-19

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