JPH0358742U - - Google Patents

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Publication number
JPH0358742U
JPH0358742U JP1989117753U JP11775389U JPH0358742U JP H0358742 U JPH0358742 U JP H0358742U JP 1989117753 U JP1989117753 U JP 1989117753U JP 11775389 U JP11775389 U JP 11775389U JP H0358742 U JPH0358742 U JP H0358742U
Authority
JP
Japan
Prior art keywords
microprocessor
input
output port
protect switch
write protect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1989117753U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989117753U priority Critical patent/JPH0358742U/ja
Publication of JPH0358742U publication Critical patent/JPH0358742U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の実施例を示すブロツク図、第
2図は従来例を示すブロツク図、第3図は第2図
に示すライトプロテクトスイツチ周辺の回路構成
を示す図である。 11……ライトプロクトスイツチ、12……マ
イクロプロセツサ、13……RAM、14……バ
ツクアツプ制御回路、15……電池。
FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing a conventional example, and FIG. 3 is a diagram showing a circuit configuration around the write protect switch shown in FIG. 11...Write protection switch, 12...Microprocessor, 13...RAM, 14...Backup control circuit, 15...Battery.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] マイクロプロセツサと、このマイクロプロセツ
サの入出力ポートに接続され、本体からのデータ
の書込みを許可/禁止することを指示するライト
プロテクトスイツチと、上記入出力ポートを介し
てその状態を識別し内蔵RAMに対する書込み信
号を制御するメモリ制御回路とを具備することを
特徴とするICメモリカード。
A microprocessor, a write protect switch that is connected to the input/output port of this microprocessor and instructs to permit/disable writing of data from the main unit, and a built-in write protect switch that identifies its status via the input/output port. An IC memory card characterized by comprising a memory control circuit that controls a write signal to a RAM.
JP1989117753U 1989-10-06 1989-10-06 Pending JPH0358742U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989117753U JPH0358742U (en) 1989-10-06 1989-10-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989117753U JPH0358742U (en) 1989-10-06 1989-10-06

Publications (1)

Publication Number Publication Date
JPH0358742U true JPH0358742U (en) 1991-06-07

Family

ID=31665956

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989117753U Pending JPH0358742U (en) 1989-10-06 1989-10-06

Country Status (1)

Country Link
JP (1) JPH0358742U (en)

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