JPH0358675A - Digital comparator - Google Patents

Abstract

PURPOSE:To eliminate shot noise near the border between a moving picture and a still picture and single shot noise by providing an AND circuit receiving an output of a comparator and a signal from a clear terminal and a comparison value setting circuit setting the comparison value based on the past value of an output logical value of the AND circuit. CONSTITUTION:When a moving detection signal from an input terminal 1 is larger than an output logic value of a comparison setting circuit 6, a comparator 3 outputs logical 0 and when not, the comparator 3 outputs logical 1. An AND circuit 5 is inserted between the comparator 3 and the circuit 6, a logical 0 being an initial value is inputted from a clear input terminal 4, the initial value is inputted to the comparison value setting circuit 6 and after the value of the loop circuit is ascertained, the level of the clear terminal 4 is set to logical 1 so as to input an output signal of the comparator 3 to the circuit 6. Thus, after the moving detection signal is once discriminated to be a moving picture, a movement detection signal inputted thereafter is hardly discriminated to be a still picture, and when the signal is once discriminated to be a still picture, the signal inputted thereafter is hardly discriminated to be a moving picture, then single shot noise is eliminated and shot noise near the border between the moving picture and the still picture is eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a noise removal circuit for removing white noise contained in a composite video signal using autocorrelation between frames in a television receiver or the like. This is a motion detection circuit that detects the motion of an image, and relates to a digital comparator that determines whether a composite video signal is moving image information or still image information.

Conventional technology A digital comparator is a motion detection circuit that detects image movement in a noise removal circuit that is one of the additional functions of EDTV (clear vision) receivers, etc. This is used to determine whether the information is still image information or not.

An example of the conventional digital comparator mentioned above will be described below with reference to the drawings. FIG. 3 shows a Bronnok diagram of a conventional digital comparator. In Fig. 3, 1 is an input terminal, 7 is a fixed value with a certain digital logic value, 3 is a comparator that uses manual input terminal 1 and fixed value 7, and 2
is an output terminal connected to the output terminal of comparator 3.

The operation of the digital comparator constructed as described above will be explained below. A digital motion detection signal is input from the input terminal 1, and if the logical value thereof is greater than the logical value of the fixed value 7, the comparator 3 outputs the logical value 0; otherwise, the comparator 3 outputs the logical value 1. When the logical value of the output terminal 2 is O, it is determined that the composite video signal is moving image information, and when the logical value is 1, it is determined that it is still image information.

Next, an example of a noise removal circuit will be explained. An example of a noise removal circuit is "Noise Reduction Takahashi, Journal of the Television Society, Vol. 33, No. 4 (1979), p. p2
There are 96 to 300 J, and an example thereof will be described below with reference to the drawings. FIG. 4 shows a block diagram of a conventional noise removal circuit using a digital comparator. In FIG. 4, 11 is a composite video signal input terminal, 12 is an AD converter connected to the composite video signal input terminal 11, and 13
14 is a subtracter that outputs the difference signal between the output of the chroma inverter 17 and the output of the AD converter 12; 14 is a K-multiplying circuit that multiplies the output logic value of the subtracter 13 by K times 1 (0≦K≦1); This is an adder that sums the output of the AD converter 122 and the output of the K-multiplying circuit 14, and the output is input to the subtracter 13 via the 1-frame memory 16 and the chroma inverter 17. A motion detection circuit 18 inputs the output of the subtracter 13 to the K multiplication circuit 14 via a low pass filter 19, an absolute value circuit 20, a converter 21, and a digital comparator 22. Further, the output of the adder 15 is connected to a video signal output terminal 24 via a DA converter 23.

The operation of the noise removal circuit constructed as described above will be described below.

A television analog video signal inputted from the composite video signal input terminal 1 is converted to digital by an AD converter 12 and inputted to a subtracter 13 and an adder 15. The output of the adder 15 is again converted from digital to analog by the DA converter 23, and the signal after noise removal is delivered to the video signal output terminal 24.

Further, the output signal of the AD converter 12, which is the current composite video signal, and the output signal of the Chroma Inharter 17, which is the composite video signal of one frame before, are subtracted by a subtracter 13, and then input to the K multiplier circuit 14.

In a TV composite video signal, image information is sent repeatedly at a frame period, but the autocorrelation between frames is very strong, and when subtracted between frames, the composite video signal disappears and only the noise remains. In addition, the phase of the chroma signal of the composite video signal is inverted between frames, and if the chroma signal is simply different, the chroma signal will be input to the K multiplication circuit l4, so the adder 15
After the output signal is delayed by one frame in the memory 16, the chroma inverter 17 inverts the phase of the chroma signal included in the composite video signal. The K-multiplying circuit 14 outputs a value obtained by multiplying the logical value of the noise amount, which is the output of the subtracter 13, by K, and the adder 15 adds it to the composite video signal, which is the output of the AD converter 12, to reduce the noise. remove.

1 Here, when setting K-1 of the K multiplier circuit 14, a signal obtained by adding and averaging the output signal of the AD converter 12 and the output signal of the chrominer inverter 7 is obtained from the output of the adder 15, and the DA converter The composite video signal output terminal 24 is reached via the device 23 . The S/N improvement degree is about 5 db. When K1φ, there is no output from the K multiplier circuit 14, so the composite video signal input terminal 1 and the video signal output terminal 24 receive the same signal. S/N is not improved. Here, if the signal at the composite video signal input terminal is video information, the interframe difference signal, that is, the output signal of the subtracter 13, will include not only noise but also video signal information, so the value of K should be reduced. It is necessary to reduce noise by doing this.

A motion detection circuit l8 determines whether the composite video signal is moving image information or still image information. First, the inter-frame difference signal which is the output of the subtracter 13 is passed through the low bus filter 19 to extract only the motion difference of the luminance signal, and is converted to only the magnitude difference by the absolute value circuit 20 and then passed through the filter 21. Input to digital comparator 22. The digital comparator 22 controls the value of K of the K multiplier circuit 14 by outputting whether the input value is larger than the fixed value 7 shown in FIG. 3, as described in the operation description of FIG. After all, if the motion detection circuit 18 determines that the composite video signal is video information, the value of K of the K multiplier circuit 14 is reduced to suppress noise removal, and if it is determined that the composite video signal is still image information, it is multiplied by K. Noise is removed by increasing the value of K in circuit l4.

Problems to be Solved by the Invention However, in the structure as described in L, the digital comparator 22 only determines whether the human logic value is greater than the fixed value 7 in FIG. If noise is included, single-shot noise also appears in the output of the subtracter 13, which is input to the digital comparator 22 via the low pass filter 19, the absolute value circuit 20, and the filter 21, and is then input to the digital comparator 22 as shown in FIG. {I! If U is greater than 7, it will be determined that it is a moving image, and the K multiplier circuit 14 will be controlled to suppress noise removal. In the end, the single-shot noise is determined to be video information rather than noise, and is not removed as noise. In addition, when the composite video signal contains moving image information and still image information at the same time, the low bus filter 19 gently changes the transition from the moving image to the still image at the boundary. Values near the fixed value 7 shown in the figure are input to the digital comparator 22, and the determination of moving images and still images changes rapidly, resulting in noise at the video signal output terminal 24. There was a problem with this.

In view of the above-mentioned problems, the present invention provides a digital comparator for realizing a noise removal circuit that can remove single-shot noise and remove bump-like noise near the boundary between a moving image and a still image.

Means for Solving the Problems In order to solve the above problems, the digital comparator of the present invention has the following features:
A device comprising a comparison value setting circuit that sets a comparison value based on the past value of the output logic value of the comparator, and a means for manually determining the initial value of the comparison value setting circuit using a signal from a clear terminal. It is.

Effect of the Invention According to the structure described in -1 and 2 of the present invention, if the motion detection signal inputted from the input terminal is determined to be a -4 moving image, the motion detection signal manually input thereafter is unlikely to be determined to be a still image, and once the motion detection signal inputted from the input terminal is determined to be a still image. Once the motion detection signal is determined, it becomes difficult to determine that the motion detection signal input thereafter is a moving image. Therefore, even if there is single-shot noise in the composite video signal input, it can be removed as noise without determining it as a video, and even if the composite video signal input contains video and still images at the same time, the boundary between them can be removed. This eliminates the sudden change in the judgment between moving images and still images, which causes noise.

Embodiment Hereinafter, a digital comparator according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a block diagram of a digital comparator in one embodiment of the present invention. In Figure 1, 1 is the input terminal, 4 is the clear end, and 3 is the input terminal.
5 is an AND circuit that receives the output of comparator 3 and the signal of clear terminal 4 as inputs; , 6 is a comparison value setting circuit that sets a comparison value based on the past value of the output logic value of the AND circuit 5, and 2 is an output terminal connected to the output terminal of the comparator 3.

The operation of the digital comparator constructed as described above will be explained below with reference to FIG. A digital motion detection signal is input from input terminal 1, and if the logical value of the signal is greater than the output logical value of comparison value setting circuit 6, comparator 3 outputs logical value 0, otherwise outputs logical value 1. do.

Here, the comparator 3, AND circuit 5, and comparison value setting circuit 6 form a loop circuit, and the initial value is not determined.
An AND circuit 5 is inserted, an initial logical value O is inputted from the clear input terminal 4, and an initial logical value O is inputted to the comparison value setting circuit 6. After the value of the loop circuit is determined, the logical value of the clear terminal 4 is set to 1 so that the output signal of the comparator 3 is input to the comparison value setting circuit 6. The comparison value setting circuit 6 is an AND
This circuit sets a comparison value based on the past value of the output logic value of the circuit 5, and a specific example thereof is shown in FIG.

FIG. 2(a) shows a circuit diagram of the comparison value setting circuit 6 in the first embodiment. In Figure 2(a), 1a is the first
Figure A. The comparison value setting circuit manual terminal 3a connected to the output of the ND circuit 5 is a clock input terminal, both of which are input to the D flip-flop 4a.

The output of the D flip-flop 4a is connected to the comparison value setting circuit output terminal 2a, which is the output of the comparison value setting circuit 6 of FIG. 1, via a doubling circuit 5a.

Regarding the comparison value setting circuit 6 configured as described above,
The operation will be explained below using FIG. 2(a). In FIG. 2(a), the signal at the comparison value setting circuit input terminal 1a is delayed by one clock at the D Frisobfromp 4a, and then its logical value is doubled at the doubling circuit 5a and sent from the comparison value setting circuit output terminal 2a. Output.

That is, the comparison value setting circuit output terminal 2a outputs a logic value of 2 if the logic value one clock time before the output of the D-flimp flop 4a is 1, and the logic value one clock time before the output of the D-flimp flop 4a. If the value is 0, a logical value of 0 is output.

According to this structure, in FIG. 1, when it is determined that the motion detection signal at the input terminal 1 is a moving image, the output logic value of the comparator 3 becomes O, and after one clock, the comparison value setting circuit 6 The output of becomes 0, and the logic value of the signal of the human input terminal l becomes 1.
If this is the case, it is determined that the video is a video. In addition, if the motion detection signal of input terminal 1 is determined to be a still image, comparator 3
The output logic value of the image becomes 1, and after one clock, the output of the comparator setting circuit 6 becomes 2. If the logic value of the signal at the input terminal 1 is 2 or less, it is determined that the image is a still image. In other words, if the video signal from one clock ago is determined to be a moving image, the current video signal is unlikely to be determined to be a still image, and if the video signal from one clock ago is determined to be a still image, the current video signal is unlikely to be determined to be a moving image. Hard to judge. Therefore, even if the composite video signal input contains single-shot noise and the output of limiter 2I in FIG. If the value is 2 or less, it is determined that the image is a still image, and noise is removed. Furthermore, when the composite video signal input includes a moving image and a still image at the same time, the low-pass filter 19 causes the transition between the moving image and the still image to occur smoothly at the boundary. An intermediate signal is input to digital comparator 22. However, as mentioned earlier, if the video signal one clock ago is determined to be a still image, the current video signal is difficult to determine as a moving image, and if the video signal one clock ago is determined to be a moving image, the current video signal is determined to be a still image. Since the video signal is difficult to judge as a still image, the judgment of the digital comparator 22 between a moving image and a still image does not change rapidly near the boundary between the moving image and the still image as in the conventional example, and the video signal is output. No popping noise appears at the terminal 24.

FIG. 2(b) shows a circuit diagram of the comparison value setting circuit 6 in the second embodiment. In FIG. 2(b), the comparison value setting same-path output terminal 1a has D-flimb flops 6a and 7a.
, 8a are connected in cascade, and each D flip-flop 6
The outputs of a, 7a, and 8a are input to an adder 9a. The output of the adder 9a is connected to the comparison value setting circuit output terminal 2a. Clock input terminal 3a drives each of the flops 6a, 7a, 8a.

The operation of the comparison value setting circuit 6 configured as described above will be explained below with reference to FIG. 2(b). Figure 2 (
In b), the signal at the comparison value setting circuit input terminal 1a is delayed by I clocks in each D flip-flop 6a, 7a, 8a, and the sum of the output logic values of each flip-flop 6a, 7a, 8a is added to the adder 9a. is calculated and outputted from the comparison value setting circuit output terminal 2a.

According to this structure, the comparison value which is the output of the comparison value setting circuit 6 of FIG. 1 is set from the motion detection signal of one clock ago, the motion detection signal of two clocks ago, and the motion detection signal of three clocks ago. As in the case of the first embodiment, if the video signals one clock ago, two clocks ago, and three clocks ago are determined to be moving images, the current video signal is difficult to determine as a still image, and , 2 clocks ago, and 3 clocks ago are determined to be still images, the current video signal is unlikely to be determined to be a moving image. For this reason, single-shot noise included in the composite video signal as described in the first embodiment can be removed,
When the composite video signal input includes a moving image and a still image at the same time, it is possible to prevent noise from occurring at the boundary between them.

Effects of the Invention As described above, according to the present invention, there is an AND circuit that receives the output of a comparator and a clear terminal as input, and a comparison value setting that sets a comparison value based on the past value of the output logic value of the AND circuit. By providing a circuit, once the motion detection signal input to the input terminal is determined to be a moving image, the motion detection signal input after that is difficult to determine as a still image. This makes it difficult for motion detection signals to be determined as moving images. Therefore, even if there is single-shot noise in the composite video signal input, it can be removed as noise without being judged as a video.Also, even if the composite video signal input includes a video and still images at the same time, the video will be removed near the boundary. This eliminates the rapid change in the judgment of still images and the generation of grainy noise.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a digital comparator in one embodiment of the present invention, FIG. 2(a) is a circuit diagram of the first embodiment of the comparison value setting circuit of FIG. FIG. 1 is a circuit diagram of a second embodiment of the comparison value setting circuit, FIG. 3 is a block diagram of a conventional digital comparator, and FIG. 4 is a block diagram of an embodiment of the noise removal circuit. I...Manual terminal, 2...Output terminal, 3
...Comparator, 4...Clear terminal, 5.
...AND circuit, 6...Comparison value setting circuit.

Claims (1)

[Claims] An input terminal, a clear terminal, a comparator that compares the logical value of the input terminal and the output logical value (comparison value) of the comparison value setting circuit and outputs the magnitude relationship, and the past of the output logical value of the comparator. the above-mentioned comparison value setting circuit for setting a comparison value based on the value of the above-mentioned comparison value setting circuit; means for determining the initial value of the input of the above-mentioned comparison value setting circuit using the signal of the above-mentioned clear terminal; and a means connected to the output terminal of the above-mentioned comparator. A digital comparator with an output terminal.