JPH0736625B2 - Motion detection circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a motion detection circuit for extracting motion information of an image in a device that reproduces an NTSC composite television signal by digital processing.

[Conventional technology]

FIG. 3 is a block diagram showing a conventional motion detecting circuit disclosed in, for example, Japanese Patent Laid-Open No. 61-70888.
Is an input terminal for a digital NTSC signal, 2 is a frame memory that receives the signal that arrives at this input terminal 1, 3 is a frame memory that receives the output of the frame memory 2,
Reference numeral 4 is a subtractor that receives the signal that arrives at the input terminal 1 and the output of the frame memory 2, 5 is a low-pass filter that receives the output of the subtractor 4, and 6 is the output of the low-pass filter 5. An absolute value circuit as an absolute value means, 7 is a subtractor whose input is the signal arriving at the input terminal 1 and the output of the frame memory 3, 8 is a bandpass filter whose input is the output of the subtractor 7, and 9 is a bandpass filter. An absolute value circuit as an absolute value means that receives the output of the pass filter 8, an adder 10 that receives the outputs of the absolute value circuit 6 and the absolute value circuit 9, and an output terminal 11 of the adder 10. .

Next, the operation will be described. The digital NTSC signal input to the input terminal 1 is input to the frame memories 2 and 3 having a capacity of one frame, which are cascaded, and the difference between the signal before one frame period and the signal before two frame periods is subtracted by the subtracter 4 , 7
It is calculated by. The inter-frame difference signal obtained by the subtractor 4 is input to the low-pass filter 5 and the luminance signal component having a low horizontal frequency is extracted. Here, the pass band of the low pass filter 5 is shown in FIG. The difference signal between the two frames calculated by the subtractor 7 is input to the bandpass filter 8 and the luminance signal component and the chrominance signal component having high horizontal frequencies are extracted. Here, the pass band of the band pass filter 8 is set to the fourth
It is shown in FIG. Since the phase of the subcarrier of the color signal returns to the original in two frame cycles, the output of the bandpass filter 8 becomes zero in the case of a still image. Then, if there is any change in the high frequency components of the luminance signal of the color signal, a significant non-zero signal is obtained from the absolute value circuit 9 and can be used as motion information for the high frequency components of the color signal and the luminance signal. Similarly, in the case of a still image, the output of the low pass filter 5 becomes zero. Then, if there is any change in the low frequency component of the luminance signal, a significant non-zero signal is obtained from the absolute value circuit 6 and can be used as motion information for the low frequency component of the luminance signal. Therefore,
By adding the motion information obtained as the output of the absolute value circuit 6 and the motion information obtained as the output of the absolute value circuit 9 by the adder 10, the motion information of the subject included in the NTSC signal is output terminal 11. Is obtained.

[Problems to be Solved by the Invention]

Since the conventional motion detection circuit is configured as described above, motion information between frames cannot be obtained or motion information between fields of the input signal can be obtained for the high frequency components of the color signal and the luminance signal. There was a problem that I could not do it.

The present invention has been made to solve the above problems, and an object of the present invention is to obtain a motion detection circuit for accurately obtaining motion information between fields and frames of an input signal.

[Means for Solving the Problems]

A motion detection circuit according to the present invention includes a frame memory that delays an input signal for one frame period, and an absolute value that obtains an absolute value of a difference between low-frequency components of a luminance signal in one frame from an output signal of the frame memory and the input signal. Means, a frame memory for delaying the output signal of the frame memory for one frame period, an absolute value of a difference between two frames of a high frequency component and a chrominance signal component of a luminance signal from the output signal of the frame memory and the input signal, A value means, a frame memory for delaying the absolute value of the difference between the two frames by one frame period, a logical sum means for taking a logical sum of an input signal and an output signal of the frame memory, the logical sum and the one-frame difference OR means for taking the logical sum of the absolute values of, a field memory for delaying the OR for one field period, and an input signal and an output of the field memory Those having a logical OR means for ORing the item.

[Action]

In the present invention, a frame memory for delaying the absolute value of the difference between two frames added to the conventional circuit for one frame period, a logical sum means for taking a logical sum of an input signal and an output signal of this frame memory, and a logical sum of this means The logical sum means for taking the logical sum of the absolute values of the differences between one frame, the field memory for delaying the logical sum of this means for one field period, and the logical sum means for taking the logical sum of the input signal and the output signal of this field memory By interpolating the inter-frame difference signal and inter-frame interpolating the one-frame difference signal, it is possible to accurately obtain the inter-field and inter-frame motion information of the input signal.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. First
In the figure, 1 to 9 are the same circuit components as in the conventional example.
11 is the output terminal of the maximum value circuit 17, 12 is the frame memory that receives the output of the absolute value circuit 9, 13 is the maximum value as the logical sum means that receives the output of the absolute value circuit 9 and the output of the frame memory 12 Circuit, 14 is the output of absolute value circuit 6 and maximum value circuit
Maximum value circuit as a logical sum means with 13 outputs as input,
15 is a field memory whose input is the output of the maximum value circuit 14, 16 is a line memory whose input is the output of the field memory 15, 17 is the output of the maximum value circuit 14 and the field memory 15
Is a maximum value circuit as a logical sum means for inputting the output of the above and the output of the line memory 16.

Next, the operation will be described. The operations of the circuit components 1 to 9 are the same as in the conventional example. The output of the absolute value circuit 9 is input to the frame memory 12. The maximum value circuit 13 selects and outputs the maximum value of the input and output of the frame memory 12. A simple example will be described with reference to FIG. FIG. 2 is an example in which a small object moves in the horizontal direction, and # 1 to # 4 indicate each frame number. Assuming that the current frame is # 4, the output of the absolute value circuit 9 becomes (a) in FIG. On the other hand, since the output of the frame memory 12 is the output of the absolute value circuit 9 one frame before, it becomes (b) in FIG. Therefore, the output of the maximum value circuit 13 becomes (c) in FIG. 2, and the motion information of # 3 one frame before the current frame # 4 is complemented without omission. The maximum value circuit 14 selects and outputs the maximum value of the outputs of the absolute value circuit 6 and the maximum value circuit 13. Thus, at the output of the maximum value circuit 14, the motion information between the frames of the input signal is obtained. However, the maximum value circuit 14
The output of is lacking the motion information of an object moving at a frequency higher than the frame frequency. The output of the maximum value circuit 14 is input to the field memory 15. The output of the field memory 15 is input to the line memory 16. Then, the maximum value circuit 17 selects and outputs the maximum value among the output of the maximum value circuit 14, the output of the field memory 15 and the output of the line memory 16. A simple example will be described with reference to FIG. # 1 to # 4 are
Each field number shall be shown. Current field #
4, the output of the maximum value circuit 14 becomes (a) in FIG. Since the input signal is repeatedly scanned, #
Since there is no information corresponding to 1 and # 3, it is not possible to obtain (b) of FIG. With the maximum value of the output of the line memory 16 which is the output of, the signal corresponding to (b) of FIG. 2 can be obtained. Therefore, the maximum value circuit
The output of 17 is as shown in FIG.
The motion information of # 3 one field before can be supplemented without omission.
In this way, the inter-field motion information is obtained at the output terminal 11 of the maximum value circuit 17.

〔The invention's effect〕

As described above, according to the present invention, since the difference signal between two frames is interpolated between frames and the difference signal between one frame is interpolated between fields, the motion information between fields of the input signal and between frames can be accurately calculated. There is an effect that the motion detection circuit required for is obtained.

[Brief description of drawings]

FIG. 1 is a block diagram of a motion detecting circuit according to an embodiment of the present invention, FIG. 2 is an explanatory diagram of the motion detecting system, FIG. 3 is a block diagram of a conventional motion detecting circuit, and FIG. 4 is a horizontal direction filter. 3 is a frequency characteristic diagram of FIG. 2, 3 and 12 are frame memories, 6 and 9 are absolute value circuits (absolute value means), 13, 14 and 17 are maximum value circuits (logical sum means), and 15 is a field memory. In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] 1. A motion detection circuit for digitally extracting motion information of an object included in an NTSC composite television signal, and a frame memory for delaying an input signal by one frame period, and an output signal of the frame memory. And an absolute value means for obtaining an absolute value of a difference between low-frequency components of a luminance signal in one frame from the input signal, a frame memory that delays the output signal of the frame memory for one frame period, an output signal of the frame memory, and the input An absolute value means for obtaining the absolute value of the difference between the two frames of the high frequency component of the luminance signal and the color signal component from the signal, and the absolute value of the difference between the two frames is 1
A frame memory for delaying a frame period; a logical sum means for taking a logical sum of an input signal and an output signal of the frame memory; a logical sum means for taking a logical sum of the logical sum and the absolute value of the difference between the frames. A motion detection circuit comprising a field memory for delaying a logical sum for one field period, and a logical sum means for calculating a logical sum of an input signal and an output signal of the field memory.