JPH02166994A - Motion detection circuit - Google Patents

Abstract

PURPOSE:To exactly obtain the motion of an input signal between fields and frames by interposing a difference signal, which is between the two frames, between the frames and interposing the difference signal of one frame between the fields. CONSTITUTION:The output of an absolute value circuit 9 is inputted to a frame memory 12 and a maximum value circuit 13 selects and outputs a maximum value out of the input and output of the frame memory 12. A maximum value circuit 14 selects and outputs the maximum value out of the output of an absolute value circuit 6 and the output of the maximum value circuit 13 and the motion information of the input signal between the frames can be obtained. The output of the maximum value circuit 14 is outputted to a field memory 15, and the output thereof is inputted to a line memory 16. A maximum value circuit 17 selects and outputs the maximum value out of outputs of the maximum value circuit 14, the field memory 15 and the line memory 16. Thus, the motion information between fields can be obtained in an output terminal 11 of the maximum value circuit 17.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a motion detection circuit that extracts motion information of an image in an apparatus that reproduces an NTSC composite television signal through digital processing.

[Conventional technology]

FIG. 3 is a block diagram showing a conventional motion detection circuit disclosed in, for example, Japanese Unexamined Patent Publication No. 61-70888. In the figure, 1 is an input terminal for a digital NTSC signal;
is a frame memory whose input is the signal arriving at this input terminal l, 3 is a frame memory whose input is the output of frame memory 2, and 4 is a subtraction whose input is the signal arriving at input terminal 1 and the output of frame memory 2. 5 is a low-pass filter whose input is the output of the subtractor 4, 6 is an absolute value circuit serving as an absolute value means whose input is the output of the low-pass filter 5, and 7 is a signal arriving at the input terminal 1. 8 is a bandpass filter that receives the output of the subtractor 7 as an input, 9 is an absolute value circuit as an absolute value means that uses the output of the bandpass filter 8 manually, 10 is an adder which receives the output of the absolute value circuit 6 and the output of the absolute value circuit 9, and 11 is the output terminal of the adder lO.

Next, the operation will be explained. The digital NTSC signal input to the input terminal 1 is input to the cascade-connected frame memory 2.3 with a capacity of 1 frame, and the difference between the signal from the previous frame period and the signal from 2 frame periods before is sent to the subtracter 4. It is calculated as .7.

The inter-frame difference signal obtained by the subtracter 4 is input to a low-pass filter 5, where a luminance signal component with a low horizontal frequency is extracted. Here, the passband of the low-pass filter 5 is shown in FIG. 4(a). Further, the difference signal between the two frames calculated by the subtracter 7 is input to a band pass filter 8, and a luminance signal component and a color signal component having a high horizontal frequency are extracted. Here, the passband of the bandpass filter 8 is shown in FIG. 4(b). Since the phase of the subcarrier of the color signal returns to its original state every two frames, the output of the bandpass filter becomes zero in the case of a still image. If the color signal has some change in the high frequency component of the luminance signal, a significant non-zero signal is output to the absolute value circuit 9.
It can be used as motion information for high-frequency components of color signals and luminance signals. Similarly, in the case of a still image, the output of the low-pass filter 5 is zero. If there is any change in the low frequency component of the luminance signal, a significant non-zero signal is obtained from the absolute value circuit 6 and can be used as motion information for the low frequency component of the luminance signal. Therefore, by adding the motion information obtained as the output of the absolute value circuit 6 and the motion information obtained as the output of the absolute value circuit 9 in the adder 10, the output terminal 11 receives the information of the subject included in the NTSC signal. Movement information can be obtained.

[Problem to be solved by the invention]

Conventional motion detection circuits are configured as described above, so it is difficult to obtain motion information between frames or between fields of the input signal for high-frequency components of color signals and luminance signals. The problem was that it could not be done.

The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a motion detection circuit that accurately obtains motion information between fields and frames of an input signal.

[Means to solve the problem]

The motion detection circuit according to the present invention includes a frame memory that delays an input signal by one frame period, and an absolute value for determining the absolute value of a one-frame difference in low frequency components of a luminance signal from an output signal of the frame memory and the input signal. a frame memory for delaying the output signal of the frame memory for one frame period; and an absolute value for determining the absolute value of the difference between two frames of the high frequency component of the luminance signal and the color signal component from the output signal of the frame memory and the input signal. a value means, a frame memory for delaying the absolute value of the difference between the two frames by one frame period, a logic phase means for calculating the logical sum of the input signal and the output signal of the frame memory, and the logical sum and the above-mentioned i-frame difference. , a field memory for delaying the logical sum by one field period, and a logical sum means for calculating the logical sum of the input signal and the output signal of the field memory.

[For production]

In the present invention, a frame memory added to a conventional circuit that delays the absolute value of the difference between two frames by one frame period, an OR means for ORing an input signal and an output signal of this frame memory, and an OR of this means. A logical sum means for calculating the logical sum of the absolute values of the differences between one frame, a field memory for delaying the logical sum of this means for one field period, and a logical sum means for calculating the logical sum of the input signal and the output signal of this field memory. Interpolating the difference signal between frames between frames, interpolating the difference signal between one frame between fields,
This allows input signals between fields.

Motion information between frames can be accurately determined.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, I-9 are the same circuit components as in the conventional example.

11 is the output terminal of the maximum value circuit 17, 12 is the absolute value circuit 9
13 is a maximum value circuit as an OR means which receives as input the output of the absolute value circuit 9 and the output of the frame memory 12; 14 is the output of the absolute value circuit 6 and the maximum value circuit 13; 15 is a field memory that uses the output of the maximum value circuit 14 as an input; 16 is a line memory that uses the output of the field memory 15 as an input; 17 is a maximum value circuit of the maximum value circuit 14; Output and field memory 15 output and line memory 16
This is a maximum value circuit as an OR means that receives the output of .

Next, the operation will be explained. The operations of the circuit components 1 to 9 are the same as in the conventional example. The output of the absolute value circuit 9 is input to the frame memory 12. The maximum value circuit 13 selects and outputs the maximum value of the input and output of the frame memory 12. A simple example will be explained with reference to FIG. Figure 2 shows 1. An example in which a small object moves in the horizontal direction, and #1 to #4 are
Each frame number shall be indicated. Assuming that the current frame is #4, the output of the absolute value circuit 9 becomes (a) in FIG.

On the other hand, since the output of the frame memory 12 is the output of the absolute value circuit 9 one frame before, it becomes the output shown in FIG. 2(b).

Therefore, the output of the maximum value circuit 13 becomes (C) in FIG. 2, which completely supplements the motion information of #3, which is one frame before the current frame #4. The maximum value circuit 14 is the absolute value circuit 6
The maximum value of the output of the maximum value circuit 13 and the output of the maximum value circuit 13 is selected and output. In this way, the output of the maximum value circuit 14 provides interframe motion information of the input signal. However, the output of the maximum value circuit 14 lacks motion information of an object moving at a frequency higher than the frame frequency. The output of the maximum value circuit 14 is input to the field memory 15. The output of this field memory 15 is input to a line memory 16. The maximum value circuit 17 selects and outputs the maximum value of the output of the maximum value circuit 14, the output of the field memory [5, and the output of the line memory 16]. A second simple example
This will be explained with a diagram. #1 to #4 indicate each field number. Assuming that the current field is #4, the output of the maximum value circuit 14 becomes (a) in FIG. Since the input signal is subjected to carryover scanning, #l.

Since there is no information corresponding to #3, it is not possible to obtain (b) in Figure 2, but the output of the field memory 15, which is the output of the maximum value circuit 14 262H ago, and the output of the maximum value circuit 14 263H ago. At the maximum value of the output of the line memory 16, a signal corresponding to (b) in FIG. 2 can be obtained. Therefore, the output of the maximum value circuit 17 becomes (C) in FIG.
The motion information of #3, which is one field before the current field #4, can be supplemented without any omission. In this way, inter-field motion information is obtained at the output terminal 11 of the maximum value circuit 17.

〔Effect of the invention〕

As described above, according to the present invention, the difference signal between two frames is interpolated between frames, and the difference signal between one frame is interpolated between fields, so motion information between fields and frames of an input signal can be accurately obtained. This has the effect of providing a motion detection circuit that is required for.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a motion detection circuit according to an embodiment of the present invention, FIG. 2 is an explanatory diagram of its motion detection method, FIG. 3 is a block diagram of a conventional motion detection circuit, and FIG. 4 is a horizontal filter. FIG. 2.3.12 is frame memory, 6 and 9 are absolute value circuits (
13, 14, 17 are maximum value circuits (logical sum means), and 15 is a field memory. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Patent applicant: Mitsubishi Electric Corporation Figure 2 (C) (a) (b)

Claims (1)

[Claims] A motion detection circuit that digitally extracts motion information of a subject contained in an NTSC composite television signal includes a frame memory that delays an input signal by one frame period, and an output signal of the frame memory and the input signal. absolute value means for determining the absolute value of the difference between one frame of the low frequency component of the luminance signal; a frame memory for delaying the output signal of the frame memory for one frame period; Absolute value means for determining the absolute value of the difference between two frames between the high frequency component and the color signal component; a frame memory that delays the absolute value of the difference between the two frames by one frame period; A logical sum means for calculating a logical sum, a logical sum means for calculating a logical sum of the logical sum and the absolute value of the difference between one frame, a field memory for delaying the logical sum by one field period, and an input signal of the field memory. A motion detection circuit characterized in that it is provided with an OR means for ORing an output signal.