JPH0358597A - Call originating signal detecting circuit - Google Patents

Abstract

PURPOSE:To reduce the erroneous output of a call originating signal detecting signal caused by external noise by preventing addition in a double voltage rectifying circuit when signals does not continuously come during two time slots. CONSTITUTION:An info 1 signal as a fine voltage is detected by first and second comparators 2 and 3 and inputted to a double voltage rectifying circuit 4. When a voltage added by the double voltage rectifying circuit 4 is detected by a third comparator 5, the output is inputted to a time constant circuit 6 for which a time constant is reduced as much as possible at the time of charge and slightly made larger than a time constant 7TS (time slot) at the time of discharge. Accordingly, when the detection by the third comparator 5 is executed within the 7TS, the call originating signal is detected. Therefore, while the info 1 signal is inputted, the call originating signal is detected. However, when the signals does not continuously come during 2 TS, the voltage is not added in the double voltage rectifying circuit 4. Accordingly, the signal is not detected in the third comparator 5. Thus, the erroneous output of the call originating signal detecting signal caused by the external noise is reduced.

Description

[Detailed Description of the Invention] Summary] Regarding a calling signal detection circuit that detects an Info 1 signal at a network terminal (NT), an erroneous calling signal detection signal may be output due to external noise. The purpose of this is to provide a very small number of call signal detection circuits.
The output of the first comparator and the output of the second comparator have a charging time constant as small as possible and a discharging time constant of 2 time slots (hereinafter referred to as TS). ) or above to create a time constant circuit as small as possible.
The output of the voltage doubler rectifier circuit is applied to a third comparator that detects the double voltage, and the output of the third comparator has a time constant when charging. , and the time constant at the time of discharge is slightly larger than TTS, and the output of the time constant circuit is a fourth circuit that detects the output of the time constant circuit generated by inputting the Info 1 signal. , and the detection output of the fourth comparator is used as the calling signal detection output.

[Industrial application field]

The present invention relates to an improvement of a calling signal detection circuit that detects an Info 1 signal, which is a calling signal from a terminal that complies with CCITT Recommendation No. 1430 (Basic User Network Interface Layer 1 Specification), at a network termination device. .

The infol signal is defined by CCITT,
As shown in Figure 4, ITS with different polarity in 8TS period.
This is a calling signal that successively sends out one signal each.

A communication system to which this infol signal is applied is as shown in FIG.

In other words, terminal 2 that complies with CCITT recommendation number I430
The network terminal device 2l sends an Info 1 signal from the station device 20, and is supplied with power from the station device 20 to a long distance via the subscriber line, and in order to save power, the communication digital circuit is not powered on during non-calling states. It also has a calling signal detection circuit and detects the info 1 signal.

This calling signal detection circuit is preferably one that does not erroneously detect external noise as a calling signal.

[Conventional technology]

FIG. 6 is a circuit diagram of a conventional calling signal detection circuit and a diagram showing noise.

In FIG. 6(A), when the info 1 signal shown in FIG. 4 is input to the transformer 10, the output of the transformer 10 is made up of a time constant circuit composed of a capacitor C4, a resistor R4, a capacitor C5, and a resistor R5. It is input to the voltage doubler rectifier circuit l2.

In this case, the positive pulse shown in FIG. 4A is supplied via a rectifier D4 to a time constant circuit consisting of a capacitor C4 and a resistor R4 to charge it.

Further, the negative polarity pulse shown at the beginning of Figure 4 is supplied to and charged by the time constant circuit consisting of capacitor C5 and resistor R5 via rectifier D5, and becomes the voltage charged in the time constant circuit consisting of capacitor C4 and resistor R4. Added comparator 11
Enter.

In this comparison R'ill, it is necessary to output the developed call signal detection signal to which the infol signal is input. The discharge time constant is slightly larger than TTS.

Then, when the added voltage of the voltage doubler rectifier circuit l2 is input to the comparator l1, this voltage is converted to the reference voltage vr. Since it is larger than f5, a calling signal detection signal is output.

[Problem to be solved by the invention]

However, as shown in Fig. 6 (B), (C), and (D),
When a positive polarity signal or a negative polarity signal appears during 8TS, the discharge time constant of the time constant circuit of the voltage doubler rectifier circuit 12 is slightly thicker than TTS, so they are added and the comparator 1
1 reference voltage V rot5 may occur;
Comparator 11 outputs a calling signal detection signal.

That is, if such a signal is input due to external noise, an erroneous calling signal detection signal is output, so there is a problem in that an erroneous calling signal detection signal is often output due to external noise.

SUMMARY OF THE INVENTION An object of the present invention is to provide a calling signal detection circuit that is very unlikely to output an erroneous calling signal detection signal due to external noise.

[Means to solve the problem]

FIG. 1 is a circuit diagram of a calling signal detection circuit according to an embodiment of the present invention.

As shown in FIG. 1, the INFO (1) signal is applied to a first comparator 2 for detecting a positive polarity signal and a second comparator 3 for detecting a negative polarity signal via a transformer 1, The output of the first comparator 2 and the output of the second comparator 3 are made by connecting two time constant circuits in series, each having a time constant as small as possible during charging and a time constant of 2TS or more when discharging. The output of the voltage doubler rectifier circuit 4 is applied to a third comparator 5 that detects the voltage doubler, and the output of the third comparator 5 has a time constant during charging. is as small as possible, and a time constant during discharge is given to a time constant circuit 6 that is slightly larger than TTS, and the output of the time constant circuit 6 is the output of the time constant circuit 6 generated by inputting the Info1 signal. is applied to a fourth comparator 7 for detecting the signal, and the detection output of the fourth comparator 7 is set as the calling signal detection output.

[Function] According to the present invention, the Infol signal, which is a minute voltage, is detected by the first and second comparators 2.3 and input to the voltage doubler rectifier circuit 4.

Voltage doubler rectifier circuit 40 The two time constant circuits have a time constant as small as possible when charging, and a time constant as small as possible when discharging 2TS or more.
If a signal is received continuously during the interval, the signal is added, and if the signal is not received continuously during the 2TS, it is not added.

Also, when the voltage added by the voltage doubler rectifier circuit 4 is detected by the third comparator 5, the output is as follows: The time constant during charging is as small as possible, and the time constant during discharging is T.
Since it is input to the time constant circuit 6 which is slightly larger than TS, the third
If the detection by the comparator 5 is performed within 7TS, the calling signal is detected.

Therefore, while the info 1 signal is input, a call signal is detected.

However, if the signal does not arrive continuously during 2TS, the voltage doubler rectifier circuit 4 does not add the signals, so the third comparator 5 does not detect the signal.

Therefore, if a signal does not come continuously during 2TS as shown in Figure 6 (B), (C), and (D), it will not be detected as a calling signal detection, so an erroneous calling signal detection signal may be detected due to external noise. There will be very little output.

〔Example〕

FIG. 1 is a circuit diagram of a calling signal detection circuit according to an embodiment of the present invention;
2 is a sequence diagram of detection of the INFO 1 signal in the circuit of FIG. 1, and FIG. 3 is a sequence diagram of non-detection of the signal in the circuit of FIG.

In Figure 1, capacitor CI, resistor Rl, capacitor C2
, the time constant circuit consisting of resistor R2 has a time constant as small as possible when charging and a time constant of 2T when discharging.
S or above and made as small as possible.

In addition, the time constant circuit 6 shown in FIG. 1, which consists of a capacitor C3 and a resistor R3, has a time constant as small as possible during charging and a time constant slightly larger than 7TS during discharging.

Therefore, when an infol signal as shown in FIG. 2(A) is input to the transformer 1 in FIG. 1, the signal at the A section of the transformer 1 becomes as shown in FIG. v
、． , i are as shown in FIG. 2(B), so the output of comparator 2 is as shown in FIG. 2(C), and the rectifier DI,
It is applied between the output of the comparator 3 and the time constant circuit consisting of the capacitor CI and the resistor R1.

On the other hand, the signal at the lower part of the transformer l is as shown in FIG. 2(D), and the reference voltage Vr=r2 of the comparator 3 is as shown in FIG. 2(D).
Therefore, the output of comparator 3 is as shown in Fig. 2 (E).
As shown in , rectifier D2 capacitor C2, resistor R2
A time constant circuit is applied to the output of the comparator 2.

In this case, the voltage between a and b of the voltage doubler rectifier circuit 4 becomes as shown in FIG.
The voltage between d is as shown in Figure 2 (G), and the voltage between a and d of the voltage doubler rectifier circuit 4 is as shown in Figure 2 (H) with the voltages shown in (F) and (G) added. Since the reference voltage v ref 3 of the comparator 5 is as shown in FIG. 2 (H), the comparator 5 detects the added voltage,
The output is applied to the time constant circuit 6, and the time constant circuit 6 c,
As shown in FIG. 2(1), the voltage between the comparator 7's reference voltages v, . t exceeds 5.

Therefore, as shown in FIG. 2 (J), the output of the comparator 7 indicates that it is detected at H level while the Info I signal is input.

Next, the case where a signal is input that is close to the Info 1 signal but is separated from the input signal by more than lTS will be explained using FIG.

When a signal as shown in FIG. 3(A) is input, the transformer l
The signal at part A of is as shown in Fig. 3 (B), and the signal of
Reference voltage vr. Since f l is as shown in FIG. 3(B), the output of comparator 2 is as shown in FIG. 3(C), and the time constant circuit consisting of rectifier Dl, capacitor CI, and resistor R1. It is applied between the outputs of comparator 3.

On the other hand, the signal at the mouth of the transformer l is as shown in FIG. 3(D), and the reference voltage V r-r 2 of the comparator 3 is as shown in FIG.
D), the output of comparator 3 is as shown in FIG.
As shown in E), the voltage is applied between the time constant circuit consisting of the rectifier D2, the capacitor C2, and the resistor R2, and the output of the comparator 2.

In this case, the voltage between a and b of the voltage doubler rectifier circuit 4 becomes as shown in FIG. 3(F), and the voltage between b and d of the voltage doubler rectifier circuit 4 becomes
The voltage between a and d of the voltage doubler rectifier circuit 4 is as shown in FIG.
The voltage between them is as shown in FIG. 3 (11), which is smaller than the reference voltage Vref3 of the comparator 5, and the output of the comparator 5 is L.
Therefore, the voltage between c and d of the time constant circuit 6 is the reference voltage V r of the comparator 7, as shown in FIG. 3 (1).
Since it is smaller than ef4, the output of comparator 7 is as shown in Fig. 3 (J).
As shown in the figure, a call signal is not detected at L level.

In the case of Fig. 3, the case where positive polarity signals and negative polarity signals are input alternately was explained, but in this case, one polarity signal is lT
If the input signals are separated by S or more, the voltage doubler rectifier circuit 4 will not add them, and the result will be the same.

Therefore, erroneous detection with a calling signal due to noise can be greatly reduced.

〔Effect of the invention〕

As explained in detail above, according to the present invention, there is an effect that the output of an erroneous call signal detection signal due to external noise is greatly reduced.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of a calling signal detection circuit according to an embodiment of the present invention, Fig. 2 is a sequence diagram of Info1 signal detection in the circuit of Fig. Figure 4 is a diagram showing the Info 1 signal; Figure 5 is a block diagram of an example communication system to which the Info 1 signal is applied; Figure 6 is a diagram of a conventional call signal detection circuit. FIG. 3 is a diagram showing a circuit diagram and noise. In the figure, 1.10 is a transformer, 2, 3.5, 7.11 are comparators, 4, l2 are voltage doubler rectifier circuits, 6 is a time constant circuit, 20 is a station equipment, 21 is a line termination circuit, 22 is the terminal, V r-t l ”” V-t 5 is the reference voltage, C1 to C
5 is a capacitor, lkTs*BJ --L-L11-8TS 1l Infus 1's I also shows 4 now.

Claims (1)

[Claims] When detecting an Info 1 signal, which is a calling signal that continuously sends out one time slot signal with a different polarity in an 8 time slot period, the Info 1 signal is
A first circuit that detects a positive polarity signal via a transformer (1).
and a second comparator (3) that detects a signal of negative polarity, the output of the first comparator (2) and the output of the second comparator (3). The time constant during charging is as small as possible, and the time constant during discharging is given to a voltage doubler rectifier circuit (4) having two time constant circuits in series with two or more time constants as small as possible, and the voltage doubler rectifier circuit The output of (4) is given to a third comparator (5) that detects the voltage doubler, and the output of the third comparator (5) is as follows: The time constant during charging is as small as possible, and the time constant during discharging is as small as possible. The constant is given to a time constant circuit (6) that is slightly larger than 7 time slots, and the output of the time constant circuit (6) detects the output of the time constant circuit (6) that is generated when the Info 1 signal is input. The fourth comparator (
7), and the detection output of the fourth comparator (7) is used as a calling signal detection output.