JPH0357387A - Picture signal reproducing device - Google Patents

Abstract

PURPOSE:To accurately reproduce a picture signal by building up picture signals by one pattern which are recorded separately onto tracks of a magnetic disk again on a memory and reading the picture signal in the memory synchronously with an accurate clock without time axis fluctuation. CONSTITUTION:A picture signal reproduced from a magnetic disk 1 is stored once in a memory 8 synchronously with a clock signal including time axis fluctuation caused at the reproduction. Then picture signals by one pattern stored on 4 tracks separately on the magnetic disk 1 are built up again in the memory 8. Moreover, the memory 8 is used to apply cyclic noise reduction processing and interpolation processing. Then an accurate clock signal without time axis fluctuation is read. Thus, random noise and time axis fluctuation caused in the reproduced picture signal at the reproduction are eliminated without extension of the picture memory 8 and the picture signal recorded on the magnetic disk is reproduced without deterioration.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image signal reproducing device for reproducing image signals recorded on a recording medium.

[Conventional technology]

Conventionally, there is a still video (hereinafter referred to as Sv) system as a recording and reproducing device for still image signals.

This Sv system records the current TV signal on a 2-inch magnetic disk by FM modulating it. The image resolution achieved by this system is only comparable to that of the current TV system. However, in systems that handle still images, such as the Sv system, the final output may be printed out by a printer, and in that case, the problem is that the image quality (especially resolution) is lower than that of silver halide photography. There is.

On the other hand, recently HDTV (High Definition)
New TV systems such as tionTV) are being considered.
Among these, the HDTV system has approximately 1,000 scanning lines, which is approximately twice as many as the current NTSC system, and has a corresponding horizontal signal band. Therefore, even in the S system, the IOOO that can be obtained with HDTV etc.
XIOOO pixels (when a square screen is extracted)
It has become essential to develop a still image recording and reproducing system with a certain level of image quality.

In view of this situation, in the S■ system, the recording format for the recording medium is made high-band (broadband). However, when viewed as an SV system, high image quality must be achieved while maintaining compatibility with conventional systems to some extent.

Therefore, as a method for achieving high image quality while maintaining compatibility with conventional systems, the applicant proposed the CHSV method (C
Compatible High Definity
on SV).

An outline of the CHSV method will be described below.

First, a method for recording a luminance (Y) signal based on the CHSV method will be described. FIG. 5 shows sample points of the Y signal recorded based on the CHSV method. The sample points of the Y signal are subsampled, for example, at a sampling period Ts so as to be offset as shown in the figure. 650 sample points in one row (1300/2)
, and there are 500 (1000/2) in one line. Then, the sample values included in the line AI+A2+... in the figure are stored in one track on the magnetic disk as B,,B2,...
All sample values are recorded using a total of four tracks, such that the sample values included in the lines . Furthermore, recording is performed on each track in accordance with the format of the conventional SV system.

Next, the reproduction method will be described. FIG. 6 shows a schematic configuration of a playback device based on the CHSV method. A signal reproduced by a magnetic head 1 502 from a magnetic disk 1 501 as a recording medium is amplified by a reproduction amplifier 1503 and then input to an SV reproduction process circuit 1 504 . Here, separation of the luminance signal Y and the color difference line sequential signal C, FM demodulation, de-emphasis, etc. are performed, and the reproduced Y signal and the reproduced C
A signal is output. Then, these two signals are γ-inverted in a γ-inverter 1506 or 1507, and L
After being band limited by PF1508 or 1509, analog-to-digital (A/D) converter 151 respectively
3 or 1514 and is input to the image memory. The sampling clocks in the A/D converters 1513 and 1514 extract a pilot signal that has been frequency multiplexed in advance from the signal reproduced from the magnetic disk 1501 using a bandpass filter (BPF) 1505 during recording. This clock is generated by sampling clock generation circuits 1511 and 1512 using the synchronization signal separated in synchronization by the synchronization separation circuit 1510.

The above process is performed on the four tracks on the magnetic disk 1501, and the A/D converter 1513. 1514
The sample data output from the address generator 151
7. Image memory l515 specified by 1518
It will be stored at the above address. And image memory 151
The image processing circuit 1 uses the sample data stored in 5.
After performing interpolation processing etc. using 516, the high components of the Y signal (
YH), low frequency component of Y signal (YL), color difference signal (CRT
CB), and YL, CR, CF3 are supplied to the matrix circuit I519 as shown in the figure, and after being converted into three primary color signals (RLI G LI B L),
Adders 1520 and 1521 add the high frequency component (YH) of the Y signal.
．． 1522 and digital-to-analog (D/A) converters 1523, 1524, 1
．． 525, it is converted into an analog signal and output as an RGB signal.

The above is the reproduction process. Next, the analog transmission of sample values performed in the CHSV method will be described.

FIG. 7 shows a conceptual diagram of a CHSV transmission system.

As shown in the figure, the input analog signal is sampled at a period T. Then, the sample value is band-limited, FM modulated, and recorded on a magnetic disk.

Then, the signal reproduced from the magnetic disk is FM demodulated, band-limited, resampled, and a sample value signal as shown in FIG. 7 is output.

In analog transmission of sample values, it is extremely important that the time axis of the sampling pulse be transmitted without fluctuation. FIG. 8 shows an explanatory diagram illustrating the importance of the time axis of the sampling pulse. Consider a case where a sample value sequence obtained by sampling with a period T, as shown in FIG. 2(a), is recorded and reproduced. The transmission line consisting of the FM modulation/demodulation and electromagnetic conversion system exhibits LPF characteristics, and the transmission line output signal is as shown in FIG. 2(b). The period of this signal is T, which is the same as the sampling pulse at the time of input as shown in the same figure (C),
If the sample is resampled using a sampling pulse having the correct phase, the original input sample value sequence can be restored as shown in FIG. 2(d).

However, if the reproduced sampling pulse is out of phase as shown in FIG. 2(e), a sample value sequence as shown in FIG. 2(f) is output, and the sample value sequence is not reproduced correctly and ringing occurs. Furthermore, it goes without saying that the data will not be played back correctly even if the sampling period is different.

Therefore, during reproduction, a resampling pulse with the correct frequency (period) and correct phase is required. There is also one more condition for completely transmitting sample values. This is because the transmission path characteristics are linear phase (group delay flattened) and the amplitude characteristics are symmetrical roll-off characteristics centered on the frequency of fs (= 1/2T).
The characteristics shown in the figure are required.

[Problem that the invention seeks to solve]

By the way, in the reproducing apparatus based on the above-mentioned CHSV method, by providing a cyclic noise reduction circuit or the like having a field memory in order to reduce the noise component generated during reproduction of the image signal reproduced from the magnetic disk, It becomes possible to obtain even higher quality images.

However, as shown in FIG. 6, the playback device based on the CHSV system is already equipped with four field memories, and in addition, it is equipped with a cyclic noise reduction circuit that requires the expensive field memory described above. Providing such a device increases hardware and cost, which is a major obstacle in reducing the size, weight, and cost of the device.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and to provide an image signal reproducing device that can obtain high-quality reproduced images while reducing the size, weight, and cost of the device.

[Means to solve the problem]

An image signal reproducing apparatus of the present invention is an apparatus for reproducing an image signal recorded on a recording medium, and includes a reproducing means for repeatedly reproducing the image signal recorded on the recording medium;
A conversion means for digitizing and outputting the image signal reproduced by the reproduction means, a storage means for storing the digital image signal output from the conversion means, and a change in the digital image signal output from the conversion means. If the amount is smaller than a predetermined value, after performing noise removal processing on the digital image signal output from the converting means using the digital image signal stored in the storage means,
a control means for storing in the storage means, and storing the digital image signal in the storage means without performing noise removal processing if the value is larger than the predetermined value; and an interpolation process for interpolating the digital image signal stored in the storage means. It is equipped with means.

[Effect]

According to the above configuration, it becomes possible to remove noise from an image signal reproduced from a recording medium and perform interpolation processing with a simple configuration.

〔Example〕

Hereinafter, the present invention will be explained using one embodiment of the present invention.

FIG. 1 is a diagram showing a schematic configuration of an embodiment of the present invention in which the present invention is applied to a reproducing apparatus for an electronic still video system based on the CHSV system.

In FIG. 1, a signal reproduced from a magnetic disk l by a magnetic head 2 is amplified by a reproduction amplifier 3, and then
The signal is input to the Sv regeneration process circuit 4.

Here, separation of luminance signal Y and color difference line sequential signal C, FM
Demodulation, de-emphasis, etc. are performed, and a reproduced Y signal and a reproduced C signal are output.

Then, the two signals processed as described above are subjected to γ inverse transformation in γ inverse transformers 5a and 5b, and are subjected to γ inverse transformation through a low-pass filter (
After being band-limited by LPFs 6a and 6b, the signals are digitized by analog/digital (A/D) comparators 7a and 7b, respectively, and supplied to an image memory 8.

A. The clock signals in the D converters 7a and 7b are obtained by extracting a pilot signal, which is frequency-multiplexed during recording, from a reproduced signal reproduced from the magnetic disk 1 using a bandpass filter (BPF) 9, and filtering the pilot signal and the synchronization separation circuit lO. The clock signal generator 11a, 1]. The evening lock signal generator 11a11l] outputs a clock signal having the same time axis fluctuation as the image signal reproduced from the magnetic disk l and having the same time axis fluctuation. 7a, 7b, memory control circuit 1
The memory control circuit 12 sends the digital Y signal and digital C signal output from the A/D converters 7a and 7b to the image memory 8 in synchronization with the clock signals supplied from the clock signal generators 11a and llb. Remember.

Writing of digital image signals into the image memory 8 and noise reduction processing using the image memory 8 will be described below with reference to FIGS. 2 to 4.

FIG. 2 is a two-dimensional representation of the digital image signal stored in the image memory 8.
The digital image signals supplied from the D converters 7a and 7b are stored every other sample in the address corresponding to the circle mark in FIG. 2 of the image memory 8 (step S1 in FIG. 4).
reference).

Then, when the digital image signal for one screen is stored in the image memory 8, the memory control circuit 12 outputs the digital image signal D( a+1) as b+ in Figure 3,
The image is sequentially moved to the address on the image memory 8 shown by , that is, to an adjacent address in the horizontal direction. Note that the digital image signal after movement is assumed to be D(bt,) (step S in Fig. 4).
(see 2).

Then, when the movement of digital image signals on the above-mentioned image memory 8 is completed, the memory control circuit 12 controls the A/D
The digital image signals for the next one screen supplied from the converters 7a and 7b are converted to a. Image memory 8 indicated by
It is stored at the above address (see step S3 in FIG. 4).

Then, when the digital image signals for two screens are stored in the image memory 8, the memory control circuit 12
+i, a(nz+1) The digital image signal D(a
+1). +D (reads ao+2++l and supplies it to the difference value calculation circuit 13, and the difference value calculation circuit 13 uses the supplied digital image signal to calculate D iaa+2++
The calculation 1-D(a++)=ΔD is performed and the calculation result ΔD is supplied to the discrimination circuit 14 (see step S4 in FIG. 4).

The discrimination circuit 14 compares the calculation result ΔD supplied from the difference value calculation circuit l3 with the threshold value S, and determines the Takagi frequency among the digital image signals stored at the address a1 in FIG. 3 of the image memory 8. detecting a digital image signal having components; That is, when the calculation result ΔD supplied from the difference value calculation circuit 13 is larger than the threshold value S, a'I + a (1+2) in FIG.
It is determined that the digital image signal stored at the address indicated by ] has a Takagi frequency fraction, and a detection pulse is output to the subsequent arithmetic circuit l5. When the arithmetic result ΔD is smaller than the threshold value S, a. of FIG. 3 of the image memory 8; )
+ a (i+2) It is determined that the digital image signal stored at the address indicated by + does not have the Takagi frequency distribution, and no detection pulse is output to the arithmetic circuit 15.

In synchronization with the discrimination operation of the discrimination circuit 14, the arithmetic circuit 15 reads out the digital image signal stored in the image memory 8 at the address indicated by ail, b11 in FIG. 3, and is supplied with a detection pulse from the discrimination circuit 14. At times, the digital image signal D(al.) read from the address indicated by aii in FIG. image memory 8a l)
, b The average value of the digital image signal read from the address of I+ [D (a+1) + D (bii
)]/2 as D(b+t), bl of image memory 8
1 (see steps 85 to S7 in FIG. 4).

As described above, digital image signals for two screens are sequentially stored in the image memory 8, and among the digital image signals for one screen stored later, arithmetic processing is performed on signals that do not have the Takagi frequency distribution. Then, the memory control circuit 12 increments the count value n of an internally provided counter, and the memory control circuit 12 increments the A/D converter 7 until the count value of the counter reaches a preset value N.
The digital image signals output from a and 7b are stored in the image memory 8 at the address indicated by a+i in FIG. 3, and subjected to the arithmetic processing described above (see steps S8 and S in FIG. 4).

In this way, among the digital image signals stored in the image memory 8, signals having a high frequency component are not subjected to arithmetic processing, and signals not having a Takagi frequency component are already stored in the image memory. By calculating the average value of the digital image signal and the corresponding signal, noise reduction processing is performed to reduce the generated random noise on the signal of the part of the digital image signal that does not have the Takagi frequency component. It's going to happen.

After the noise reduction processing is performed as described above, the digital image signal stored at the address b+1 in FIG.
After moving to the address indicated by ail in the figure, that is, the address indicated by the circle in Figure 2 (see step 3-10 in Figure 4), the interpolation processing circuit 16 moves to the address indicated by the circle in Figure 2 in the image memory 8. Address (i.e. a l+ in Figure 3)
) is used to form a digital interpolated image signal corresponding to the x mark in FIG. 2, and is stored in b+1 of the image memory 8 (see step S in FIG. 4).

When the storage of the digital image signal and the digital interpolated image signal in the image memory 8 is completed as described above, the memory control circuit 12 puts the image memory 8 into the read state, and outputs an accurate signal without time axis fluctuation from the clock signal generator l7. Based on the clock signal, the digital image signal and the digital interpolation image signal stored in the image memory 8 are converted into the Takagi component of the Y signal (YH) and the low frequency component of the Y signal (Y'L).
), read out in a state where they are separated into two types of color difference signals (CRICa), and YL, CR, and CB are supplied to a matrix circuit 18, where they are converted into three primary color signals (RLIBLI GL). After that, the R
YH read from the image memory 8 is added to L, BL, and GL in adders 19a, 19b, and 19c, and digital/analog (D/A):1 inverters 20a, 20
Analog three primary color signals (R, G
, B) and output.

As explained above, in the present invention, an image signal reproduced from a magnetic disk is temporarily stored in a memory in synchronization with a clock signal that includes time axis fluctuations that occur during reproduction. reconstructing on the memory image signals for one screen divided and recorded on the tracks of the book;
Furthermore, after performing cyclic noise reduction processing and interpolation processing using the memory, the image memory is read out in synchronization with an accurate clock signal with no time axis fluctuation. To remove random noise and time axis fluctuations generated in a reproduced image signal during reproduction without adding any additional equipment, and to accurately reproduce the image signal recorded on a magnetic disk without deteriorating it.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to provide an image signal reproducing device that can obtain high-quality reproduced images while reducing the size, weight, and cost of the device. become.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a schematic configuration of an embodiment of the present invention in which the present invention is applied to a recording and reproducing apparatus for an electronic still video system based on the CHSV system. FIG. 2 is a two-dimensional representation of the digital image signal stored in the image memory shown in FIG. FIG. 3 is a two-dimensional diagram showing addresses of the image memory shown in FIG. 1. FIG. 4 is a flowchart showing the operational procedure of writing a digital image signal into the image memory shown in FIG. 1 and performing noise reduction processing using the image memory. FIG. 5 is a diagram showing the sample point arrangement of a luminance signal in the CHSV method. FIG. 6 is a diagram showing a schematic configuration of a playback device for an electronic still video system based on the CHSV method. FIG. 7 is a diagram showing a system for analog transmission of sample values. FIG. 8 is a diagram showing the relationship between the sampling clock and the output signal. FIG. 9 is a diagram showing low-pass filter characteristics exhibited by a transmission line for analog transmission of sample values. l・・・・・・・・・・・・Magnetic disk 7a, 7
b・・・・・・・・・...A/D converter 8...
・・・・・・・・・・・・Image memory 9・・・・・・・・・
・・・・・・・・・・・・BPF10・・・・・・・・・
...Synchronization separation circuit 11a, llb, 17
...Clock signal generator l2...
...Memory control circuit l3...
Difference value calculation circuit 14...Discrimination circuit l5......Arithmetic circuit l6...・・・・・・Interpolation processing circuit Figure 2 Figure 3

Claims (1)

[Scope of Claims] An apparatus for reproducing an image signal recorded on a recording medium, comprising: reproducing means for repeatedly reproducing the image signal recorded on the recording medium; and an image signal reproduced by the reproducing means. converting means for digitizing and outputting the digital image signal; storage means for storing the digital image signal output from the converting means; when the amount of change in the digital image signal output from the converting means is smaller than a predetermined value; The digital image signal stored in the storage means is used to perform a noise removal process on the digital image signal output from the conversion means, and then stored in the storage means, and if it is larger than the predetermined value, An image signal reproducing device comprising: a control means for storing the digital image signal in the storage means without performing noise removal processing; and an interpolation processing means for interpolating the digital image signal stored in the storage means.