JPH0356023B2 - - Google Patents

Info

Publication number
JPH0356023B2
JPH0356023B2 JP58252225A JP25222583A JPH0356023B2 JP H0356023 B2 JPH0356023 B2 JP H0356023B2 JP 58252225 A JP58252225 A JP 58252225A JP 25222583 A JP25222583 A JP 25222583A JP H0356023 B2 JPH0356023 B2 JP H0356023B2
Authority
JP
Japan
Prior art keywords
digital
analog
signal
input
switcher
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58252225A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59131227A (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS59131227A publication Critical patent/JPS59131227A/ja
Publication of JPH0356023B2 publication Critical patent/JPH0356023B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01806—Interface arrangements
    • H03K19/01812—Interface arrangements with at least one differential stage

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Analogue/Digital Conversion (AREA)
JP58252225A 1982-12-27 1983-12-27 スイッチャ装置 Granted JPS59131227A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/453,002 US4525836A (en) 1982-12-27 1982-12-27 Circuit for converting a logical signal into two balanced logical signals
US453002 1982-12-27

Publications (2)

Publication Number Publication Date
JPS59131227A JPS59131227A (ja) 1984-07-28
JPH0356023B2 true JPH0356023B2 (en:Method) 1991-08-27

Family

ID=23798835

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58252225A Granted JPS59131227A (ja) 1982-12-27 1983-12-27 スイッチャ装置

Country Status (2)

Country Link
US (1) US4525836A (en:Method)
JP (1) JPS59131227A (en:Method)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE114098T1 (de) * 1990-05-16 1994-11-15 Siemens Ag Digitalschaltung mit potentialausgleich zwischen zwei signalleitern.
US5347549A (en) * 1993-04-20 1994-09-13 Echelon Corporation Method and apparatus for interfacing between a twisted pair and an intelligent cell
JP4197755B2 (ja) 1997-11-19 2008-12-17 富士通株式会社 信号伝送システム、該信号伝送システムのレシーバ回路、および、該信号伝送システムが適用される半導体記憶装置
US6982763B2 (en) * 2001-08-01 2006-01-03 Ge Medical Systems Global Technology Company, Llc Video standards converter

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2936337A (en) * 1957-01-09 1960-05-10 Bell Telephone Labor Inc Switching circuit
US3573635A (en) * 1968-11-18 1971-04-06 Ibm Pulse transfer system
US4037049A (en) * 1974-10-18 1977-07-19 Intertel, Inc. Modulator and demodulator for data communications network
JPS5543654A (en) * 1978-09-25 1980-03-27 Hitachi Ltd Transmission/reception control circuit
JPS56119531A (en) * 1980-02-26 1981-09-19 Fujitsu Ltd Level converting circuit

Also Published As

Publication number Publication date
US4525836A (en) 1985-06-25
JPS59131227A (ja) 1984-07-28

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