JPH0354814A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve the accuracy of mask alignment for a buried layer formed in a semiconductor substrate partially by a method wherein an infrared beam is applied onto the main surface of the semiconductor substrate and the reflective image of the buried layer obtained by the beam application is detected and used as the reference for the mask alignment. CONSTITUTION:An epitaxial semiconductor layer 4 is formed on a semiconductor substrate 1. Then a buried layer 2 which has higher impurity concentration than the layer 4 is partially formed between the substrate 1 and the layer 4. An infrared beam is applied onto the main surface of the substrate 1 and a reflective image 7 obtained by the beam application is used as the reference for mask alignment. After that, impurity is selectively introduced into the surface of the layer 4 by using the mask to form a semiconductor region. With this constitution, even if there is slack or discrepancy in the upper layer, the layer 2 can be recognized directly, and thereby the accuracy of mask alignment for the layer 2 can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to mask alignment technology in manufacturing semiconductor devices.

[Background technology] In the manufacturing process of bibolar IC, substrate (
A highly concentrated impurity is diffused to form a buried layer on the surface of a substrate (semiconductor) through an oxide film mask, and a semiconductor layer is formed on top of it by epitaxial growth.A mask is used on the surface of this epitaxial semiconductor layer. Various semiconductor elements are formed by selective diffusion, and mask diffusion is performed with reference to the position of the buried diffusion layer. Conventionally, when determining the position of this buried layer, as shown in FIG. Taking advantage of the fact that it appears as a secondary recess 5 in the
Arrow 6) is detected and used as a reference for the buried layer position.

However, in the above method, depending on the direction of the crystal axis of the substrate 1 during the epitaxial growth process, for example (1
11) Since the semiconductor layer is elongated in an oblique direction by using a crystal plane that is tilted by about 10 degrees from the crystal plane, the position of the secondary recess on the surface of the epitaxial layer 4 is caused by buried diffusion N2.
There is also a "sag" from the position of the epitaxial layer, and there is also a "sagging" of the secondary recess due to the epitaxial layer, so the position of the "slip" etc. is used as a reference. As a result, when forming a junction lIi layer (isolation) that connects the epitaxial layer surface to the substrate, in extreme cases due to misalignment of the reference position, the isolation layer comes abnormally close to the buried layer, and sometimes overlaps. This may cause isolation breakdown voltage failure. If such overlap was avoided and the separation layer was designed to be separated from the buried layer, miniaturization of the bibolar IC would be impaired.

It is also known to utilize a stacking fault pattern as a mark for mask alignment, as disclosed in Japanese Patent Laid-Open No. 53-47764.

In this case, defects are left in the epitaxial layer, which is not very preferable.

[Object of the Invention] The object of the present invention was to solve the above-mentioned problems, and the object is to improve the accuracy of mask alignment with the buried diffusion layer, and to achieve high integration and reliability of semiconductor devices. The goal is to sexualize it.

[Summary of the Invention] The present invention is characterized by comprising a substrate, an epitaxial semiconductor layer formed thereon, and a buried layer having an impurity concentration higher than the impurity concentration of the epitaxial semiconductor layer between them. A step of preparing a partially shaped semiconductor substrate, a step of projecting an infrared ray onto the principal surface of the semiconductor substrate, detecting a reflected image of the buried layer and using it as a reference for mask alignment; This process consists of forming a semiconductor region by selectively introducing impurities into the main surface of the semiconductor using a mask.

Infrared light passes through semiconductor crystals, and optical properties such as transmittance differ depending on the impurity concentration. For this reason,
The buried layer portion can be recognized as a prominent reflected image.

The present invention will be described in detail below with reference to Examples.

[Example 2] As shown in FIG. 2, a preferred embodiment of the present invention includes an epitaxial semiconductor layer formed on a semiconductor substrate 1, and a buried expansion layer 2 buried between the substrate layer and the semiconductor N4. In detecting the position of the mask, the reflected image 7 of the buried diffusion layer obtained by projecting an infrared ray onto the surface of the epitaxial layer is used as a reference for mask positioning.

Normally, in the bibolar IC manufacturing process, the impurity concentration of the buried diffusion layer is several orders of magnitude higher than the concentration of the substrate or epitaxial layer. For example, if the concentration of the substrate is 1014~101sato
ms/a+? , concentration of epitaxial layer 1 013~1
The concentration of the buried layer is 10” for 0”atoms/cJ.
~10" atoms/cm. On the other hand, infrared light passes through semiconductor crystals such as Si, and optical properties such as transmittance differ depending on the impurity concentration. Therefore, the epitaxial When the buried diffusion layer is observed from the surface of the epitaxial layer using an infrared microscope or the like after a long period of time, under appropriate conditions, for example, when infrared light is projected, a portion of the buried diffusion layer is observed as shown by diagonal hatching A in Figure 3. After completing the mask alignment, a semiconductor region is formed by selectively introducing impurities into the surface of the epitaxial layer using a mask. This is the outline of the secondary concave portion of the buried layer formed in Figure A, and shows that it deviates greatly from A.

Figure 4 shows the basic structure of an infrared microscope for mask aligners for performing the mask alignment method according to the present invention.6 In the same figure, 1 is a semiconductor substrate that is a sample, and 2 is an embedded diffusion that is an object of recognition. layer 4 is an epitaxial layer 68
9 is an infrared light source (lamp), 9 is a half mirror, 10 is an objective lens, and l1 is an eyepiece lens. Infrared light emitted from a light source 8 is projected onto the epitaxial layer 4 via a mirror,
The reflected light from the buried layer 2 is projected through the lens 10.11 and R
The position of the buried layer is determined by moving the microscope relative to the sample.

Due to certain epitaxial length conditions, the shape of the buried diffusion layer may sag or shift when propagating to the upper layer, so the conventional method of determining the position of the buried diffusion layer from the shape of the surface of the epitaxial layer had a limit in accuracy. In the case of the present invention, the buried and buried diffusion layers can be directly recognized even when there is sagging or misalignment, so it is possible to dramatically improve the accuracy of mask alignment with respect to the buried diffusion layer.

[Effects (1) Isolation defects caused by sag or misalignment of the epitaxial layer are eliminated.

(2) Further miniaturization of bipolar ICs becomes possible.

[Field of Application] The present invention is effective in cases where the epitaxial layer has large sag or misalignment, for example, in semiconductor devices and thick film devices that use a crystal plane tilted by about 1 to 10 degrees from the (111) crystal plane as the main surface. It can be applied to all semiconductor devices such as bibolar ICs having buried diffusion layers and ICs including junction field effect transistors.

[Brief explanation of drawings]

Figure ↑ is a cross-sectional view showing the form of a semiconductor device in the conventional mask alignment method, Figure 2 is a cross-sectional view showing the form of a semiconductor device in the mask alignment method according to the present invention, and Figure 3 is a plan view thereof. , FIG. 4 is a sectional view showing the basic structure of an infrared microscope used in the mask alignment method according to the present invention. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Buried diffusion layer, 3... Recessed part, 4... Epitaxial layer, 5... Secondary recessed part, 6
, 7... Image, 8... Infrared lamp, 9... Mirror.
10.11...Figure 1 Figure 3 Figure 4

Claims (1)

[Claims] 1. A step of preparing a semiconductor body in which a substrate, an epitaxial semiconductor layer formed thereon, and a buried layer having an impurity concentration higher than the impurity concentration of the epitaxial semiconductor layer are partially formed between them; A step of projecting an infrared ray onto the main surface of the semiconductor substrate, detecting the reflected image of the buried layer and using it as a reference for mask alignment, and then selectively introducing impurities into the main surface of the semiconductor using a mask. 1. A method for manufacturing a semiconductor device, comprising the steps of: forming a region.