JPH0353601A - Sinusoidal wave oscillation circuit - Google Patents

Abstract

PURPOSE:To obtain a sinusoidal wave with high accuracy by correcting a sample of a sinusoidal wave signal obtained by a delay circuit and a complex number multiplier circuit and inputting the result to a delay circuit. CONSTITUTION:An output of a complex number multiplier circuit 2 is expressed on a coordinate (Xn, Yn) on a real coordinate X and an imaginary number coordinate Y and correction is applied to the power of the output so as to be expressed on a setting power (on a circle). A real part (Xn) and an imaginary part (Yn) of an output value of the complex number multiplier circuit 2 and an output of a correction value generating circuit 5 are multiplied by a multiplier 6 to correct the output of the complex number multiplier circuit 2 to comes on a value of the circle in figure. A delay circuit 1 retards an output of the multiplier 8 and the result is used as the succeeding input to the complex number multiplier circuit 2. Thus, a sinusoidal wave is oscillated with high accuracy.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a sine wave oscillation circuit, and more particularly to a sine wave oscillation circuit used in modulation modulation devices and the like.

[Traditional technique]

Conventionally, the sine wave oscillation circuits in this building include circuits that oscillate sine t& using analog processing and circuits that oscillate sine waves using digital processing.

Analog processing uses an oscillator to oscillate a sine wave.

Digital processing is performed at the sampling rate during modulation and demodulation. For example, a modulation/demodulation device based on V33 of the CCITT recommendation processes a baud rate of 2400 baud and a sampling rate of 9600 Hz. Since the sine wave oscillation circuit of this modulator/demodulator has a sampling rate of 9600 Hz, sine wave sample values of the carrier frequency are obtained every 1/9600 Hz.

There are three main methods for oscillating sine waves using digital processing. The first method is to store the sine wave as data in memory and extract the data at each sampling rate.The second method is to expand the sine wave into a series and calculate it (see formula-1). The method is to directly measure the amplitude value of the sine wave in the complex domain (see formula-2).
(See Murano et al. p.25-p.27).

s in (X)=X-X"/3 1 +X'/5
1 -X' /7 1 (1) sin(X)
=Re(-jexp(X))
(2) X=2xnfH/fs rl is an integer fi
Fi carrier frequency f5 is sampling frequency Re (.) is the real number part.

[Problem to be solved by the invention]

If the conventional sine wave oscillation circuit described above is realized by digital signal processing, the method of storing data in the memory 17 requires a large amount of memory, which imposes restrictions on the use of the memory for other processing.

Next, in the series expansion method, the number of multiplications increases as the value of X increases, so there is a risk that other processing times will not be in time. 1. In addition, the method of directly oscillating a sine wave using complex operations involves calculating (Equation 2) and (Equation 3), but the phase shift amount (ex
p(jJθi)] is repeated several times, the data before the phase shift includes an error in bit precision, and the absolute error gradually increases.

exp(X)==exp(j n jθl)=ex
p(j(n-l)jθi) ・exp(j”i)
(3) [Means for solving the problem] The sine wave oscillation circuit of the present invention includes a delay circuit that temporarily delays a sample value of a sine wave signal, and an output of the delay circuit and a predetermined phase change amount expressed by a complex number. and a correction means for correcting the output of the complex multiplication circuit and outputting a sample value of the sine wave signal.

The correction means includes a power detector that obtains the power of the output of the &accumulator multiplication circuit, a correction detection circuit that compares the output of the power extractor with a predetermined setting {Il1 power, and the correction value detection circuit. A corrected Buddha-generating circuit which inputs the output of
! It is also possible to obtain the output from a multiplier that multiplies the output of the calculation program and other outputs.

The correction means includes a positive value generation circuit inputting the output of the & exponentiation jIIil2l path, and the complex multiplication lg
A sign determiner that determines the sign of each of the real iron part and the imaginary part of the output b of J Ayu; a multiplier that multiplies the output of this sign determiner by the output of the niJ correction value circuit; and this multiplier. and an adder that adds the output value of the complex multiplication circuit and the output of the complex multiplication circuit.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a schematic diagram of a first embodiment of the present invention.

The complex multiplication circuit 2 performs complex multiplication of the phase shift amount ej' and the output of the delay circuit 1 (here, A is the phase amount that changes with the sunfling rate). By repeating this process b, a sine wave is obtained. Up to this point, it is the same as a conventional sine wave oscillation circuit.

The power detector 3 is a circuit that calculates the power of the output value of the complex multiplication circuit 2. The correction value detection circuit 4 is a circuit that compares the output value of the power detector 3 and the set value power. The correction value generation circuit WI5 sequentially varies the correction value (real number) according to the output of the correction value detection circuit 1N14, and is a circuit that generates a correction value to return the output value of the complex multiplier circuit 2 to the set value. be. For example, in Figure 2, the real coordinate X and the imaginary coordinate Y
Let the output of the complex multiplication circuit 2 be the housing coordinates (Xn, Yn)
shall be. A correction value is determined so that this power becomes the set value power (on a circle). The multiplier 6 receives the real part (Xn) of the output value of the complex multiplication circuit 2. The imaginary part (Yn) is multiplied by the output value of the correction value generation circuit 5. As a result, the output of the complex multiplication circuit 2 is corrected to be on the circle of the fpJz diagram.

The delay circuit 1 delays the output value of the multiplier 6 and uses it as input to the next complex multiplication circuit 20.

FIG. 3 is a block diagram of a second embodiment of the invention.

The complex multiplication circuit 2 performs complex multiplication of the phase shift amount ej'' and the output of the delay circuit 1 (here, A is the phase amount that changes with the sampling rate). By repeating this process, the sine wave is Here, 1 is equivalent to a conventional sine wave oscillation circuit.

In order to return the output of the complex multiplier circuit 2 to the ideal value shown in FIG. 4, the correction circuit 7 generates a correction value for the real part and a correction value for the imaginary part so that it falls between the inner and outer circles. This is the place to do it. For example, in Fig. 4, the output of the complex multiplication circuit 2 is now at the coordinates (Xn
= Yn ), a correction value is obtained by subtracting the square of the rational value from the square of the output value so that it is placed between the inner and outer circles.

The sign determiner 8 detects the real part (Xn
), the sign of the imaginary part (Yn) is determined, and the inverted value of the sign (plus l if it is a negative value) is output.

The multiplier 9 multiplies the output value of the correction value generation circuit 7 and the output value of the sign determination device 8 to generate a correction value with sign processing.

Adder 10 adds the output value of complex multiplication circuit 2 and the output value of multiplier 9. As a result, the output of the complex multiplication circuit 2 is corrected to be intermediate between the inner circle and the outer circle in FIG.

The delay circuit 1 delays the output value of the adder 10 and uses it as input to the next complex multiplication circuit 20.

〔Effect of the invention〕

As explained above, the present invention corrects the sample value of the sine wave signal obtained by the delay circuit and the complex multiplier circuit using the correction means and then inputs it to the delay circuit, thereby stabilizing the amplitude through digital signal processing and increasing the accuracy. This has the effect of obtaining a good sine wave.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the first embodiment of the present invention, FIG. 2 is a diagram for explaining the operation of the embodiment shown in FIG. 1, and FIG. 3 is a block diagram of the second embodiment of the present invention. 4 are diagrams for explaining the operation of the embodiment shown in FIG. 3. l... Delay circuit, 2... Complex multiplication circuit, 3... Power detector, 4... Correction value detection circuit, 5... Correction value generation circuit, 6... Multiplier, 7...・・Correction value generation circuit,
8... Sign determiner, 9... Multiplier, 10... Adder.

Claims (1)

[Claims] a delay circuit that temporarily delays a sample value of a sine wave signal; a complex multiplication circuit that receives the output of this delay circuit and a predetermined amount of phase change represented by a complex number; and a complex multiplication circuit that corrects the output of this complex multiplication circuit to A sine wave oscillation circuit comprising: a correction means for outputting a sample value of a sine wave signal.