JPH0353076A - Mechanism for controlling heating of semiconductor substrate for cvd device - Google Patents

Mechanism for controlling heating of semiconductor substrate for cvd device

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Publication number
JPH0353076A
JPH0353076A JP18428489A JP18428489A JPH0353076A JP H0353076 A JPH0353076 A JP H0353076A JP 18428489 A JP18428489 A JP 18428489A JP 18428489 A JP18428489 A JP 18428489A JP H0353076 A JPH0353076 A JP H0353076A
Authority
JP
Japan
Prior art keywords
semiconductor substrate
reaction chamber
heater
heated
film formation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18428489A
Other languages
Japanese (ja)
Inventor
Yoshiyuki Sakai
善行 酒井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP18428489A priority Critical patent/JPH0353076A/en
Publication of JPH0353076A publication Critical patent/JPH0353076A/en
Pending legal-status Critical Current

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  • Chemical Vapour Deposition (AREA)

Abstract

PURPOSE:To suppress the growth of hillock in the heating state before film formation by providing means for temporarily parting a semiconductor substrate carried into a reaction chamber from a heating body. CONSTITUTION:An upper electrode 4 and a lowe electrode 5 are disposed on the reaction chamber 2 of the CVD device and a heater 6 is built atop the lower electrode 5. A pair of lifting pins 7, 8 as the parting means are perpendicularly disposed through the heater 6 and the lower electrode 5. The semiconductor substrate 3 carried into the reaction chamber 2 from the aperture thereof is imposed on the lifting pins 7, 8. After the flow rate of the reaction gases and internal pressure in the reaction chamber 2 are stabilized, the lifting pins 7, 8 are lowered to impose the semiconductor substrate 3 onto the upper surface 6a of the heater at the point of the time just before about 10 seconds from the point of the time when the film formation starts. The semiconductor substrate 3 is heated by the heater 6. The substrate is heated up to the target temp. at the point of the time when the film formation starts.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はCVD法によって半導体基板上に各種の1膜を
形威するCVD装置に関し、さらに詳しくは、CVD法
によって半導体基板上に形威した金属配線上に好通な絶
縁!膜、保護111iAなどを形或可能なプラズマCV
D装置に関するものである。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a CVD apparatus that forms various types of films on a semiconductor substrate by the CVD method. Good insulation on metal wiring! Plasma CV capable of forming films, protection 111iA, etc.
This relates to the D device.

〔従来の技術〕[Conventional technology]

CVD (気相化学反応生成)装置としては、その反応
室内に配置したヒータ等の加熱体によって、反応室内に
薄膜形或のために階入された半導体基板を熱分解可能な
温度にまで加熱するようにした構造のものが知られてい
る。このようなCVD装置では、まずそ.の反応室内に
搬入した半導体基板を、加熱体が組み込まれたステージ
上に載せて熱分解に必要な一定の温度、例えば400℃
程度にまで加熱すると共に、この加熱動作と平行して、
反応室内に供給する反応ガスの流量を安定化させ、反応
室内の圧力を目標とするレベルに安定化させ、しかる後
に、反応室内の電極問の放電を開始して半導体基板表面
の成膜を行うようにしている。このような成膜開始工程
においては、通常加熱体によって半導体基板は逸早く目
標とする温度にまで加熱され、この加熱状態で半導体基
板は反応室内の反応ガスの流量および圧力が安定化する
まで待機することになる. P 〔発明が解決しようと 課題〕 しかしながら、このようなCVD装置を用いて、例えば
半導体基板上のアルミニウム配線上に絶縁膜を形戒する
場合においては次のような問題が生ずる。すなわち、半
導体基板を上記のように、一定の加熱状態で、反応室内
の反応ガス流量および圧力が安定化するまで待機させて
おくと、この間に半導体基板上でアルミニウムのヒロソ
クが無視できない程に成長してしまうおそれがある。こ
のような事態が生ずると、アルミニウム配線間に短絡が
発生するなどして、絶縁膜形威後の半導体基板の信頼性
が著しく低下してしまうので好ましくない。
As a CVD (vapor phase chemical reaction generation) device, a heating element such as a heater placed in the reaction chamber heats a semiconductor substrate placed in the reaction chamber in the form of a thin film to a temperature at which it can be thermally decomposed. A structure having this structure is known. In such CVD equipment, first of all. The semiconductor substrate carried into the reaction chamber is placed on a stage equipped with a heating element and heated to a certain temperature required for thermal decomposition, e.g. 400°C.
In parallel with this heating operation,
The flow rate of the reaction gas supplied into the reaction chamber is stabilized, the pressure inside the reaction chamber is stabilized at a target level, and then discharge between the electrodes in the reaction chamber is started to form a film on the surface of the semiconductor substrate. That's what I do. In such a film formation start process, the semiconductor substrate is usually quickly heated to the target temperature by a heating element, and the semiconductor substrate waits in this heated state until the flow rate and pressure of the reaction gas in the reaction chamber are stabilized. It turns out. P [Problems to be Solved by the Invention] However, when such a CVD apparatus is used to form an insulating film on, for example, aluminum wiring on a semiconductor substrate, the following problems occur. In other words, if the semiconductor substrate is kept under constant heating as described above until the flow rate and pressure of the reaction gas in the reaction chamber are stabilized, aluminum crystals will grow on the semiconductor substrate during this time to a point that cannot be ignored. There is a risk that it will happen. If such a situation occurs, short circuits will occur between the aluminum wiring lines, and the reliability of the semiconductor substrate after forming the insulating film will be significantly lowered, which is undesirable.

この問題点を解決するために、従来においては、反応ガ
スの流通経路にバイパス回路を付設して常時反応ガスを
流しておき、半導体基板が反応室内に搬入されてから短
時間のうちに反応室内のガス流量を安定化させ、これに
よって半導体基板が加熱状態で待機している時間を短縮
させるようにしようとする提案がなされている。しかし
、この方法では、反応ガスの消費量が膨大なものとなっ
てしまい、実用的でない。
In order to solve this problem, in the past, a bypass circuit was attached to the flow path of the reaction gas to keep the reaction gas flowing at all times, so that the reaction gas could be brought into the reaction chamber within a short time after the semiconductor substrate was carried into the reaction chamber. Proposals have been made to stabilize the gas flow rate of the semiconductor substrate, thereby shortening the time during which the semiconductor substrate is in a heated state. However, this method consumes a huge amount of reaction gas and is not practical.

本発明の課題は、上記の点に鑑みて、CVD法により半
導体基板に形或した金属配線上に薄膜を形成するに当た
り、不所望なヒロックの発生を回避することの可能とな
ったCVD装置を実現することにある。
In view of the above points, it is an object of the present invention to provide a CVD apparatus that can avoid the occurrence of undesirable hillocks when forming a thin film on metal wiring formed on a semiconductor substrate by the CVD method. It is about realization.

〔課題を解決するための手段〕[Means to solve the problem]

上記の!I題を解決するために、本発明では、反応室内
に半導体基板を加熱する加熱体が設置されているCVD
装置において、成膜のために前記反応室内に搬入された
半導体基板を、一時的に前記加熱体から離しておく離間
手段を備えたことを特徴としている。
above! In order to solve problem I, the present invention provides a CVD system in which a heating element for heating a semiconductor substrate is installed in a reaction chamber.
The apparatus is characterized in that it includes a separating means for temporarily separating the semiconductor substrate carried into the reaction chamber for film formation from the heating body.

〔作用〕[Effect]

この構戊の本発明の装置においては、次のようにして成
膜を行えばよい。すなわち、反応室内に半導体基板を搬
入した後は、ただちにそれを加熱体による加熱状態に晒
さずに、離間手段によって加熱体によって加熱されない
位置に離間させておく。この状態で半導体基板を待機さ
せる。次に、反応室内のガス流量および圧力が安定化し
た時点で、あるいはこの時点よりも僅かに早い時期に、
離間手段による半導体基板の離間状態を解消して、半導
体基板を加熱体による加熱可能な位置に置き、目標とす
る温度にまで加熱する。反応室内のガス流量および圧力
が安定化し、半導体基板が目標温度まで加熱された後に
、成膜を開始する。
In the apparatus of the present invention having this structure, film formation may be performed as follows. That is, after the semiconductor substrate is carried into the reaction chamber, it is not immediately exposed to the heating state by the heating element, but is separated by the spacing means to a position where it will not be heated by the heating element. In this state, the semiconductor substrate is placed on standby. Then, once the gas flow rate and pressure in the reaction chamber have stabilized, or slightly earlier than this point,
The separation state of the semiconductor substrate by the separation means is canceled, the semiconductor substrate is placed at a position where it can be heated by the heating body, and the semiconductor substrate is heated to a target temperature. After the gas flow rate and pressure in the reaction chamber are stabilized and the semiconductor substrate is heated to a target temperature, film formation is started.

このようにして、離間手段によって、半導体基板が加熱
状態で或膜開始まで待機する時間を短縮あるいは実、質
的に無くすことができ、この加熱状態において、半導体
基板上の金属配線に発生するヒロックの戒長を許容でき
る程度に抑制することが可能となる。
In this way, by using the spacing means, it is possible to shorten or, in fact, qualitatively eliminate the time required to wait until the start of a certain film while the semiconductor substrate is in a heated state, and in this heated state, hillocks that occur in the metal wiring on the semiconductor substrate can be This makes it possible to suppress the precepts to an acceptable level.

〔実施例〕〔Example〕

以下に図面を参照して本発明の実施例を説明すおける反
応室内の構成を示してあり、本σ11の装置はアルミニ
ウム配線が形威された半導体基板上に酸化膜を形或する
ためのものである。本例のc■D装置1の反応室2は、
半導体基板3を出し入れするための開口部を有し、また
この反応室内に反応ガスを循環させる反応ガス吸排口お
よび反応室内を一定の圧力レベルに減圧する真空排気口
を有しており、これらは一般に知られている構或であり
、図示を省略すると共にこれらの詳細な説明もここでは
省略する。反応室2内には、上下に間隔を開けて上部電
極4および下部電極5が配置されている。下部電極5の
上面には加熱体であるヒータ6が組み込まれており、こ
のヒータ6の水平な上面6aが半導体基板3を載せるた
めのステージとされている。
The internal configuration of a reaction chamber for explaining an embodiment of the present invention with reference to the drawings is shown below, and the apparatus of σ11 is for forming an oxide film on a semiconductor substrate on which aluminum wiring is formed. It is. The reaction chamber 2 of the cD device 1 of this example is as follows:
It has an opening for taking in and taking out the semiconductor substrate 3, and also has a reaction gas inlet/outlet for circulating the reaction gas in the reaction chamber and a vacuum exhaust port for reducing the pressure inside the reaction chamber to a constant pressure level. Since this is a generally known structure, illustration thereof is omitted and detailed explanation thereof will also be omitted here. In the reaction chamber 2, an upper electrode 4 and a lower electrode 5 are arranged vertically with an interval between them. A heater 6, which is a heating element, is built into the upper surface of the lower electrode 5, and the horizontal upper surface 6a of the heater 6 serves as a stage on which the semiconductor substrate 3 is placed.

ここに、半導体基板3をヒータ6から離間させるための
離間手段としての一対の押上ピン7、8が、ヒータ6お
よび下部電極5を貫通して上下方向に向けて乗直に配置
されている。これらの一対の押上ビンは、その先OM7
a,8aがヒータ上面6aと面一となる退避位置から、
図に示すようにヒータ上面6aから上方に一定量突出し
た突出位置までの間を移動可能となっている。このよう
にビンを移動させるための駆動機構は一般的に知られて
いる機構を採用することができるので図においては省略
してあり、詳細な説明も省略する。
Here, a pair of push-up pins 7 and 8 as a separating means for separating the semiconductor substrate 3 from the heater 6 are disposed vertically extending vertically through the heater 6 and the lower electrode 5. These pair of push up bottles are OM7
From the retracted position where a and 8a are flush with the heater top surface 6a,
As shown in the figure, it is movable from the heater top surface 6a to a protruding position that protrudes a certain amount upward. As the drive mechanism for moving the bin in this manner can be a generally known mechanism, it is omitted from the drawings and detailed explanation thereof will also be omitted.

なお、本例においては、反応ガスとして、(Si114
+N20 +八r)ガスを導入するようになっており、
真空排気系によって反応室内はl.OTorrに減圧さ
れ、ヒータ6によって、半導体基板は成膜時に約400
℃となるように加熱される。また、上部電極4に高周波
を印加することによってプラズマを発生させて、例えば
表面にアルミニウム配線の形威された半導体基板上に酸
化膜を形衣するようになっている。
In addition, in this example, (Si114
+N20 +8r) gas is introduced,
The reaction chamber is filled with l.o.p. by the vacuum evacuation system. The pressure is reduced to OTorr, and the semiconductor substrate is heated to about 400 Torr by the heater 6 during film formation.
It is heated to ℃. Plasma is generated by applying a high frequency to the upper electrode 4, and an oxide film is formed on a semiconductor substrate having aluminum wiring formed on its surface, for example.

この構威の装置における戊膜開始までの動作を述べる。The operation up to the start of membrane formation in a device with this configuration will be described.

まず、初期状態に!タいては、押上ビン7、8をその突
出位置に設定しておき、反応室2の開口部からこの中に
搬入した半導体v!.板3をこれらの押上ビン7、8上
に載せる。この後、反応室2内で反応ガスの循環を開始
すると共に、反応室内の圧力を目標値まで減圧する。本
例では、反応ガス流量および内圧が安定化した後の成膜
開始時点よりも約10秒程度手前の時点で、押上ビン7
、8を降下させてその退避位置に設定し、半導体基板3
をステージ(ヒータ上面6a)上の載せる。
First, go to the initial state! Then, the push-up bottles 7 and 8 were set at their protruding positions, and the semiconductor v! was carried into the reaction chamber 2 through the opening. .. The board 3 is placed on these push-up bins 7 and 8. Thereafter, circulation of the reaction gas is started within the reaction chamber 2, and the pressure inside the reaction chamber is reduced to a target value. In this example, the push-up bottle 7
, 8 are lowered and set at their retracted positions, and the semiconductor substrate 3 is
is placed on the stage (heater top surface 6a).

この結果、ヒータ6によって半導体基板3が加熱されて
、e.膜開始時点では目標とする温度(約400℃)ま
で加熱されることになる。このようにして、成膜開始条
件が成立した後には、電極間に高周波を印加して或膜を
開始する。
As a result, the semiconductor substrate 3 is heated by the heater 6, and e. At the start of the film, it will be heated to the target temperature (approximately 400° C.). In this manner, after the conditions for starting film formation are established, a high frequency wave is applied between the electrodes to start forming a certain film.

このように、本例の装置によれば、成膜開始までに、半
導体基板が加熱状態のままで待機する時間が短縮される
。従って、ヒロックが許容できない程威長する前に成膜
が開始されて半導体基板上に酸化膜が形成され、この酸
化膜の形或によってヒロックのそれ以上の成長が抑制さ
れる。ちなみに、本例の装置において、従来のように半
導体基板を反応室に1駁人後直ちにステージ上に置いた
場合には、反応ガスの流量および反応室内の圧力が一定
となるまでに、約l分程度の間、加熱状態で待機する必
要があり、この間にアルミニウムのヒロックが許容でき
ない程大きく戒長してしまう。
In this way, according to the apparatus of this example, the waiting time while the semiconductor substrate remains in a heated state is shortened before starting film formation. Therefore, before the hillocks become unacceptably large, film deposition is started and an oxide film is formed on the semiconductor substrate, and the shape of this oxide film suppresses further growth of the hillocks. Incidentally, in the apparatus of this example, if the semiconductor substrate is placed on the stage immediately after being placed in the reaction chamber as in the conventional method, it will take approximately 1 liter to reach a constant flow rate of the reaction gas and the pressure in the reaction chamber. It is necessary to wait in the heated state for about a minute, during which time the aluminum hillocks become unacceptably large.

なお、上記の例においては、加熱開始時期の約lO秒手
前から加熱を開始するようにしているが、この加熱開始
時点は個々の装置において別個に規定されるべき性質の
ものであり、特に、成膜開始時の半導体基板の温度とヒ
ロックIIi長量との関係から最適な値を設定すべきで
ある。また、反応室内に搬入された半導体基板を加熱体
から離しておくための機構としては上述の一対の押上ビ
ン以外のものを採用してもよいことは勿論である。
In the above example, heating is started approximately 10 seconds before the heating start time, but this heating start time has a property that should be specified separately for each device, and in particular, The optimum value should be set based on the relationship between the temperature of the semiconductor substrate at the start of film formation and the length of hillock IIi. Furthermore, it goes without saying that a mechanism other than the pair of push-up bottles described above may be employed as a mechanism for separating the semiconductor substrate carried into the reaction chamber from the heating element.

さらに、上記の例ではCVD法によって半導体基板上に
酸化膜を形戊する装置を例にあげて説明したが、本発明
はCVD法によって薄膜形成を行う際にe.膜前の半導
体基板の加熱を抑制する必要のある場合に対して適用で
きることは勿論である。
Further, in the above example, an apparatus for forming an oxide film on a semiconductor substrate by the CVD method was used as an example, but the present invention is applicable to e.g. when forming a thin film by the CVD method. Of course, this method can be applied to cases where it is necessary to suppress heating of the semiconductor substrate before the film.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明においては、反応室内に搬
入された半導体基板をその中に配置されている加熱体か
ら一時的に離しておく離間手段を設けたので、成膜開始
までの間で半導体基板が所定温度の加熱状態に保持され
る時間を短縮することができ、したがって、このような
或膜前の加熱状態におけるヒロックの戒長を抑制するこ
とができる。
As explained above, in the present invention, a separating means is provided to temporarily separate the semiconductor substrate carried into the reaction chamber from the heating element disposed therein, so that The time period during which the semiconductor substrate is kept in a heated state at a predetermined temperature can be shortened, and therefore, the length of hillocks in the heated state before a certain film can be suppressed.

符号の説明 l−・・CVD装置 2一反応室 3・一半導体基板 4、5一電極 6・一・ヒータ(加熱体〉 7、 8 一押上ビン (離間手段) 舅j図Explanation of symbols l-...CVD equipment 21 reaction chamber 3.1 Semiconductor substrate 4, 5 one electrode 6.1.Heater (heating body) 7, 8 One push bottle (Separation means) father-in-law

Claims (1)

【特許請求の範囲】[Claims] 反応室内に半導体基板を加熱する加熱体が設置されてい
るCVD装置において、成膜のために前記反応室内に搬
入された半導体基板を、一時的に前記加熱体から離して
おく離間手段を備えたことを特徴とするCVD装置の半
導体基板加熱制御機構。
A CVD apparatus in which a heating element for heating a semiconductor substrate is installed in a reaction chamber, comprising a separating means for temporarily separating the semiconductor substrate carried into the reaction chamber for film formation from the heating element. A semiconductor substrate heating control mechanism for a CVD apparatus, characterized in that:
JP18428489A 1989-07-17 1989-07-17 Mechanism for controlling heating of semiconductor substrate for cvd device Pending JPH0353076A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18428489A JPH0353076A (en) 1989-07-17 1989-07-17 Mechanism for controlling heating of semiconductor substrate for cvd device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18428489A JPH0353076A (en) 1989-07-17 1989-07-17 Mechanism for controlling heating of semiconductor substrate for cvd device

Publications (1)

Publication Number Publication Date
JPH0353076A true JPH0353076A (en) 1991-03-07

Family

ID=16150630

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18428489A Pending JPH0353076A (en) 1989-07-17 1989-07-17 Mechanism for controlling heating of semiconductor substrate for cvd device

Country Status (1)

Country Link
JP (1) JPH0353076A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997020340A1 (en) * 1995-11-28 1997-06-05 Tokyo Electron Limited Method and device for treating semiconductor with treating gas while substrate is heated
JP2003077863A (en) * 2001-08-31 2003-03-14 Tokyo Electron Ltd Method of forming cvd film
JP2019169662A (en) * 2018-03-26 2019-10-03 株式会社Kokusai Electric Method of manufacturing semiconductor device, program and substrate processing device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997020340A1 (en) * 1995-11-28 1997-06-05 Tokyo Electron Limited Method and device for treating semiconductor with treating gas while substrate is heated
JP2003077863A (en) * 2001-08-31 2003-03-14 Tokyo Electron Ltd Method of forming cvd film
JP2019169662A (en) * 2018-03-26 2019-10-03 株式会社Kokusai Electric Method of manufacturing semiconductor device, program and substrate processing device

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