JPH0351923A - Trouble diagnostic device - Google Patents

Trouble diagnostic device

Info

Publication number
JPH0351923A
JPH0351923A JP1186588A JP18658889A JPH0351923A JP H0351923 A JPH0351923 A JP H0351923A JP 1186588 A JP1186588 A JP 1186588A JP 18658889 A JP18658889 A JP 18658889A JP H0351923 A JPH0351923 A JP H0351923A
Authority
JP
Japan
Prior art keywords
address
fault diagnosis
trouble diagnostic
data
program
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1186588A
Other languages
Japanese (ja)
Inventor
Naoki Nozu
野津 直樹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1186588A priority Critical patent/JPH0351923A/en
Publication of JPH0351923A publication Critical patent/JPH0351923A/en
Pending legal-status Critical Current

Links

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To confirm the updated trouble diagnostic state of the updated trouble diagnostic data on an optional address stored in a main storage without rewriting a program stored in the main storage by using an address search interruption. CONSTITUTION:The address of the trouble diagnostic data 2 is sent to a search address register 9 from a measuring device 5. An address coincidence detecting part 10 detects the coincidence secured between the address pointed by a memory address part 6 and the address pointed by the register 9 and produces an address coincidence interruption after the data 2 is updated. The program control is shifted to a trouble diagnostic state confirming program 4 by a trouble diagnostic state confirmation request instruction 8. The program 4 receives the trouble diagnostic data from the device 5 and confirms the trouble diagnostic state of the trouble diagnostic data. Thus it is not required to rewrite the next instruction 7 into the instruction 8 and therefore the trouble diagnostic state of the updated trouble diagnostic data on an optional address stored in a main storage 1 can be confirmed in real time without rewriting a program stored in the storage 1.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は例えば、計算機を用いたリアルタイム制御を
行う計算機システムにおいて、故障診断データ更新後の
故障診断状態の確認を主記憶装置内のプログラムの書換
えなしに、リアルタイムに故障診断状態を確認する方法
及び装置に関するものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention is, for example, in a computer system that performs real-time control using a computer, in which a program in the main storage device is used to check the failure diagnosis status after updating the failure diagnosis data. The present invention relates to a method and apparatus for checking a failure diagnosis state in real time without rewriting.

〔従来の技術〕[Conventional technology]

従来の装置は第3図に示すように、(1)は計算機の主
記憶装置、(2)は更新の対象となる故障診断データ、
(3)は故障診断データ(2)を更新する故障診断デー
タ更新命令、(4)は故障診断状態を確認する故障診断
状態確認用プログラム、(5)は故障診断状態用プログ
ラム(4)に制御され、故障診断状態をi認する計測装
置、(6)は更新中の故障診断データのアドレスを表示
するメモリアドレス部、(7)は故障診断データ更新命
令(3)の次に実行される次命令から構成されていた。
As shown in Figure 3, the conventional device (1) is the main memory of the computer, (2) is the fault diagnosis data to be updated,
(3) is a fault diagnosis data update command that updates the fault diagnosis data (2), (4) is a fault diagnosis state confirmation program that confirms the fault diagnosis state, and (5) is controlled by the fault diagnosis state program (4). (6) is a memory address section that displays the address of the fault diagnosis data being updated; (7) is the next fault diagnosis data update command executed after the fault diagnosis data update command (3); It was made up of commands.

従来の方法は第4図に示すように、処理の試験、確認用
の故障診断の状態確認にさきだって次命令(7)を故障
診断状態確認用プログラム(4)を起動する故障診断状
態確認要求命令(8)に書換え、その結果、故障診断デ
ータ更新命令(3)の実行後、プログラムの制御が故障
診断状態確認用プログラム(4)に移り(図示■)、故
障診断状態確認用プログラム(4)は計測装置(5)か
ら処理の試験、確認用に状態すべき故障診断データを受
け、(図示■)故障診断データの状態を確認するように
なっていた。
As shown in Figure 4, in the conventional method, prior to checking the status of failure diagnosis for testing and confirmation of processing, the next command (7) is issued to request failure diagnosis status confirmation to start the failure diagnosis status confirmation program (4). As a result, after executing the fault diagnosis data update command (3), control of the program is transferred to the fault diagnosis state confirmation program (■ in the figure). ) receives fault diagnosis data that should be in a state for processing testing and confirmation from the measuring device (5), and confirms the state of the fault diagnosis data (■ in the figure).

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、従来の計算機システムにおけろ故障診断
状態確認を行う計測装置では、故障診断データ更新命令
(3)の次に実行される次命令(7)を書換える(図示
■)必要があり、次指令(7)を書換える乙とによって
プログラムが正しく動作しなくなることもなりうる。ま
た、故障診断データ(2)のアドレスを変えるたびに故
障診断データ更新命令(3)のアドレスも変わる。それ
に伴い次命令(7)の書換えが発生する。さらに、命令
を格納している主記憶装M(11が書換え不可能なリー
ドオンリイメモリの場合、次命令(7)の書換えは不可
能となり、故障診断データ更新命令(3)実行後の故障
診断データの状態確認も不可能になるという問題点があ
った。
However, in conventional computer systems, in measuring devices that check the failure diagnosis status, it is necessary to rewrite the next instruction (7) that is executed after the failure diagnosis data update instruction (3) (■ in the figure). By rewriting Directive (7), the program may not operate correctly. Furthermore, each time the address of the fault diagnosis data (2) is changed, the address of the fault diagnosis data update command (3) also changes. Accordingly, the next instruction (7) is rewritten. Furthermore, if the main memory M (11) storing the instructions is a non-rewritable read-only memory, it becomes impossible to rewrite the next instruction (7), and the failure diagnosis after executing the failure diagnosis data update instruction (3) There was a problem in that it became impossible to check the status of the data.

したがって、この発明はこのような課題を解決するため
になされたものであり、主記憶装置(1)の中の命令の
書換えなしに、外部から計測する主記憶装置(1)内の
任意アドレスの故障診断データの更新後の故障診断状態
ieリアルタイムに確認することを目的とする。
Therefore, this invention was made to solve such problems, and it is possible to read any address in the main memory (1) measured from the outside without rewriting the instructions in the main memory (1). The purpose is to check the failure diagnosis status in real time after updating the failure diagnosis data.

〔課題を解決するための手段〕[Means to solve the problem]

このような目的を達成するために、この発明は計算機シ
ステムにおいて更新中の故障診断データのアドレスを示
すメモリアドレス部と、故障診断データ更新後の故障診
断状態を確認するために、故障診断データが格納されて
いる主記憶装置内のアドレスを計測用アドレスとして記
憶しているサーチアドレスレジスタと、前記サーチアド
レスレジスクが指示するアドレスと前記メモリアドレス
部が指示するアドレスとが一致したときにアドレス一致
割込みを発生するアドレス一致検出部と、前記計測用ア
ドレスの故障診断データ更新後の故障診断状態を確認す
ための故障診断状態確認プロダラムと、前記故障診断状
態確認プログラムに制御される計測装置とを備え、アド
レス一致検出部から発生するアドレス一致割込みを利用
して、前記計測用アドレスの故障診断データ更新後の故
障診断状態を確認するものである。
In order to achieve such an object, the present invention includes a memory address section that indicates the address of fault diagnosis data being updated in a computer system, and a memory address section in which the fault diagnosis data is used to confirm the fault diagnosis state after updating the fault diagnosis data. An address match occurs when the address specified by the search address register that stores an address in the main memory as a measurement address matches the address specified by the search address register and the address specified by the memory address section. An address match detection unit that generates an interrupt, a fault diagnosis state confirmation program for confirming a fault diagnosis state after updating the fault diagnosis data of the measurement address, and a measuring device controlled by the fault diagnosis state confirmation program. The fault diagnosis state after the fault diagnosis data of the measurement address has been updated is confirmed using the address match interrupt generated from the address match detection section.

〔作 用〕[For production]

この発明においては、アドレス一致割込みを利用して故
障診断状態確認プログラム(4)に故障診断状態確認要
求を出すため故障診断データのアドレスが変わるたびに
、次命令(7)を故障診断状Fl!確認要求命令に書換
える必要がなくなる。また、命令を格納している主記憶
(1)が書換え不可能にリードl・オンリイメモリの場
合でもアドレス一致割込みは可能であり、故障診断デー
タ(3)更新後の故障診断状態の確認も可能になる。
In this invention, since the address matching interrupt is used to issue a fault diagnosis state confirmation request to the fault diagnosis state confirmation program (4), each time the address of the fault diagnosis data changes, the next instruction (7) is sent to the fault diagnosis state check program (4). There is no need to rewrite the confirmation request command. In addition, even if the main memory (1) that stores instructions is a read-only memory that cannot be rewritten, address match interrupts are possible, and it is also possible to check the failure diagnosis status after updating the failure diagnosis data (3). become.

〔実施例〕〔Example〕

第1図はこの発明に係わる計算機システムの故障診断デ
ータの状態確認を行う計測装置の一実施例を示す構成図
である。同図において、(1)〜(8)は上記従来装置
と全く同一のものである。以下実施例を用いて詳細に説
明する。(9)はアドレス一致割り込み機能を利用して
計測するために故障診断データ(2)が格納されている
主記憶装置内のアドレスを計測用アドレスとして記憶し
ているサーチアドレスレジスタ、叫は前記サーチアドレ
スレジスタが指示するアドレスと前記メモリアドレス部
が指示するアドレスとが一致したときにアドレス一致割
込みを発生するアドレス一致検出部、(Illはアドレ
ス一致割込みが発生した場合に実行されるアドレス一致
割込み応答アドレスからなる。
FIG. 1 is a configuration diagram showing an embodiment of a measuring device for checking the status of failure diagnosis data of a computer system according to the present invention. In the figure, (1) to (8) are completely the same as the conventional device described above. This will be explained in detail below using examples. (9) is a search address register that stores the address in the main memory where failure diagnosis data (2) is stored as a measurement address for measurement using the address match interrupt function; an address match detection unit that generates an address match interrupt when the address specified by the address register and the address specified by the memory address unit match; (Ill is an address match interrupt response executed when an address match interrupt occurs; Consists of addresses.

第2図は、上記構成に係わる計算機システムの故障診断
データの状態確認を行う計潤装置の一実施例の処理方法
を示す図である。同図において、状態確認にさきだって
、アドレス一致割込み応答アドレス{11}に放障診断
状態確認要求命令(8)を準備しておく。そして、計測
装置(5)からサーチアドレスレジスタ(9)へ故障診
断データ(2)のアドレスが送られ(図示■)、故障診
断データ(2)の更新後にアドレス一致検出部叫はメモ
リアドレス部(6)が指示するアドレスとサーチアドレ
スレジスタ(9)が指示するアドレスとが一致したこと
を検知し、アドレス一致割込みを発生する。アドレス一
致割込みが発生した場合に更新されるアドレス一致割込
み応答アドレス(11)には、故障診断状態確認用プロ
グラムへ分岐する故障診断状態確認要求命令(8)が存
在する。その結果、アドレス一致割込み発生後、プログ
ラムの制御が故障診断状態確認用プログラム(4)へ移
る。故障診断状態確認用プログラム(4)は計測装w(
5)から状態すべき故障診断データを受け(図示■冫故
障診断データの故障診断状態の確z3を実行する。
FIG. 2 is a diagram illustrating a processing method of an embodiment of a measurement device that checks the status of failure diagnosis data of a computer system having the above configuration. In the figure, before checking the status, a fault diagnosis status confirmation request command (8) is prepared at the address match interrupt response address {11}. Then, the address of the fault diagnosis data (2) is sent from the measurement device (5) to the search address register (9) (■ in the figure), and after the fault diagnosis data (2) is updated, the address matching detection section is sent to the memory address section ( 6) detects that the address specified by the search address register (9) matches the address specified by the search address register (9), and generates an address match interrupt. In the address match interrupt response address (11) that is updated when an address match interrupt occurs, there is a fault diagnosis state confirmation request instruction (8) that branches to the fault diagnosis state confirmation program. As a result, after the address match interrupt occurs, control of the program is transferred to the fault diagnosis status confirmation program (4). The fault diagnosis status confirmation program (4) is the measurement equipment w (
5) Receive the fault diagnosis data to be in the state (as shown in the figure) z3 to confirm the fault diagnosis state of the fault diagnosis data.

〔発明の効果〕〔Effect of the invention〕

この発明{よ以上説明したとおり、アドレスサーチ割込
みを利用することにより計算機の主記憶装置内の任意な
ア1・レスの故障診断データの更新後の故障診断状態を
主記憶内のプログラムの書換えなしに用意にN認できる
という効果がある。
This invention {as explained above, by using the address search interrupt, the failure diagnosis state after updating the failure diagnosis data of any address in the main memory of a computer can be determined without rewriting the program in the main memory. This has the effect of allowing you to readily admit N.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例を示す図、第2図(よこの
発明における状態確認手段を示す図、第3図は従来の計
算機システムにおける故障診断データの故障診断状態を
確認する計測装置を示す図、第4図は従来の計算機シス
テムにおける故障診断データの故障診断状態を確認する
計測装置における故障診断状態確認手順を示す図である
。 図において、(1)は計算機の主記憶装置、(2)は故
障診断データ、(3)は故障診断データ更新命令、(4
)は故障診断状態確認用プログラム、(5)は計澗装置
、(6)はメモリアドレス部、(7)は次命令、(8)
は故障診断状態f!認要求命令、(9)はサーチアドレ
スレジスタ、叫はアドレス一致検出部、(川はアドレス
一致割込み応答アドレスである。 なお、各図中同一符号は同一または相当部分を示す。
FIG. 1 is a diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing a status confirmation means in the other invention, and FIG. 3 is a measuring device for confirming the failure diagnosis status of failure diagnosis data in a conventional computer system. FIG. 4 is a diagram showing a procedure for checking the failure diagnosis status of a measuring device for checking the failure diagnosis status of failure diagnosis data in a conventional computer system. In the figure, (1) is the main storage of the computer; (2) is failure diagnosis data, (3) is failure diagnosis data update instruction, (4
) is the fault diagnosis status confirmation program, (5) is the measuring device, (6) is the memory address section, (7) is the next instruction, (8)
is the fault diagnosis state f! (9) is a search address register, (9) is an address match detection unit, and (9) is an address match interrupt response address. In each figure, the same reference numerals indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] 計算機システムにおいて更新中の故障診断データのアド
レスを示すメモリアドレス部と、故障診断データ更新後
の故障診断状態を確認するために、前記故障診断データ
が格納されている主記憶装置内のアドレスを計測用アド
レスとして記憶しているサーチアドレスレジスタと、前
記サーチアドレスレジスタが指示するアドレスと前記メ
モリアドレス部が指示するアドレスとが一致したときに
アドレス一致割込を発生するアドレス一致検出部と、前
記計測用アドレスの故障診断データ更新後の故障診断状
態を確認するための故障診断状態確認プログラムに制御
される故障診断状態確認計測装置とを備えたことを特徴
とする故障診断装置。
A memory address section indicating the address of fault diagnostic data being updated in the computer system, and an address in the main storage where the fault diagnostic data is stored in order to confirm the fault diagnostic state after updating the fault diagnostic data. a search address register stored as an address for use in the measurement; an address match detection unit that generates an address match interrupt when an address specified by the search address register matches an address specified by the memory address section; and a fault diagnosis state confirmation measurement device that is controlled by a fault diagnosis state confirmation program for confirming the fault diagnosis state after update of the fault diagnosis data of the address.
JP1186588A 1989-07-19 1989-07-19 Trouble diagnostic device Pending JPH0351923A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1186588A JPH0351923A (en) 1989-07-19 1989-07-19 Trouble diagnostic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1186588A JPH0351923A (en) 1989-07-19 1989-07-19 Trouble diagnostic device

Publications (1)

Publication Number Publication Date
JPH0351923A true JPH0351923A (en) 1991-03-06

Family

ID=16191179

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1186588A Pending JPH0351923A (en) 1989-07-19 1989-07-19 Trouble diagnostic device

Country Status (1)

Country Link
JP (1) JPH0351923A (en)

Similar Documents

Publication Publication Date Title
JP2526688B2 (en) Programmable controller and partial execution method of sequence program
JPH09330106A (en) Control system with backup function
JPH0351923A (en) Trouble diagnostic device
JPH0277947A (en) Measuring device
JPH0317760A (en) Data write confirming system
JPS61204703A (en) Developing device for engine control computer system
JPS58175991A (en) Controller for motor
JPH03255913A (en) Measuring instrument
JPH02294740A (en) Inspection system for computer
JPS59205613A (en) Sequence monitor device
JP3299361B2 (en) Multiprocessor system with shared memory
JPH0399326A (en) Microprogram loading method, loading controller, information processor, and information processing system
JP2703368B2 (en) Test output device switching device
JPH05181680A (en) Method for transferring firmware
JPS6034132B2 (en) programmable controller
JPS61266036A (en) System stabilizer
JPH07219609A (en) Information processor
JPH03211619A (en) Data processor
JPS6238746B2 (en)
JP3144979B2 (en) Program processing device and processing method
JPS59188702A (en) Programmable controller
JPH03127241A (en) Memory control method for paging virtual storage system
JPS62107354A (en) Microprogram control device
JPS62200945A (en) Communication control system
JPS63254501A (en) Sequence controller