JPH0351526U - - Google Patents

Info

Publication number
JPH0351526U
JPH0351526U JP1989111957U JP11195789U JPH0351526U JP H0351526 U JPH0351526 U JP H0351526U JP 1989111957 U JP1989111957 U JP 1989111957U JP 11195789 U JP11195789 U JP 11195789U JP H0351526 U JPH0351526 U JP H0351526U
Authority
JP
Japan
Prior art keywords
circuit
current
light
voltage
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1989111957U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989111957U priority Critical patent/JPH0351526U/ja
Publication of JPH0351526U publication Critical patent/JPH0351526U/ja
Pending legal-status Critical Current

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  • Electronic Switches (AREA)
  • Optical Communication System (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の具体的一実施例を示す光/電
圧変換回路のブロツク回路図、第2図は第1図の
説明に供されるタイムチヤート、第3図は従来の
光/電圧変換回路を示す図、第4図は第3図の説
明に供する図である。 HD……光−電流変換素子(フオトダイオード
)、1……電流/電圧変換回路(I/V変換回路
)、2……フイルタ回路、3……積分回路、4…
…サンプルホールド回路(S/H)、5……出力
端。
Fig. 1 is a block circuit diagram of a light/voltage conversion circuit showing a specific embodiment of the present invention, Fig. 2 is a time chart used to explain Fig. 1, and Fig. 3 is a conventional light/voltage conversion circuit. FIG. 4, a diagram showing the circuit, is a diagram for explaining FIG. 3. HD...Light-current conversion element (photodiode), 1...Current/voltage conversion circuit (I/V conversion circuit), 2...Filter circuit, 3...Integrator circuit, 4...
...Sample hold circuit (S/H), 5...Output end.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] パルス幅変調された光パワーを光−電流変換素
子を用いて受光し、この受光した光パワーに比例
した電圧出力を外部出力として得る構成から成る
光/電圧変換回路において、前記光−電流変換素
子からの電流が導かれて該電流を積分する積分回
路と、該積分回路の出力がその入力端子に導かれ
てホールド端子に入力するパルス幅変調に同期し
たホールド信号によりサンプルホールドするサン
プルホールド回路と、該サンプルホールド回路か
らのサンプルホールドされた出力電圧を前記積分
回路に前記光−電流変換素子からの電流に加算す
るように電流帰還する帰還抵抗と、で構成して前
記外部出力として得る電圧出力を前記サンプルホ
ールド回路から取出すようにしたことを特徴とす
る光/電圧変換回路。
In a light/voltage conversion circuit configured to receive pulse width modulated optical power using a light-current conversion element and obtain a voltage output proportional to the received optical power as an external output, the light-current conversion element an integrating circuit to which a current is guided and integrates the current; and a sample hold circuit which samples and holds the output of the integrating circuit by a hold signal synchronized with pulse width modulation which is guided to its input terminal and input to the hold terminal. , a feedback resistor that feeds back a sampled and held output voltage from the sample-and-hold circuit to the integrating circuit so as to add the current from the photo-current conversion element; and a voltage output obtained as the external output. A light/voltage conversion circuit characterized in that: is taken out from the sample and hold circuit.
JP1989111957U 1989-09-25 1989-09-25 Pending JPH0351526U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989111957U JPH0351526U (en) 1989-09-25 1989-09-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989111957U JPH0351526U (en) 1989-09-25 1989-09-25

Publications (1)

Publication Number Publication Date
JPH0351526U true JPH0351526U (en) 1991-05-20

Family

ID=31660417

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989111957U Pending JPH0351526U (en) 1989-09-25 1989-09-25

Country Status (1)

Country Link
JP (1) JPH0351526U (en)

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