JPH0351016B2 - - Google Patents
Info
- Publication number
- JPH0351016B2 JPH0351016B2 JP59181069A JP18106984A JPH0351016B2 JP H0351016 B2 JPH0351016 B2 JP H0351016B2 JP 59181069 A JP59181069 A JP 59181069A JP 18106984 A JP18106984 A JP 18106984A JP H0351016 B2 JPH0351016 B2 JP H0351016B2
- Authority
- JP
- Japan
- Prior art keywords
- block
- state information
- status information
- blocks
- byte
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
Landscapes
- Storage Device Security (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59181069A JPS6159552A (ja) | 1984-08-30 | 1984-08-30 | 主記憶状態情報制御方式 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59181069A JPS6159552A (ja) | 1984-08-30 | 1984-08-30 | 主記憶状態情報制御方式 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6159552A JPS6159552A (ja) | 1986-03-27 |
JPH0351016B2 true JPH0351016B2 (fr) | 1991-08-05 |
Family
ID=16094253
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59181069A Granted JPS6159552A (ja) | 1984-08-30 | 1984-08-30 | 主記憶状態情報制御方式 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6159552A (fr) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS499146A (fr) * | 1972-05-12 | 1974-01-26 | ||
JPS5177038A (fr) * | 1974-12-27 | 1976-07-03 | Fujitsu Ltd |
-
1984
- 1984-08-30 JP JP59181069A patent/JPS6159552A/ja active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS499146A (fr) * | 1972-05-12 | 1974-01-26 | ||
JPS5177038A (fr) * | 1974-12-27 | 1976-07-03 | Fujitsu Ltd |
Also Published As
Publication number | Publication date |
---|---|
JPS6159552A (ja) | 1986-03-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR880000298B1 (ko) | 멀티워어드 메모리 데이타 스토리지 및 어드레싱 기법및 장치 | |
JP2960415B2 (ja) | 記憶保護方法および装置 | |
EP0213843B1 (fr) | Commande de processeur numérique | |
EP0377970A2 (fr) | Antémémorisation d'entrée/sortie | |
US5287482A (en) | Input/output cache | |
EP0386719A2 (fr) | Circuit de commande d'accès en mémoire partielle | |
EP0057096B1 (fr) | Unité de traitement d'information | |
JPH0351016B2 (fr) | ||
US5434979A (en) | Disk drive controller | |
JPS6022777B2 (ja) | デ−タ転送方式 | |
JPH04195563A (ja) | メモリシステムの制御装置 | |
JP2716563B2 (ja) | データ書込み制御方式 | |
JP3031581B2 (ja) | ランダムアクセスメモリおよび情報処理装置 | |
JPS60117353A (ja) | 記憶装置における交代メモリ制御方法 | |
JPS61193245A (ja) | 記憶制御方式 | |
JP2576589B2 (ja) | 仮想記憶アクセス制御方式 | |
JPH02136946A (ja) | キャッシュメモリ制御回路 | |
JPH0241772B2 (fr) | ||
JPH06103179A (ja) | バストレーサ装置 | |
JPH07105079A (ja) | メモリ管理方法 | |
Poppendieck et al. | Memory extension techniques for mini-computers | |
JP2000181797A (ja) | デバイスキャッシュ制御システム | |
JPH0561613A (ja) | 外部記憶装置アクセス方式 | |
JPH0154729B2 (fr) | ||
JPH0727490B2 (ja) | キャッシュメモリ |