JPH035075B2 - - Google Patents

Info

Publication number
JPH035075B2
JPH035075B2 JP57233705A JP23370582A JPH035075B2 JP H035075 B2 JPH035075 B2 JP H035075B2 JP 57233705 A JP57233705 A JP 57233705A JP 23370582 A JP23370582 A JP 23370582A JP H035075 B2 JPH035075 B2 JP H035075B2
Authority
JP
Japan
Prior art keywords
circuit board
ceramic circuit
green sheet
glass
ceramic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57233705A
Other languages
Japanese (ja)
Other versions
JPS59124149A (en
Inventor
Hirozo Yokoyama
Koichi Niwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP23370582A priority Critical patent/JPS59124149A/en
Publication of JPS59124149A publication Critical patent/JPS59124149A/en
Publication of JPH035075B2 publication Critical patent/JPH035075B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4867Applying pastes or inks, e.g. screen printing
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks

Landscapes

  • Engineering & Computer Science (AREA)
  • Ceramic Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

(1) 発明の技術分野 本発明はセラミツク回路基板用グリーンシート
と導体形成用銅ペーストのバインダー組成が同一
であり、グリーンシートと銅ペーストの一体焼成
によつてセラミツク回路基板を製造する方法に関
する。 (2) 技術の背景 工程が単純で、コストが安価なセラミツク回路
基板の製法が要望されている。 (3) 従来技術と問題点 グリーンシートに市販銅ペーストを印刷し、こ
れらシートを積層した後、N2雰囲気焼成を行な
いセラミツク回路基板を作製した場合、次のよう
なことが起こる。 市販銅ペーストはグリーンシートと異なるバイ
ンダー組成であるため、グリーンシートと一体焼
成ではバインダーが完全に飛散せず、セラミツク
中にカーボンとして導体周辺に残存する欠点があ
る。 (4) 発明の目的 本発明は上述の欠点に鑑みなされたもので、グ
リーンシートと銅ペーストのN2雰囲気による一
体焼成を行ない、セラミツク中にカーボンが残存
せず、ふくれなどが生じないセラミツク回路基板
の製造法を提供することにある。 (5) 発明の構成 本発明はガラスセラミツク回路基板用グリーン
シート上に銅ペーストを印刷して導体回路パター
ンを形成する工程と、該導体回路パターンを形成
したガラスセラミツク回路基板用グリーンシート
を積層する工程と、該積層グリーンキートを不活
性ガス雰囲気中焼成する工程を有するセラミツク
回路基板の製造方法において、上記ガラスセラミ
ツク回路基板用グリーンシート及び上記銅ペース
トの有機バインダーとしてアクリル樹脂を用いた
ことを特徴とするセラミツク回路基板の製造方法
により達成される。 本発明はセラミツク回路基板用グリーンシート
と導体回路形成用銅ペーストの有機バインダーが
同一であるため、N2雰囲気によるグリーンシー
ト銅ペーストの一体焼成を容易にしたものであ
る。 (6) 発明の実施例 以下、本発明について実施例を参照して説明す
る。セラミツク回路基板の作製はグリーンシート
と銅ペースをN2雰囲気によつて一体焼成で行な
う。そこでN2雰囲気焼成で、完全に飛散しカー
ボンの残存しない有機バインダーをグリーンシー
トおよび銅ペーストのバインダーとして、使用す
ることが重要となる。各種有機バインダーの中か
ら上記条件を満足するアクリル樹脂を今回の実施
例に使用した。 回路基板の作製には、アクリルバインダーを10
%含んだ、厚さ0.4mm、外形寸法150×150mmのグ
リーンシートを用いた。このグリーンシートに上
下導体配線接続のビアホール形成用の穴開けをな
した後グリーンシート上に、グリーンシートと同
一のアクリルバインダーを含んだ表に示した組成
の銅ペーストを、325メツシユステンレススクリ
ーンを用いて印刷し、導体回路パターンを形成し
た。
(1) Technical Field of the Invention The present invention relates to a method of manufacturing a ceramic circuit board by integrally firing the green sheet and the copper paste, in which the binder composition of the green sheet for a ceramic circuit board and the copper paste for forming a conductor are the same. (2) Background of the technology There is a need for a method for manufacturing ceramic circuit boards that has a simple process and is low in cost. (3) Prior art and problems When a ceramic circuit board is produced by printing commercially available copper paste on green sheets, laminating these sheets, and then firing them in an N 2 atmosphere, the following happens. Commercially available copper paste has a binder composition different from that of the green sheet, so when it is fired together with the green sheet, the binder does not scatter completely and remains as carbon in the ceramic around the conductor. (4) Purpose of the Invention The present invention was made in view of the above-mentioned drawbacks, and provides a ceramic circuit in which a green sheet and a copper paste are integrally fired in an N2 atmosphere, so that no carbon remains in the ceramic and no blistering occurs. An object of the present invention is to provide a method for manufacturing a substrate. (5) Structure of the Invention The present invention includes a step of printing copper paste on a green sheet for a glass-ceramic circuit board to form a conductor circuit pattern, and laminating the green sheets for a glass-ceramic circuit board on which the conductor circuit pattern has been formed. and a step of firing the laminated green sheet in an inert gas atmosphere, characterized in that an acrylic resin is used as an organic binder for the glass-ceramic circuit board green sheet and the copper paste. This is achieved by a method of manufacturing a ceramic circuit board. In the present invention, since the green sheets for ceramic circuit boards and the copper paste for forming conductor circuits have the same organic binder, the green sheet copper paste can be easily fired together in an N2 atmosphere. (6) Examples of the invention The present invention will be described below with reference to Examples. The ceramic circuit board is manufactured by integrally firing the green sheet and copper paste in an N2 atmosphere. Therefore, it is important to use an organic binder that is completely dispersed by firing in an N 2 atmosphere and leaves no carbon behind as a binder for the green sheet and copper paste. Among various organic binders, an acrylic resin satisfying the above conditions was used in this example. To make the circuit board, add acrylic binder to 10
A green sheet with a thickness of 0.4 mm and external dimensions of 150 x 150 mm was used. After drilling holes in this green sheet to form via holes for connecting the upper and lower conductor wiring, a copper paste with the composition shown in the table containing the same acrylic binder as the green sheet was applied to the green sheet, and a 325 mesh stainless steel screen was applied. A conductive circuit pattern was formed by printing.

【表】 このようにし導体回路を形成したグリーンシー
ト6層分を、圧力10〜30Mpa、温度90〜130、加
圧時間4〜15分の種々の条件で積層した。これら
の積層グリーンシートをN2雰囲気において最高
温度950℃で10分間焼成し、セラミツク回路基板
を得た。これらの基板の導体周辺はカーボンの残
存が認められず、完全にバインダーが飛散してい
る結果を得た。なお、この回路基板の電気抵抗は
線幅80μmで0.17Ω/cmと低い値である。 アクリル樹脂バインダーを含んだガラス−セラ
ミツクペーストと、表に示した銅ペーストを交互
に繰り返しスクリーン印刷法で形成して多層化を
行なう方法でセラミツク回路気板を得るとともで
きる。これは、焼成時にセラミツクの収縮が厚さ
方向にのみ起こるため、寸法精度に優れる。この
方法でもガラス−セラミツクペーストと銅ペース
トのバインダー組成は同一であり、一体焼成が容
易であることを確認した。なお、上記ガラスセラ
ミツクとしてアルミナと硼珪酸ガラスの混合物、
アルミナとシリカガラスと硼珪酸ガラスの混合
物、ムライトとシリカガラスと硼珪酸ガラスの混
合物等を用いることができる。ガラスセラミツク
粉末の具体的な一例としては、 Al2O3 50.5wt% SiO2 35.0 B2O3 13.0 Na2O 0.75 K2O 0.70 CaO 0.15 Li2O 0.15 である。 また、グリーンシート或いはガラスセラミツク
ペーストを形成するガラスセラミツクスリツプの
具体的な一例としては、樹脂としてはアクリル酸
系樹脂の一つであるポリメチルメタアクリレート
樹脂を用いた ガラスセラミツク粉末 57.8wt% ポリメチルメタアクリレート樹脂 8.7 ジブチルフタレート 4.6 メチルエチルケトン 16.1 メチルアルコール 8.7 ブチルアルコール 2.9 である。 第1図は有機バインダの窒素雰囲気中における
熱減量曲線を示す。窒素雰囲気中10℃/minの昇
温速度での熱分析結果によれば、本発明で用いら
れるアクリル樹脂は400℃以下の温度でほぼ完全
に熱分解される。一方、エチルセルロース、ポリ
ビニルブチラール(PVB)は900℃までの昇温加
熱にもかかわらず数%程度の残留物が生じた。 本発明の多層回路基板の製法によれば、アクリ
ル樹脂をバインダとした場合、回路基板中の残留
炭素を100ppm以下(10〜30ppm以下)にするこ
とができる。 第2図は多層セラミツク回路基板における誘電
強度(dielectric strength)に及ぼす残留炭素の
影響を示す図であり、残留酸素が100ppm以上で
は絶縁層の絶縁耐圧が急激に低下することを示
す。尚、残留酸素が100ppm以上であると焼成時、
導体或いはガラスセラミツクに膨れやポアを生ず
る。 以上のように、セラミツク回路基板の製造方法
に於いて、グリーンシート及び銅ペーストの有機
バインダとしてアクリル樹脂を用いる本発明で
は、セラミツク回路基板中の残留炭素量を
100ppm以下(10〜30ppm以下)に低減すること
ができ絶縁層の絶縁耐圧を維持することができる
又、導体層中の電気特性を損うなこともない。 (7) 発明の効果 焼成後の導体部にカーボンが残存しない信頼性
の高いセラミツク回路基板を提供できる。グリー
ンシートと銅ペーストの一体焼成が容易にでき、
セラミツク回路基板製造工程を単純化できる。
[Table] Six layers of green sheets with conductor circuits formed in this way were laminated under various conditions: pressure of 10 to 30 MPa, temperature of 90 to 130 MPa, and pressurization time of 4 to 15 minutes. These laminated green sheets were fired at a maximum temperature of 950° C. for 10 minutes in an N 2 atmosphere to obtain a ceramic circuit board. No residual carbon was observed around the conductors of these substrates, and the binder was completely scattered. Note that the electrical resistance of this circuit board is as low as 0.17 Ω/cm at a line width of 80 μm. A ceramic circuit board can be obtained by alternately and repeatedly forming a glass-ceramic paste containing an acrylic resin binder and a copper paste shown in the table by screen printing to form a multilayer structure. This is because the ceramic shrinks only in the thickness direction during firing, resulting in excellent dimensional accuracy. It was confirmed that even in this method, the binder compositions of the glass-ceramic paste and the copper paste were the same, and that integral firing was easy. In addition, as the above-mentioned glass ceramic, a mixture of alumina and borosilicate glass,
A mixture of alumina, silica glass, and borosilicate glass, a mixture of mullite, silica glass, and borosilicate glass, etc. can be used. A specific example of the glass ceramic powder is Al 2 O 3 50.5wt% SiO 2 35.0 B 2 O 3 13.0 Na 2 O 0.75 K 2 O 0.70 CaO 0.15 Li 2 O 0.15. Further, as a specific example of a glass ceramic slip forming a green sheet or a glass ceramic paste, glass ceramic powder 57.8wt% polymethyl using polymethyl methacrylate resin, which is one of the acrylic acid resins, is used as the resin. Methacrylate resin 8.7 Dibutyl phthalate 4.6 Methyl ethyl ketone 16.1 Methyl alcohol 8.7 Butyl alcohol 2.9. FIG. 1 shows a heat loss curve of an organic binder in a nitrogen atmosphere. According to the results of thermal analysis in a nitrogen atmosphere at a heating rate of 10° C./min, the acrylic resin used in the present invention is almost completely thermally decomposed at a temperature of 400° C. or lower. On the other hand, in the case of ethyl cellulose and polyvinyl butyral (PVB), several percent of residue remained despite heating up to 900°C. According to the method for manufacturing a multilayer circuit board of the present invention, when acrylic resin is used as a binder, residual carbon in the circuit board can be reduced to 100 ppm or less (10 to 30 ppm or less). FIG. 2 is a diagram showing the influence of residual carbon on the dielectric strength of a multilayer ceramic circuit board, and shows that the dielectric breakdown voltage of the insulating layer decreases rapidly when residual oxygen exceeds 100 ppm. In addition, if the residual oxygen is 100 ppm or more during firing,
This causes blisters and pores in conductors or glass ceramics. As described above, in the method of manufacturing a ceramic circuit board, the present invention uses acrylic resin as an organic binder for green sheets and copper paste, and the amount of residual carbon in the ceramic circuit board can be reduced.
It can be reduced to 100 ppm or less (10 to 30 ppm or less), the dielectric strength voltage of the insulating layer can be maintained, and the electrical properties in the conductor layer will not be impaired. (7) Effects of the invention A highly reliable ceramic circuit board in which no carbon remains in the conductor portion after firing can be provided. The green sheet and copper paste can be fired together easily.
Ceramic circuit board manufacturing process can be simplified.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は有機バインダの窒素雰囲気中における
熱減量曲線を示す図、第2図は多層セラミツク回
路基板の絶縁耐圧と残留炭素の関係を示す図であ
る。
FIG. 1 is a diagram showing a thermal loss curve of an organic binder in a nitrogen atmosphere, and FIG. 2 is a diagram showing the relationship between dielectric strength voltage and residual carbon of a multilayer ceramic circuit board.

Claims (1)

【特許請求の範囲】 1 ガラスセラミツク回路基板用グリーンシート
上に銅ペーストを印刷して導体回路パターンを形
成する工程と、該導体回路パターンを形成したガ
ラスセラミツク回路基板用グリーンシートを積層
する工程と、該積層グリーンシートを不活性ガス
雰囲気中焼成する工程を有するセラミツク回路基
板の製造方法において、上記ガラスセラミツク回
路基板用グリーンシート及び上記銅ペーストの有
機バインダーとしてアクリル樹脂を用いたことを
特徴とするセラミツク回路基板の製造方法。 2 上記不活性ガス雰囲気が窒素雰囲気であるこ
とを特徴とする特許請求の範囲第1項記載のセラ
ミツク回路基板の製造方法。
[Claims] 1. A step of printing copper paste on a green sheet for a glass-ceramic circuit board to form a conductor circuit pattern, and a step of laminating the green sheets for a glass-ceramic circuit board on which the conductor circuit pattern is formed. , a method for producing a ceramic circuit board comprising the step of firing the laminated green sheet in an inert gas atmosphere, characterized in that an acrylic resin is used as an organic binder for the glass ceramic circuit board green sheet and the copper paste. Method for manufacturing ceramic circuit boards. 2. The method of manufacturing a ceramic circuit board according to claim 1, wherein the inert gas atmosphere is a nitrogen atmosphere.
JP23370582A 1982-12-29 1982-12-29 Manufacture of ceramic circuit substrate Granted JPS59124149A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23370582A JPS59124149A (en) 1982-12-29 1982-12-29 Manufacture of ceramic circuit substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23370582A JPS59124149A (en) 1982-12-29 1982-12-29 Manufacture of ceramic circuit substrate

Publications (2)

Publication Number Publication Date
JPS59124149A JPS59124149A (en) 1984-07-18
JPH035075B2 true JPH035075B2 (en) 1991-01-24

Family

ID=16959251

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23370582A Granted JPS59124149A (en) 1982-12-29 1982-12-29 Manufacture of ceramic circuit substrate

Country Status (1)

Country Link
JP (1) JPS59124149A (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60153193A (en) * 1984-01-23 1985-08-12 富士通株式会社 Conductive paste for ceramic circuit board
JPH0611018B2 (en) * 1988-01-07 1994-02-09 株式会社村田製作所 How to stack ceramic green sheets
JPH065656B2 (en) * 1988-02-19 1994-01-19 株式会社村田製作所 Method for manufacturing ceramic laminate
US5682018A (en) * 1991-10-18 1997-10-28 International Business Machines Corporation Interface regions between metal and ceramic in a metal/ceramic substrate
JPH05221760A (en) * 1992-02-04 1993-08-31 Shinko Electric Ind Co Ltd Production of metal paste for forming circuit and ceramic circuit board
JP5436699B2 (en) * 2011-02-04 2014-03-05 三菱電機株式会社 PATTERN FORMING METHOD AND SOLAR CELL MANUFACTURING METHOD

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5396692A (en) * 1977-02-03 1978-08-24 Dainippon Printing Co Ltd Method of making electrode plate
JPS55107295A (en) * 1979-02-09 1980-08-16 Hitachi Ltd Method of fabricating ceramic circuit board

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5396692A (en) * 1977-02-03 1978-08-24 Dainippon Printing Co Ltd Method of making electrode plate
JPS55107295A (en) * 1979-02-09 1980-08-16 Hitachi Ltd Method of fabricating ceramic circuit board

Also Published As

Publication number Publication date
JPS59124149A (en) 1984-07-18

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