JPH035074B2 - - Google Patents
Info
- Publication number
- JPH035074B2 JPH035074B2 JP61011647A JP1164786A JPH035074B2 JP H035074 B2 JPH035074 B2 JP H035074B2 JP 61011647 A JP61011647 A JP 61011647A JP 1164786 A JP1164786 A JP 1164786A JP H035074 B2 JPH035074 B2 JP H035074B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- insulating layer
- thermal conductivity
- oxidized
- crystalline silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000000758 substrate Substances 0.000 claims description 73
- 229910021419 crystalline silicon Inorganic materials 0.000 claims description 17
- 239000000463 material Substances 0.000 claims description 17
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 7
- 229910052799 carbon Inorganic materials 0.000 claims description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- 230000001590 oxidative effect Effects 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 229910052732 germanium Inorganic materials 0.000 claims description 5
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 5
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 4
- 125000005843 halogen group Chemical group 0.000 claims description 3
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 2
- 239000001257 hydrogen Substances 0.000 claims description 2
- 229910052739 hydrogen Inorganic materials 0.000 claims description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 2
- 230000003647 oxidation Effects 0.000 claims 4
- 238000007254 oxidation reaction Methods 0.000 claims 4
- 238000000034 method Methods 0.000 description 17
- 229910010271 silicon carbide Inorganic materials 0.000 description 13
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 11
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 7
- 210000003298 dental enamel Anatomy 0.000 description 4
- 229910003460 diamond Inorganic materials 0.000 description 4
- 239000010432 diamond Substances 0.000 description 4
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 239000000470 constituent Substances 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 238000009832 plasma treatment Methods 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 150000007513 acids Chemical class 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000003575 carbonaceous material Substances 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 239000002178 crystalline material Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 229910001882 dioxygen Inorganic materials 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910021385 hard carbon Inorganic materials 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000007733 ion plating Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- -1 silicon carbide nitride Chemical class 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000002230 thermal chemical vapour deposition Methods 0.000 description 1
- 231100000331 toxic Toxicity 0.000 description 1
- 230000002588 toxic effect Effects 0.000 description 1
- 238000009966 trimming Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Landscapes
- Insulating Bodies (AREA)
Description
[産業上の利用分野]
本発明は熱伝導性絶縁基板に関する。
[従来の技術・発明が解決しようとする問題点]
IC、LSIなどの発展によつて電子回路の小型
化、高集積化、高出力化が進むとともに、半導体
素子の実装密度も高密度化している。このような
半導体素子の高集積化、高出力化、高密度化にと
もない、チツプ当りの素子数は年々増大してお
り、チツプ当りの発熱量も増大している。この発
熱量の増大は、半導体素子の信頼性に大きな影響
を及ぼすため、熱伝導性の良好なパツケージ材料
に対する要望が強くなつてきている。またハイブ
リツドICでは、発熱部品が同一パツケージ内に
同居する様になり、高密度化実装をさらにすすめ
るためには、熱伝導性の良好な絶縁基板が必要と
なつている。
さらに、実際に素子を搭載することを考える
と、熱膨脹係数が素子および他のパツケージ構成
材料や回路基板の熱膨脹係数に近似しており、チ
ツプを直接ボンデイングしうることが好ましい。
前記両者を満足する基板として、Al+Al2O3
(アルミナ)、結晶性SiC、BeOなど製のセラミツ
ク基板や、金属基板をセラミツクで被覆したホウ
ロウ性の基板などが考えられているが、ホウロウ
性の基板をのぞきいずれも高価格で、その上
BeO製基板には毒性があり、結晶性SiC製基板に
は焼結助剤としてBeOを用いており、高周波で
の誘電率が1MHzで約40と大きいという問題があ
り、Al+Al2O3製基板には線膨脹係数が大きく、
Al2O3の絶縁性が不足するのでこれを補うために
エポキシコートが必要で、その結果、熱伝導性、
耐熱性が不充分であるという問題があり、安価な
ホウロウ製の基板のはあいには線膨脹係数が大き
く、ホウロウの熱伝導性もよくないなどの欠点を
有している。
本発明は、素子あるいは他のパツケージ構成材
料や回路基板の熱膨脹係数に近似した線膨脹率を
有し、熱伝導性および耐熱性が良好で厚膜回路を
作製することができ、表面が平滑な絶縁基板であ
つて、前記従来からの基板が有する欠点を有さな
い絶縁基板をうることを目的とするものである。
[問題点を解決するための手段]
本発明は、チツ化または酸化した結晶シリコン
基板表面に、熱伝導率の大きい絶縁層を被覆した
基板を用いると、上記問題を解決しうることを見
出したことによりなされたものであり、チツ化ま
たは酸化した結晶シリコン基板表面の少なくとも
一部を熱伝導率の大きい絶縁層で被覆した熱伝導
性絶縁基板に関する。
[実施例]
本発明に用いる結晶シリコン基板としては、た
とえば単結晶シリコンまたは多結晶シリコン製の
約100W/m・℃以上の熱伝導率を有する基板で
あつて、10〜200mmφまたは10〜200mm□で厚さ
0.1〜5mmのごとき形状を有する基板があげられ
る。
基板に使用する結晶シリコンは金属級のもので
もよく、p型あるいはn型にドープしていてもよ
い。また基板にスルーホールなどを形成するので
あれば、チツ化または酸化する前に形成しておく
のがスルーホール部の絶縁性をよくするなどの点
から好ましい。
本発明においては、前記基板をチツ化または酸
化した基板が用いられ、この基板の表面の少なく
とも一部が熱伝導率の大きい絶縁層で被覆されて
いる。
結晶シリコン基板のチツ化または酸化は、均質
で緻密な絶縁化とそのあと被覆する絶縁層との接
着性を強固にするために行なわれるものであり、
該基板の表面から少なくとも0.1μmの厚さまでチ
ツ化または酸化されているのが好ましく、0.5μm
の厚さまでチツ化または酸化されているのがさら
に好ましい、なおチツ化または酸化されている層
の厚さは5μm以下であることが、チツ化または
酸化層の内部応力歪やそれによるクラツクを防止
するという点から好ましい。
結晶シリコン基板をチツ化または酸化する方法
としては、チツ素ガスまたは酸素ガスの存在下、
通常のDC放電法、たとえばKHz〜MHz程度の高
周波を使用するPF放電法またはマイクロ波プラ
ズマ放電法などにより形成すればよいが、結晶シ
リコン基板を負の電位にバイアスしてプラズマ処
理するのが反応性が高く、密着強度も大きいとい
う点から好ましい。
前記表面の少なくとも一部を被覆するとは、少
なくとも必要な部分は被覆するという意味で、基
板表面の被覆される割合にはとくに限定はなく、
基板表面全体であつてもよく、ごく一部であつて
もよい。
熱伝導率の大きい、好ましくは50W/m・℃以
上、さらに好ましくは100W/m・℃以上の熱伝
導率を有する絶縁基板を形成する絶縁材料として
は、たとえばシリコン、ゲルマニウムおよび炭素
の少なくとも1種を主成分、すなわち30atm%以
上含む材料があげられ、この材料には水素または
ハロゲン族元素が、好ましくは0.1〜30atm%含
まれていてもよい。他の材料であつてもかまわな
いのはもちろんのことである。
前記のごとき材料の具体例としては、ダイヤモ
ンド、ダイヤモンド状炭素、シリコンカーバイ
ト、ゲルマニウムカーバイドなどの硬質カーボン
材料(特願昭60−83137号、同60−179025号、同
60−209620号各明細書などに記載の材料)、シリ
コンカーバイド、シリコンナイトライド、シリコ
ンゲルマニウム、シリコンゲルマニウムカーバイ
ド、シリコンカーバイドナイトライド、シリコン
オキサイド、シリコンナイトライドオキサイド、
シリコンカーバイドオキサイドなどのシリコンな
どを含む非単結晶質材料(特開昭60−82669号公
報、同60−119784号公報および特願昭59−187036
号明細書などに記載の材料)、c−BN、h−
BN、AlN、BPなどがあげられる。前記材料の
1種以上を用いて、好ましくは膜厚0.5〜10μm、
さらに好ましくは1〜10μmの絶縁層が形成され
る。2種以上の材料を用いて絶縁層を形成するば
あいには、複合した絶縁層にしてもよい。
絶縁層を形成する材料がダイヤモンド状炭素の
ばあいには、シリコンまたはゲルマニウム原子の
いずれか1種または両者を9atm%以下の範囲で
含むものが、内部応力が小さく、付着力が大き
く、よりダイヤモンドに近い物理的特性を有する
ため好ましく、0.1〜4atm%の範囲で含むものが
さらに好ましい。なお、膜中のシリコン量あるい
はゲルマニウム量が9atm%をこえると熱伝導率
が低下する傾向にある。
微量のSi、Geのこのような効果に関しては、
現在詳細は不明であるが、おそらくSi、Geのsp3
軌道がダイヤモンドの核生成に有効に働くものと
考えられる。
絶縁層を形成する材料が非晶質シリコンカーバ
イドのばあいには、水素原子およびハロゲン族元
素のうちの少なくとも1種を30atm%以下の範囲
で含むものが熱伝導率が大きいという点から好ま
しく、0.1〜10atm%の範囲で含むものがさらに
好ましい。
前記のごとき絶縁層は、通常10-6(Ω・cm)-1以
下、好ましくは10-8(Ω・cm)-1以下、さらに好ま
しくは10-9(Ω・cm)-1以下の電気伝導度と50V/
μm以上、さらに好ましくは100V/μm以上の
耐電圧を有するのが、絶縁性基板に用いるのに好
ましい。
つぎに本発明の熱伝導性絶縁基板の製法につい
て説明する。
チツ化または酸化した結晶シリコン基板表面に
絶縁層を形成する方法にはとくに限定はなく、前
記のごとき材料からなる絶縁層が形成されるかぎ
りいかなる方法も適応しうるが、前述の出願済の
公報や明細書に記載の方法が好適に採用されう
る。
このような方法の具体例としては、ダイヤモン
ド、ダイヤモンド状炭素、シリコンカーバイド、
非晶質シリコンカーバイド、六方晶BN、立法晶
BNなどからなる絶縁層を形成するばあいに適応
されうるDC放電プラズマCVD法、RF放電プラ
ズマCVD法、DC放電・RF放電両者混合のプラ
ズマCVD法、電界に直行する磁界をもつたDC放
電・RF放電両者混合のプラズマCVD法などがあ
げられる。ダイヤモンド、ダイヤモンド状炭素、
シリコンカーバイド、非晶質シリコンカーバイ
ド、などからなる絶縁層を形成する際に、基板上
で電界と直行する磁界をもつDC放電・RF放電両
者混合のプラズマCVD法を適応すると、より結
晶性で熱伝導性に優れた膜が高速で作製されるな
どのから好ましい。
基板上で電界と直行する磁界をもつDC放電・
RF放電両者混合のプラズマCVD法により光熱伝
動性絶縁基板を製造する際の具体的な方法として
は、たとえば第1図に示すように、RF投入電極
2側にチツ化または酸化した結晶シリコン基板を
セツトし、この電極に高周波チヨークコイル3を
とおして負のDC電圧、好ましくは−150〜−
600VのDC電圧を印加し、RFパワー、好ましく
は100〜400W(140〜560mW/cm2)のパワーを印
加し、好ましくは0.1〜20Torrの反応圧力、200
〜350℃の基板温度で、基板表面と平行に磁界B、
好ましくは100〜1000ガウスの磁界Bをかけなが
ら絶縁層を形成するごとき方法があげられる。な
お4はガス導入口である。
上記方法の他、イオンプレーテイング法、クラ
スタービーム法、熱CVD法、イオン化蒸着法な
ども採用しうる。
このようにして製造された本発明の基板は、熱
伝導率がほぼ単結晶シリコン並(120W/m・℃
程度)、表面ビツカース硬度が500以上、好ましく
は1500以上、さらに好ましくは2000以上、絶縁層
の種類により異なるが電気伝導度が1×10-6
(Ω・cm)-1以下、好ましくは1×10-8(Ω・cm)-1
以下、1MHzでの誘電率が20以下(シリコンカー
バイドのばあいには15以下)、1KHzでの誘電損失
が0.02以下のごとき特性を有するものである。
また、線膨脹係数は絶縁層を形成する基板とし
て結晶シリコン基板を用いているのでLSIやICチ
ツプとほぼ同じで、チツプを直接ボンデイングす
ることができ、800℃の加熱にたえるので高温処
理を必要とする厚膜回路用ハイブリツドIC基板
などのIC基板や多層基板材料に適する。また配
線用に銅などをメツキしたり、蒸着したりスパツ
ターしたりするのも容易である。さらに酸、アル
カリに対して非常に安定であり、絶縁層の密着性
がよく、スルーホールの信頼性も高い。
以下、本発明の基板を実施例に基づいて説明す
る。
実施例1〜8および比較例1
0.5mmtの単結晶Si基板に0.5mmφのスルーホー
ルをあけ、トリミング、研磨したのちプラズマ
CVD装置に入れた。基板はRF電極側に取付け、
基板に−100VのDC電圧を印加し、0.1TorrのO2
ガスを導入し、室温で0.1W/cm2の13.56MHzのRF
でプラズマ酸化した。酸化層の厚さはSIMSによ
り測定した。
ついで基板を200℃に上げ、ガスをSiH4とCH4
に変え、DC電圧を−50Vにして0.5Torr、RFパ
ワー0.1W/cm2でEg=2.5eVのa−SiCを堆積させ
た。
えられた基板の熱伝導度をレーザーフラツシユ
法で測定した。電導率はa−SiC上にAl電極を平
行につけた面方向と、Si裏面とa−SiCの厚さ方
向で測定した。
耐熱性の評価は500℃に3回上げてa−SiC膜
の変化を観察した。
結果を第1表に示す。なお第1表の○は良、×
は不良を示す。
[Industrial Field of Application] The present invention relates to a thermally conductive insulating substrate. [Problems to be solved by conventional technology/inventions] With the development of IC, LSI, etc., electronic circuits have become smaller, more highly integrated, and have higher output, and the packaging density of semiconductor elements has also increased. There is. As semiconductor devices become more highly integrated, have higher output power, and become more dense, the number of elements per chip is increasing year by year, and the amount of heat generated per chip is also increasing. This increase in heat generation has a significant effect on the reliability of semiconductor devices, and therefore there is an increasing demand for package materials with good thermal conductivity. In addition, in hybrid ICs, heat-generating components are now housed together in the same package, and insulating substrates with good thermal conductivity are required to further promote high-density packaging. Furthermore, when considering actually mounting the device, it is preferable that the coefficient of thermal expansion is close to that of the device, other package constituent materials, and the circuit board, so that the chip can be directly bonded. As a substrate that satisfies both of the above, Al+Al 2 O 3
Ceramic substrates made of (alumina), crystalline SiC, BeO, etc., and enamel substrates made of metal substrates coated with ceramic are being considered, but all of them are expensive except for enamel substrates.
BeO substrates are toxic, crystalline SiC substrates use BeO as a sintering aid, and the dielectric constant at high frequencies is as high as approximately 40 at 1MHz . has a large linear expansion coefficient,
Since Al 2 O 3 lacks insulating properties, an epoxy coat is required to compensate for this, resulting in improved thermal conductivity and
There is a problem of insufficient heat resistance, and substrates made of inexpensive enamel have disadvantages such as a large coefficient of linear expansion and poor thermal conductivity of the enamel. The present invention has a coefficient of linear expansion that is close to the coefficient of thermal expansion of elements or other package constituent materials and circuit boards, has good thermal conductivity and heat resistance, can produce thick film circuits, and has a smooth surface. The object of the present invention is to provide an insulating substrate that does not have the drawbacks of the conventional substrates. [Means for Solving the Problems] The present invention has found that the above problems can be solved by using a substrate whose surface is coated with an insulating layer having high thermal conductivity on the surface of a crystalline silicon substrate that has been oxidized or oxidized. The present invention relates to a thermally conductive insulating substrate in which at least a portion of the surface of a crystalline silicon substrate that has been oxidized or oxidized is covered with an insulating layer having high thermal conductivity. [Example] The crystalline silicon substrate used in the present invention is, for example, a substrate made of single crystal silicon or polycrystalline silicon and has a thermal conductivity of about 100 W/m・℃ or more, and has a diameter of 10 to 200 mmφ or 10 to 200 mm□. in thickness
Examples include substrates having a shape of 0.1 to 5 mm. The crystalline silicon used for the substrate may be of metallic grade and may be doped p-type or n-type. Furthermore, if through holes or the like are to be formed in the substrate, it is preferable to form them before forming or oxidizing the substrate in order to improve the insulation properties of the through holes. In the present invention, a substrate obtained by oxidizing or oxidizing the above substrate is used, and at least a portion of the surface of this substrate is covered with an insulating layer having high thermal conductivity. The crystalline silicon substrate is oxidized or oxidized in order to achieve homogeneous and dense insulation and to strengthen the adhesion with the subsequently covered insulation layer.
The substrate is preferably oxidized or oxidized to a thickness of at least 0.1 μm from the surface, and preferably 0.5 μm thick.
More preferably, the thickness of the oxidized or oxidized layer is 5 μm or less to prevent internal stress distortion of the oxidized or oxidized layer and cracks caused by it. This is preferable from the point of view of As a method for oxidizing or oxidizing a crystalline silicon substrate, in the presence of nitrogen gas or oxygen gas,
It can be formed by a normal DC discharge method, such as a PF discharge method or a microwave plasma discharge method that uses a high frequency of about KHz to MHz, but it is preferable to bias the crystalline silicon substrate to a negative potential and perform plasma treatment. It is preferable because it has high properties and adhesion strength. Covering at least a portion of the surface means that at least a necessary portion is covered, and there is no particular limitation on the proportion of the surface of the substrate to be covered.
It may be the entire surface of the substrate or only a small portion. The insulating material forming the insulating substrate having a high thermal conductivity, preferably 50 W/m・℃ or more, more preferably 100 W/m・℃ or more, is, for example, at least one of silicon, germanium, and carbon. As a main component, ie, 30 atm% or more, this material may contain hydrogen or a halogen group element, preferably 0.1 to 30 atm%. Of course, other materials may also be used. Specific examples of the above-mentioned materials include hard carbon materials such as diamond, diamond-like carbon, silicon carbide, and germanium carbide (Japanese Patent Application No. 60-83137, No. 60-179025,
60-209620 (materials described in each specification etc.), silicon carbide, silicon nitride, silicon germanium, silicon germanium carbide, silicon carbide nitride, silicon oxide, silicon nitride oxide,
Non-single-crystalline materials containing silicon such as silicon carbide oxide (JP-A-60-82669, JP-A-60-119784, and Japanese Patent Application JP-A-59-187036)
Materials described in the specification etc.), c-BN, h-
Examples include BN, AlN, BP, etc. Using one or more of the above materials, preferably a film thickness of 0.5 to 10 μm,
More preferably, an insulating layer with a thickness of 1 to 10 μm is formed. When an insulating layer is formed using two or more types of materials, a composite insulating layer may be used. When the material forming the insulating layer is diamond-like carbon, a material containing one or both of silicon or germanium atoms in a range of 9 atm% or less has lower internal stress and greater adhesion, and is better suited to diamond-like carbon. It is preferable because it has physical properties close to , and it is more preferable to contain it in the range of 0.1 to 4 atm %. Note that if the amount of silicon or germanium in the film exceeds 9 atm%, the thermal conductivity tends to decrease. Regarding such effects of trace amounts of Si and Ge,
Details are currently unknown, but probably Si, Ge sp 3
It is thought that the orbit works effectively for diamond nucleation. When the material forming the insulating layer is amorphous silicon carbide, it is preferable that the material contains at least one of hydrogen atoms and halogen group elements in a range of 30 atm% or less from the viewpoint of high thermal conductivity. More preferably, the content is in the range of 0.1 to 10 atm%. The insulating layer as described above usually has an electrical resistance of 10 -6 (Ω cm) -1 or less, preferably 10 -8 (Ω cm) -1 or less, more preferably 10 -9 (Ω cm) -1 or less. Conductivity and 50V/
It is preferable for use in an insulating substrate to have a withstand voltage of at least μm, more preferably at least 100 V/μm. Next, a method for manufacturing the thermally conductive insulating substrate of the present invention will be explained. There is no particular limitation on the method for forming an insulating layer on the surface of a crystalline silicon substrate that has been oxidized or oxidized, and any method can be applied as long as an insulating layer made of the above-mentioned materials can be formed. or the method described in the specification can be suitably employed. Examples of such methods include diamond, diamond-like carbon, silicon carbide,
Amorphous silicon carbide, hexagonal BN, cubic crystal
DC discharge plasma CVD method, RF discharge plasma CVD method, plasma CVD method that combines both DC discharge and RF discharge, which can be applied to forming an insulating layer made of BN etc. Examples include plasma CVD methods that combine both RF discharge and RF discharge. diamond, diamond-like carbon,
When forming an insulating layer made of silicon carbide, amorphous silicon carbide, etc., applying a plasma CVD method that mixes both DC discharge and RF discharge, which has a magnetic field perpendicular to the electric field on the substrate, can improve crystallinity and thermal properties. This method is preferable because a film with excellent conductivity can be produced at high speed. DC discharge with a magnetic field orthogonal to the electric field on the substrate
A specific method for manufacturing a photothermal conductive insulating substrate by a plasma CVD method that combines both RF discharge and discharge is, for example, as shown in FIG. A negative DC voltage, preferably between -150 and -
Apply a DC voltage of 600 V, apply RF power, preferably 100-400 W (140-560 mW/cm 2 ), preferably a reaction pressure of 0.1-20 Torr, 200
At a substrate temperature of ~350°C, a magnetic field B parallel to the substrate surface,
A preferred method is to form the insulating layer while applying a magnetic field B of 100 to 1000 Gauss. Note that 4 is a gas inlet. In addition to the above methods, ion plating methods, cluster beam methods, thermal CVD methods, ionization vapor deposition methods, etc. may also be employed. The substrate of the present invention manufactured in this way has a thermal conductivity almost equal to that of single crystal silicon (120 W/m・℃
degree), surface Vickers hardness is 500 or more, preferably 1500 or more, more preferably 2000 or more, and electrical conductivity is 1×10 -6 although it varies depending on the type of insulating layer.
(Ω・cm) -1 or less, preferably 1×10 -8 (Ω・cm) -1
The following characteristics include a dielectric constant of 20 or less at 1MHz (15 or less in the case of silicon carbide) and a dielectric loss of 0.02 or less at 1KHz. In addition, since a crystalline silicon substrate is used as the substrate for forming the insulating layer, the coefficient of linear expansion is almost the same as that of LSI and IC chips, and the chip can be directly bonded, and it can withstand heating up to 800°C, so high-temperature processing is not required. Suitable for IC substrates and multilayer substrate materials such as hybrid IC substrates for thick film circuits. It is also easy to plate, vapor deposit, or sputter copper for wiring. Furthermore, it is extremely stable against acids and alkalis, has good adhesion to the insulating layer, and has high through-hole reliability. Hereinafter, the substrate of the present invention will be explained based on Examples. Examples 1 to 8 and Comparative Example 1 A 0.5 mmφ through hole was drilled in a 0.5 mm thick single crystal Si substrate, and after trimming and polishing, plasma treatment was performed.
I put it in a CVD device. Attach the board to the RF electrode side,
Apply −100V DC voltage to the board and 0.1Torr O 2
Introducing gas and 13.56MHz RF of 0.1W/ cm2 at room temperature
plasma oxidized. The thickness of the oxide layer was measured by SIMS. The substrate was then raised to 200℃ and the gases were changed to SiH 4 and CH 4.
The DC voltage was changed to -50V, and a-SiC with Eg = 2.5 eV was deposited at 0.5 Torr and RF power of 0.1 W/ cm2 . The thermal conductivity of the obtained substrate was measured using a laser flash method. The electrical conductivity was measured in the plane direction where Al electrodes were attached parallel to the a-SiC, and in the thickness direction of the Si back surface and the a-SiC. Heat resistance was evaluated by raising the temperature to 500°C three times and observing changes in the a-SiC film. The results are shown in Table 1. Note that ○ in Table 1 indicates good, ×
indicates defective.
【表】
[発明の効果]
結晶シリコン基板をチツ化または酸化した上に
熱伝導率の大きい絶縁層を設けた本発明の基板
は、絶縁層が極めて高く、熱伝導率はSiとほぼ同
じで、その上繰返しの加熱によつても有害な剥離
を生じないなどの特徴があり、線膨脹係数は
LSI、ICなどのSiチツプと同じであるから直接ボ
ンデングできるという特徴がある。[Table] [Effects of the invention] The substrate of the present invention, in which an insulating layer with high thermal conductivity is provided on a crystalline silicon substrate made of silicon or oxidized, has an extremely high insulating layer and a thermal conductivity that is almost the same as that of Si. In addition, it does not cause harmful peeling even after repeated heating, and its coefficient of linear expansion is
Since it is the same as Si chips such as LSI and IC, it has the characteristic that it can be directly bonded.
第1図は本発明の基板を製造するのに用いるプ
ラズマCVD装置に関する説明図である。
(図面の主要符号)、1:チツ化または酸化し
た結晶シリコン基板。
FIG. 1 is an explanatory diagram of a plasma CVD apparatus used to manufacture the substrate of the present invention. (Main symbols in the drawings), 1: A crystalline silicon substrate that has been oxidized or oxidized.
Claims (1)
の少なくとも一部を熱伝導率の大きい絶縁層で被
覆した熱伝導性絶縁基板。 2 チツ化または酸化した結晶シリコン基板が、
結晶シリコン基板にスルーホールを設けたのちチ
ツ化または酸化したものである特許請求の範囲第
1項記載の基板。 3 結晶シリコン基板が単結晶シリコン基板また
は多結晶シリコン基板である特許請求の範囲第1
項記載の基板。 4 チツ化または酸化が結晶シリコン基板の表面
から少なくとも0.1μmの厚さまで生じている特許
請求の範囲第1項記載の基板。 5 チツ化または酸化が結晶シリコン基板の表面
から少なくとも0.5μmの厚さまで生じている特許
請求の範囲第1項記載の基板。 6 熱伝導率の大きい絶縁層の厚さが0.5〜10μm
である特許請求の範囲第1項記載の基板。 7 熱伝導率の大きい絶縁層の厚さが1〜10μm
である特許請求の範囲第1項記載の基板。 8 熱伝導率の大きい絶縁層の電気伝導度が10-6
(Ω・cm)-1以下である特許請求の範囲第1項記載
の基板。 9 熱伝導率の大きい絶縁層の電気伝導度が10-8
(Ω・cm)-1以下である特許請求の範囲第1項記載
の基板。 10 熱伝導率の大きい絶縁層が、シリコン、ゲ
ルマニウムおよび炭素の少なくとも1種を主成分
とし、水素またはハロゲン族元素を含んでいても
よい材料からなる特許請求の範囲第1項記載の基
板。[Scope of Claims] 1. A thermally conductive insulating substrate in which at least a portion of the surface of a crystalline silicon substrate that has been oxidized or oxidized is covered with an insulating layer having high thermal conductivity. 2. The crystalline silicon substrate that has been oxidized or oxidized is
2. The substrate according to claim 1, which is obtained by forming through holes in a crystalline silicon substrate and then forming or oxidizing the substrate. 3 Claim 1 in which the crystalline silicon substrate is a single crystal silicon substrate or a polycrystalline silicon substrate
Substrate described in section. 4. The substrate according to claim 1, wherein oxidation or oxidation occurs from the surface of the crystalline silicon substrate to a thickness of at least 0.1 μm. 5. The substrate of claim 1, wherein the oxidation or oxidation occurs from the surface of the crystalline silicon substrate to a thickness of at least 0.5 μm. 6 The thickness of the insulating layer with high thermal conductivity is 0.5 to 10 μm
A substrate according to claim 1. 7 The thickness of the insulating layer with high thermal conductivity is 1 to 10 μm
A substrate according to claim 1. 8 The electrical conductivity of the insulating layer with high thermal conductivity is 10 -6
(Ω·cm) −1 or less, the substrate according to claim 1. 9 The electrical conductivity of the insulating layer with high thermal conductivity is 10 -8
(Ω·cm) −1 or less, the substrate according to claim 1. 10. The substrate according to claim 1, wherein the insulating layer with high thermal conductivity is made of a material containing at least one of silicon, germanium, and carbon as a main component, and may also contain hydrogen or a halogen group element.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1164786A JPS62169489A (en) | 1986-01-22 | 1986-01-22 | Heat conductive insulating substrate |
EP19860115233 EP0221531A3 (en) | 1985-11-06 | 1986-11-04 | High heat conductive insulated substrate and method of manufacturing the same |
EP94112466A EP0635871A2 (en) | 1985-11-06 | 1986-11-04 | High heat conductive insulated substrate and method of manufacturing the same |
US06/927,211 US4783368A (en) | 1985-11-06 | 1986-11-05 | High heat conductive insulated substrate and method of manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1164786A JPS62169489A (en) | 1986-01-22 | 1986-01-22 | Heat conductive insulating substrate |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62169489A JPS62169489A (en) | 1987-07-25 |
JPH035074B2 true JPH035074B2 (en) | 1991-01-24 |
Family
ID=11783742
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1164786A Granted JPS62169489A (en) | 1985-11-06 | 1986-01-22 | Heat conductive insulating substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62169489A (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050274774A1 (en) * | 2004-06-15 | 2005-12-15 | Smith James D | Insulation paper with high thermal conductivity materials |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61172355A (en) * | 1985-01-25 | 1986-08-04 | Matsushita Electric Works Ltd | High-heat conductive insulating substrate |
-
1986
- 1986-01-22 JP JP1164786A patent/JPS62169489A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61172355A (en) * | 1985-01-25 | 1986-08-04 | Matsushita Electric Works Ltd | High-heat conductive insulating substrate |
Also Published As
Publication number | Publication date |
---|---|
JPS62169489A (en) | 1987-07-25 |
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