JPH0346844A - Instantaneous pull-in system for synchronized sampling time - Google Patents

Abstract

PURPOSE:To instantaneously settle synchronized sampling by preliminarily setting the delay time of a transmission line to a corresponding value and matching the synchronous signal of a present station to that of a high-order station based on this value at the time of rise of a device. CONSTITUTION:A power-on detecting circuit 7 detects power-on of the present device to output a detection signal E. A counting circuit 8 starts counting by a synchronous signal B of the reception high-order station and outputs the counted value. A delay amount setting switch 9 sets the information of the delay time of the transmission line and outputs a delay value. A second comparator 10 compares the counted value of the counting circuit 8 and the delay value set by the delay amount setting switch 9 with each other and outputs a coincidence signal F at the time of coincidence between them. A pulse generating circuit 11 responds to this signal F to generate a reset pulse G and sends this reset pulse G to a frequency dividing circuit 3. Thus, the transmission timing is fixed. The normal phase control is performed after fixing the transmission timing.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a synchronization pull-in method when starting up various systems that employ sampling time synchronization.

[Prior art] As shown in Fig. 3, in the conventional sampling time synchronization method, in order to shorten the synchronization pull-in time, sampling time synchronization is established by changing the frequency of phase control in stages. ing.

Referring to FIG. 3, a clock signal generated from an oscillator 1 is subjected to phase control by an automatic phase control circuit 2 based on an error signal to be described later, and then frequency-divided by a frequency dividing circuit 3. The output of this frequency dividing circuit 3 is output as the transmission timing (local station synchronization signal) A of the own device. On the other hand, the upper station (
A synchronization signal sent from the host device (not shown) to the device itself via a transmission path (not shown) is received by the upper station receiving section 4. The upper station receiving section 4 outputs the received upper station synchronization signal B, measures the delay time of the transmission path between the upper station and its own device, and outputs a delay time signal. The time measurement circuit 5 measures the time difference between the received upper station synchronization signal B and the transmission timing A, and outputs a time difference signal C. The first comparison circuit 6 compares the time difference signal C and the delay time signal C, and sends the error signal representing the difference therebetween to the automatic phase control circuit 2. That is, the automatic phase control circuit 2 performs phase control so that the time difference signal C and the delay time signal C become equal (CD).

Problems to be solved by invention C] In the conventional synchronous pull-in method described above, when starting up the own device,
The local station synchronization signal A is asynchronous with the higher station synchronization signal B that the local device should follow.

For this reason, the synchronization pull-in time is determined by the time distance between the local station synchronizing signal A and the higher station synchronizing signal B, and the $ of phase control in the local device.
It is determined by the i control width and the control frequency, and has the disadvantage that synchronization cannot be completed immediately and it takes a long time to complete the synchronization.

[Means for solving the problem] The sampling time synchronization immediate pull-in method according to the present invention has the following features:
In a system that receives a synchronization signal from an upper station via a transmission line and synchronizes the sampling time of its own device in response to the received synchronization signal, it detects that the power of its own device is turned on. a power-on detection means for outputting a detection signal; a counting means for starting counting at the received synchronization signal after receiving the detection signal and outputting a counted value; A delay value setting means for setting information and outputting a delay value, and a comparison means for comparing the counted value and the delay value and outputting a coincidence signal when these values match, The sampling time of the own device is set to the time when .

[Examples] Examples of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a phase control section to which a sampling time synchronization immediate pull-in method according to an embodiment of the present invention is applied.

The illustrated phase control section includes a power-on detection circuit 7 and a counting circuit 8.
, a delay amount setting switch 9, a second comparator circuit 10, and a pulse generation circuit 11 are added, but the configuration is similar to that of the conventional phase control section shown in FIG.

The normal operation is the same as that of the conventional phase control section described with reference to FIG. 3, so the explanation thereof will be omitted.

The operation at the time of starting up the device will be explained below.

The power-on detection circuit 7 detects that the power of the device itself is turned on, and outputs a detection signal E. After receiving the detection signal E, the counting circuit 8 starts counting based on the received upper station synchronization signal B, and outputs the counted value.

The delay amount setting switch 9 sets information on the delay time of the transmission path and outputs a delay value. The second comparison circuit 10 compares the count value counted by the counting circuit 8 and the delay value set by the delay amount setting switch 9, and outputs a match signal F when these values match.

The pulse generating circuit 11 generates a reset pulse G in response to the coincidence signal F, and sends this reset pulse G to the frequency dividing circuit 3. This fixes the transmission timing.

After the transmission timing is fixed, the normal phase control described above is performed. Note that the delay amount setting switch 9 sets a value corresponding to the transmission delay time d between the upper station and the own device.

FIG. 2 is a time chart showing the transmission status of synchronization signals between the upper station and the own device. The synchronization signal of the upper station reaches the own device with a delay of transmission delay time d, and the received upper station synchronization signal B
is received by the own device.

In the own device, the received higher station synchronization signal B and the transmission delay time d are used to generate the own station synchronization signal (transmission timing) when the device is started up.
Fix A at point H.

[Effects of the Invention] As explained above, in the present invention, a value corresponding to the delay time of the transmission path is set in advance, and based on that value, when the device is started up, the own station synchronization signal is synchronized with the upper station. By matching with the signal, the time distance corresponding to the transmission delay time between the own device and the higher-level station can be eliminated, and sampling synchronization can be established immediately.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a phase control unit to which a sampling time synchronization immediate pull-in method according to an embodiment of the present invention is applied, and FIG. 2 is a time diagram for explaining the sampling time synchronization immediate pull-in method of the present invention. FIG. 3 is a block diagram showing the configuration of a conventional phase control section. 1... Oscillator, 2... Automatic phase control circuit, 3...
Frequency dividing circuit, 4... Upper station receiving section, 5... Time counting circuit, 6... Comparison circuit, 7... Power-on detection circuit, 8...
・Counting circuit, 9...Delay amount setting switch, 10...
Comparison circuit, 11... pulse generation circuit. Figure 3

Claims (1)

[Claims] 1. Receiving a synchronization signal from an upper station via a transmission line,
In a system that performs sampling time synchronization of its own device in response to the received synchronization signal, power-on detection means detects that the power of the own device is turned on and outputs a detection signal; After receiving a signal, counting means starts counting based on the received synchronization signal and outputs a counted value; and delay value setting means sets information on a delay time of the transmission path and outputs a delay value. , Comparing means for comparing the count value and the delay value and outputting a coincidence signal when these values match, and the time when the coincidence signal is generated is set as the sampling time of the own device. Sampling time synchronization immediate pull-in method.