JPH0346345A - Semiconductor device - Google Patents

Abstract

PURPOSE:To eliminate a difference in level on the surface and to deal with a case where a dielectric strength is required by a method wherein an isolation region used to insulate and isolate adjacent elements is formed of two isolation regions. CONSTITUTION:An isolation region used to insulate and isolate adjacent elements is constituted of the following: a first isolation region which has been formed by filling an insulating material into a groove 2 formed on the surface of a semiconductor substrate in such a way that the upper face of the material is nearly on the same face as the surface of the semiconductor substrate 1; and a second isolation region composed of a thick insulating oxide film 7 which has oxidized selectively the surface of the semiconductor substrate 1. Thereby, the elements are flattened by the first isolation region, a characteristic of the elements is improved, and a high density and a high integration are realized. In addition, a dielectric strength property between the elements can be enhanced by using the second isolation region.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and more particularly to a semiconductor device in which an insulating oxide film for isolation between elements is improved.

[Conventional technology]

Conventionally, in this type of semiconductor device, an insulating oxide film for isolation between elements is formed by a selective oxidation method using a silicon nitride film. For example, FIG. 3 shows an example of this, in which the active region of the semiconductor substrate is selectively covered with a silicon nitride film, and then an impurity implantation layer 6 is formed through a window in the silicon nitride film.
An insulating oxide film 7 is formed by selectively oxidizing the region exposed in the parenthesized window. Furthermore, elements such as MOS transistors are formed in each separated active region.

Note that 8 is a gate oxide film, 9 is a gate electrode, and 1° is a glabella insulating film.

[Problem to be solved by the invention]

In the conventional semiconductor device described above, since the insulating oxide film 7 for element isolation is grown toward the surface of the semiconductor substrate 1, its upper surface is higher than the surface of the semiconductor substrate 1. For this reason, a step is formed in the insulating oxide film 7, and this step gradually becomes more prominent and steeper as the gate electrode 9 and interlayer insulating film 10 are formed. There is a problem in that it sometimes induces defective pattern formation, resulting in a decrease in yield.

In addition, during selective oxidation of the insulating oxide film 7, the insulating oxide film 7 is dug in toward the bottom of the silicon nitride film, and the active region is reduced from the designed value, resulting in poor characteristics and quality deterioration due to short channel effects, etc. There is also a problem that there is a limit to high density and high integration.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device having an insulating oxide film for element isolation that eliminates the above-mentioned problems.

[Means to solve the problem]

In the semiconductor device of the present invention, an isolation region for insulating and isolating adjacent elements is formed by filling a groove provided in the surface of a semiconductor substrate with an insulating material so that its upper surface is substantially flush with the surface of the semiconductor substrate. The second isolation region is made of a thick insulating oxide film obtained by selectively oxidizing the surface of the semiconductor substrate.

[Operation] In this configuration, the device is flattened in the first isolation region,
It not only improves device characteristics but also enables higher density and higher integration. Further, the voltage resistance between elements is improved in the second isolation region.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a sectional view of a first embodiment of the present invention.

In this figure, a relatively deep groove 2 with a narrow width is etched in an active region of a semiconductor substrate 1, for example, in an element bone MSR region of a cell array portion, by photolithography. Then, impurities are introduced into the semiconductor substrate 1 through this groove 2 to form an impurity injection layer 3 as a channel stopper. Further, after the inner surface of the groove 2 is oxidized to form a thin oxide film 4, an insulating oxide film 5 is embedded in the groove 2. Thereafter, the surface of this insulating oxide film 5 is etched so that the surface is at the same height as the active region of the semiconductor substrate 1 to form a first isolation region.

Further, after forming a silicon nitride film over the entire surface of the semiconductor substrate 1, a window is provided in another element isolation region, impurities are introduced through this window to form an impurity injection layer 6, and the silicon nitride film is formed on the silicon nitride film. A thermal oxidation treatment is performed using the film pattern as a protective film, and the semiconductor substrate 1 within the window is selectively oxidized to form a thick insulating oxide film 7.
form.

The upper surface of this thick insulating oxide film 7 becomes a second isolation region located above the active region.

In addition, 8 is a gate oxide film for configuring the cell array part A consisting of MOS transistors in the active region 5, 9 is a gate electrode, and 10 is an insulating film between the eyebrows.

In the semiconductor device configured in this way, each MO in the active region
Since the upper surfaces of the 3I-transistors are separated from each other by a first isolation region made of an insulating oxide film 5 having the same height as the surface of the semiconductor substrate 1, no surface step is caused by the isolation region in the active region. , it is possible to achieve flattening in this region. As a result, even if the cell array A is formed by the gate electrode 91, interlayer insulating film 10, etc., the surface level difference does not become noticeable, and the coverage of the upper wiring etc. is improved.

On the other hand, in the second isolation region, element isolation is performed by the thick insulating oxide film 7, so that isolation with high breakdown voltage can be achieved. In this case, even if a surface step occurs in this insulating oxide film 7,
Since the insulating oxide film 7 is formed at sufficient intervals, the step difference on the surface does not become noticeable.

FIG. 2 is a sectional view of a second embodiment of the present invention, and the same parts as in FIG. 1 are given the same reference numerals.

This embodiment shows an example in which a first isolation region is formed in a cell array portion, that is, an active region, and a second isolation region is selectively formed in a portion thereof. For example, the cell array part B is separated by a second isolation region 7 formed by selective oxidation, and the other cell array part A is separated by a first isolation region 5 using a groove 2. .

This configuration is effective when dielectric strength is required in a portion between the cell array sections. Note that even if this configuration is adopted, the second isolation region is selectively formed within the active region, so the step does not become steep.

〔Effect of the invention〕

As explained above, the present invention provides an isolation region for isolating adjacent elements by a first isolation region and a second isolation region, and the first isolation region is an insulation region filled in a groove. Since it is composed of an oxide film, the surface level difference is eliminated, the surface is flattened, the coverage of the upper wiring is improved, and its reliability is improved. Furthermore, since the second region #i is selectively formed of a thick insulating oxide film, it is possible to meet the requirement of dielectric breakdown voltage.

[Brief explanation of drawings]

FIG. 1 is a sectional view of a first embodiment of the invention, FIG. 2 is a sectional view of a second embodiment of the invention, and FIG. 3 is a sectional view of a conventional semiconductor device. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Groove, 3... Impurity injection layer, 4... Thin oxide film, 5... Insulating oxide film, 6...
- Impurity injection layer, 7... thick insulating oxide film, 8... gate oxide film, 9... gate electrode, 10... interlayer insulating film.

Claims (1)

[Claims] 1. In a semiconductor device in which adjacent elements are insulated and separated by an insulating oxide film provided on the surface of a semiconductor substrate, a region for insulation isolation is created by filling a groove provided in the surface of the semiconductor substrate with an insulating material. A first isolation region whose upper surface is formed substantially flush with the surface of the semiconductor substrate, and a second isolation region made of a thick insulating oxide film obtained by selectively oxidizing the surface of the semiconductor substrate. Semiconductor equipment.