JPH0345535B2 - - Google Patents
Info
- Publication number
- JPH0345535B2 JPH0345535B2 JP57016598A JP1659882A JPH0345535B2 JP H0345535 B2 JPH0345535 B2 JP H0345535B2 JP 57016598 A JP57016598 A JP 57016598A JP 1659882 A JP1659882 A JP 1659882A JP H0345535 B2 JPH0345535 B2 JP H0345535B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- back surface
- substrate
- defects
- laser
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000000758 substrate Substances 0.000 claims description 43
- 239000004065 semiconductor Substances 0.000 claims description 35
- 239000010409 thin film Substances 0.000 claims description 15
- 238000000034 method Methods 0.000 claims description 14
- 230000000694 effects Effects 0.000 claims description 13
- 238000005247 gettering Methods 0.000 claims description 12
- 238000004519 manufacturing process Methods 0.000 claims description 8
- 239000000126 substance Substances 0.000 claims description 6
- 238000010894 electron beam technology Methods 0.000 claims description 3
- 238000002844 melting Methods 0.000 claims 1
- 230000008018 melting Effects 0.000 claims 1
- 230000007547 defect Effects 0.000 description 17
- 229910052710 silicon Inorganic materials 0.000 description 17
- 239000010703 silicon Substances 0.000 description 17
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 15
- 229910052581 Si3N4 Inorganic materials 0.000 description 11
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 11
- 239000010408 film Substances 0.000 description 10
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 8
- 238000010438 heat treatment Methods 0.000 description 8
- 239000007789 gas Substances 0.000 description 7
- 229910021529 ammonia Inorganic materials 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 238000010521 absorption reaction Methods 0.000 description 3
- 238000011109 contamination Methods 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 229910001385 heavy metal Inorganic materials 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 150000003376 silicon Chemical class 0.000 description 2
- 229910052582 BN Inorganic materials 0.000 description 1
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- BUMGIEFFCMBQDG-UHFFFAOYSA-N dichlorosilicon Chemical compound Cl[Si]Cl BUMGIEFFCMBQDG-UHFFFAOYSA-N 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 230000002195 synergetic effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Drying Of Semiconductors (AREA)
- Formation Of Insulating Films (AREA)
Description
【発明の詳細な説明】
この発明は、半導体基板中に内在する欠陥の除
去さらにプロセス途中で導入される欠陥の除去を
効果的に行なわせる半導体装置の製造方法に関す
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device that effectively removes defects inherent in a semiconductor substrate as well as defects introduced during the process.
半導体基板における欠陥は、この基板に対して
形成される半導体素子の電気的特性に対して悪影
響をおよぼすことは、よく知られている。半導体
基板、例えばシリコン基板には、シリコン結晶製
作工程中おいて結晶中に誘起される欠陥、および
半導体素子形成工程中の熱処理によつて結晶中の
酸素〔O2〕、炭素〔Ｃ〕等の不純物が核となつて
発生する欠陥等が存在する。現在のように、１つ
の半導体基板に対して多数の半導体素子を形成す
るように、集積度を向上させるようにした場合、
上記のような半導体基板中の欠陥は大きな問題と
なるものであり、集積度を向上させる場合に上記
のような欠陥の発生防止の問題はさらに重要性を
増すものである。 It is well known that defects in a semiconductor substrate have an adverse effect on the electrical characteristics of a semiconductor element formed on this substrate. A semiconductor substrate, for example, a silicon substrate, has defects such as oxygen [O 2 ] and carbon [C] in the crystal due to defects induced in the crystal during the silicon crystal manufacturing process and heat treatment during the semiconductor element forming process. There are defects caused by impurities as nuclei. If we try to increase the degree of integration by forming a large number of semiconductor elements on one semiconductor substrate, as we do now,
Defects in semiconductor substrates as described above pose a serious problem, and when increasing the degree of integration, the problem of preventing the occurrence of defects as described above becomes even more important.
従来、このような半導体基板に内在する欠陥の
発生防止のためには、例えば素子の形成されない
半導体基板の背面に対してかき傷を形成したり、
リン等の不純物を拡散したり、あるいはイオン注
入さらにはレーザ等を照射して、半導体基板の背
面部に欠陥の吸収源を形成させることによつて、
加熱処理工程において発生する欠陥等を、上記吸
収源に吸収させるいわゆるゲツタリングが行なわ
れている。 Conventionally, in order to prevent the occurrence of defects inherent in such semiconductor substrates, for example, scratches are formed on the back surface of the semiconductor substrate where no elements are formed, or
By diffusing impurities such as phosphorus, ion implantation, or irradiation with laser, etc., a defect absorption source is formed on the back side of the semiconductor substrate.
So-called gettering is performed in which defects generated during the heat treatment process are absorbed by the absorption source.
第１図はその具体的手段を説明するもので、ま
ずＡ図に示すシリコン基板１１の表面１２には、
従来から知られている手段で素子の形成されるも
ので、この表面１２はポリツシユされ鏡面とされ
ている。そして、このシリコン基板１１の背面１
３に対して、上記素子の形成工程を行なうに先立
ち、Ｂ図に示すようにレーザを例えば15J／cm2程
度照射し、あるいはイオン注入等でダメージ層１
４を形成する。 FIG. 1 explains the specific means. First, on the surface 12 of the silicon substrate 11 shown in FIG.
The element is formed by conventionally known means, and the surface 12 is polished to a mirror surface. Then, the back side 1 of this silicon substrate 11
3, before performing the above element formation process, the damaged layer 1 is irradiated with a laser of, for example, about 15 J/cm 2 as shown in Figure B, or by ion implantation, etc.
form 4.
また、Ｃ図に示すようにシリコン基板１１の背
面１３に対して、例えばLPCVD等で2000Å程度
の窒化シリコン（Si3N4）、多結晶シリコン等の
薄膜１５を堆積し、応力場を形成する。 Further, as shown in Figure C, a thin film 15 of about 2000 Å of silicon nitride (Si 3 N 4 ), polycrystalline silicon, etc. is deposited on the back surface 13 of the silicon substrate 11 by, for example, LPCVD to form a stress field. .
このように、シリコン基板１１に対して、ダメ
ージ層１４あるいは薄膜１５による歪層が存在す
ると、加熱処理工程中において発生する微小欠陥
の核となる酸素や炭素等の不純物、あるいは熱処
理に伴なつて混入する重金属等の汚染を吸収し、
欠陥の発生を防止するようになるものである。 As described above, if a strained layer due to the damaged layer 14 or the thin film 15 exists on the silicon substrate 11, impurities such as oxygen and carbon, which become the nucleus of micro defects generated during the heat treatment process, or impurities caused by the heat treatment. Absorbs contamination such as heavy metals,
This prevents the occurrence of defects.
しかし、Ｂ図に示したダメージ層１４を形成す
る手段では、このダメージ層１４が浅いものであ
るために、熱処理を行なうとこのダメージ層１４
が消失し、ゲツタリング能力が消失する欠点があ
る。また、Ｃ図の薄膜１５を形成する手段では、
シリコン基板１１の背面１３のみに窒化シリコン
等の薄膜を堆積するものである。このため、例え
ばこの基板１１の表面１２のみにCVD等で酸化
膜を形成し、次に基板１１表面１２および背面１
３に窒化シリコン膜を形成し、その後シリコン基
板１１の表面１２の窒化シリコン膜を除去するよ
うな複雑な工程を必要とするようにする。さら
に、窒化シリコン膜を形成する際に熱処理を必要
とするようになるものである。 However, with the means for forming the damaged layer 14 shown in FIG.
The disadvantage is that the gettering ability disappears. Furthermore, in the means for forming the thin film 15 shown in Figure C,
A thin film of silicon nitride or the like is deposited only on the back surface 13 of the silicon substrate 11. For this reason, for example, an oxide film is formed only on the front surface 12 of the substrate 11 by CVD or the like, and then an oxide film is formed on the front surface 12 and the back surface 1 of the substrate 11.
This requires complicated steps such as forming a silicon nitride film on the surface 12 of the silicon substrate 11 and then removing the silicon nitride film on the surface 12 of the silicon substrate 11. Furthermore, heat treatment is required when forming the silicon nitride film.
さらに、上記のような吸収源を形成する際に、
重金属等の汚染を伴なうおそれもある。 Furthermore, when forming the above-mentioned absorption source,
There is also a risk of contamination with heavy metals, etc.
この発明は上記のような点に鑑みなされたもの
で、不要な熱処理を施す必要がなく、さらに上記
レーザによるゲツタリング効果と共に薄膜等の応
力によるゲツタリング効果とが相乗作用して、よ
り効果的に欠陥発生防止効果を向上させ得るよう
にする半導体装置の製造方法を提供しようとする
ものである。 This invention was made in view of the above points, and there is no need to perform unnecessary heat treatment.Furthermore, the gettering effect caused by the laser and the gettering effect caused by the stress of the thin film work synergistically to more effectively eliminate defects. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can improve the prevention effect.
すなわち、この発明に係る半導体の製造方法に
あつては、半導体基板の背面に反応性物質を堆積
し、あるいは反応性ガス雰囲気中で、すなわち少
なくとも背面に反応性物質の存在するガス雰囲気
中等の、半導体基板の背面に反応性物質が存在す
る状態で、この半導体基板の背面にレーザあるい
は電子線等のエネルギー線を照射して半導体基板
の背面部を溶融し、ダメージ層とゲツタリング効
果を有する反応生成薄膜層を同時に形成させるよ
うにするものである。 That is, in the semiconductor manufacturing method according to the present invention, a reactive substance is deposited on the back side of a semiconductor substrate, or in a reactive gas atmosphere, that is, at least in a gas atmosphere where a reactive substance is present on the back side. In the presence of a reactive substance on the back surface of the semiconductor substrate, the back surface of the semiconductor substrate is irradiated with an energy beam such as a laser or an electron beam to melt the back surface of the semiconductor substrate, creating a damaged layer and a reaction that has a gettering effect. The thin film layer is formed at the same time.
以下図面を参照してこの発明の一実施例に係る
半導体の製造方法を説明する。まず、第２図に示
すように、アンモニア（NH3）等の反応性のガ
ス雰囲気（反応性物質）１６の中に、第１図のＡ
で示したようなシリコン基板１１を設定し、この
シリコン基板１１の背面１３に対して、例えば
15J／cm2のレーザ照射を行なう。そして、シリコ
ン基板１１の背面１３のみに、レーザ照射による
熱で溶融したシリコンが、
3Si＋4NH3→Si3N4＋6H2
のような反応を起こし、第３図に示すようにシリ
コン基板１１の背面１３に窒化シリコン
（Si3N4）の薄膜１７が形成される。 DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor manufacturing method according to an embodiment of the present invention will be described below with reference to the drawings. First, as shown in FIG. 2, in a reactive gas atmosphere (reactive substance) 16 such as ammonia (NH 3 ),
A silicon substrate 11 as shown in is set up, and for example, the back surface 13 of this silicon substrate 11 is
Perform laser irradiation at 15 J/cm 2 . Then, only on the back surface 13 of the silicon substrate 11, the silicon melted by the heat generated by the laser irradiation causes a reaction such as 3Si+4NH 3 →Si 3 N 4 +6H 2 , and as shown in FIG. A thin film 17 of silicon nitride (Si 3 N 4 ) is then formed.
ここで、ガス雰囲気１６は、上記のようにアン
モニアだけでなく、例えばシラン（SiH4）ある
いはジクロロシラン（SiH2Cl2）とアンモニアの
雰囲気、すなわち「SiH4＋NH3」あるいは
「SiH2Cl2＋NH3」等の窒化シリコン（Si3N4）膜
の形成可能な雰囲気ならばよい。 Here, the gas atmosphere 16 is not only ammonia as described above, but also an atmosphere of, for example, silane (SiH 4 ) or dichlorosilane (SiH 2 Cl 2 ) and ammonia, that is, "SiH 4 +NH 3 " or "SiH 2 Cl 2 Any atmosphere that can form a silicon nitride (Si 3 N 4 ) film, such as "+NH 3 ", may be used.
また、雰囲気１６を例えば「O2」「SiH4＋O2」
等で構成すれば、シリコン基板１１の背面１３に
SiO2あるいはSiH4等によつて多結晶シリコンの
薄膜が形成されるようになり、前記窒化シリコン
膜堆積効果と同様の効果を得られる。 In addition, the atmosphere 16 may be, for example, "O 2 " or "SiH 4 +O 2 ".
etc., on the back surface 13 of the silicon substrate 11.
A thin film of polycrystalline silicon is now formed using SiO 2 or SiH 4 or the like, and the same effect as the silicon nitride film deposition effect described above can be obtained.
すなわち、上記のようにガス雰囲気１６中でレ
ーザ照射することによつて、シリコン基板１１の
背面１３に、レーザによるダメージ層と、窒化シ
リコンあるいは多結晶シリコン等の薄膜の形成が
同時に行なわれるようになる。 That is, by irradiating the laser in the gas atmosphere 16 as described above, a layer damaged by the laser and a thin film of silicon nitride or polycrystalline silicon are simultaneously formed on the back surface 13 of the silicon substrate 11. Become.
したがつて、このような手段によればシリコン
基板１１の背面１３に対して、熱処理工程を必要
とせずに、しかも工程を特に増加させることな
く、窒化シリコン等の薄膜を形成することがで
き、この薄膜によるゲツタリング効果とレーザ照
射による重金属等の汚染のないダメージ層の形成
によるゲツタリング効果とも相乗効果が得られ、
後に加熱処理工程を経ても上記ゲツタリング効果
は消滅せず、ほぼ全工程にわたつてゲツタリング
能力が維持される。すなわち、この半導体基板を
使用して構成される半導体素子の特性および製造
歩留りを、効果的に向上させることができる。 Therefore, according to such means, a thin film of silicon nitride or the like can be formed on the back surface 13 of the silicon substrate 11 without requiring a heat treatment process and without increasing the number of processes. A synergistic effect is obtained between the gettering effect of this thin film and the gettering effect due to the formation of a damaged layer free of contamination such as heavy metals due to laser irradiation.
The gettering effect does not disappear even after a heat treatment process, and the gettering ability is maintained throughout almost the entire process. That is, the characteristics and manufacturing yield of a semiconductor element constructed using this semiconductor substrate can be effectively improved.
尚、上記説明ではレーザ照射を半導体基板１１
の背面１３全面に行なうようにしたが、これはラ
イン状あるいは格子状、同心円状、らせん状等の
部分的照射を行なうようにしてもよい。このよう
にした場合には、背面１３の全面に照射した場合
よりも、半導体基板１１に加わる応力を小さくす
ることができる。さらには半導体基板表面のいわ
ゆるスクライブラインに形成してもよい。 Note that in the above description, laser irradiation is performed on the semiconductor substrate 11.
Although the entire back surface 13 is irradiated, partial irradiation may be performed in the form of lines, grids, concentric circles, spirals, etc. In this case, the stress applied to the semiconductor substrate 11 can be made smaller than when the entire surface of the back surface 13 is irradiated. Furthermore, it may be formed on a so-called scribe line on the surface of a semiconductor substrate.
また、上記実施例では、アンモニア等のガスを
レーザ照射時において導入したが、レーザ照射前
に半導体基板１１の背面１３に、この基板１１と
反応するような膜（反応性物質）、例えば粒子状
のモリブデン〔Mo〕、ボロンナイトライド、リ
ン等をあらかじめ堆積しておいてもよい。 Further, in the above embodiment, a gas such as ammonia was introduced during laser irradiation, but before laser irradiation, a film (reactive substance) that reacts with this substrate 11, such as a particulate Molybdenum [Mo], boron nitride, phosphorus, etc. may be deposited in advance.
また、レーザ照射によつて形成された窒化シリ
コン膜等は、レーザ照射部のみに形成されるよう
にしておく、さらにレーザの照射部および未照射
部の全面に上記膜が形成されるように、レーザの
波長により任意選定するようにしてもよい。 Further, the silicon nitride film or the like formed by laser irradiation should be formed only on the laser irradiated area, and further, the film should be formed on the entire surface of the laser irradiated area and the non-irradiated area. It may be arbitrarily selected depending on the wavelength of the laser.
さらに上記実施例では、半導体基板１１の背面
にレーザ照射してシリコンを溶融するようにした
が、これはレーザに限らず電子線等を用いてもよ
いものである。 Furthermore, in the above embodiment, the back surface of the semiconductor substrate 11 is irradiated with a laser to melt the silicon, but this is not limited to a laser, and an electron beam or the like may also be used.
以上ようにこの発明に係る半導体装置の製造方
法によれば、半導体基板の素子が形成されること
のない背面に、ダメージ層と共にゲツタリング効
果を有する反応生成薄膜層が同時に形成されるよ
うになるものであり、このダメージ層および反応
生成薄膜層それぞれによるゲツタリング効果が相
乗的に作用し、半導体基板中の欠陥発生防止に非
常に大きな効果が発揮される。 As described above, according to the method for manufacturing a semiconductor device according to the present invention, a reaction-generated thin film layer having a gettering effect is simultaneously formed on the back side of a semiconductor substrate where no elements are formed, together with a damaged layer. The gettering effects of the damaged layer and the reaction-generated thin film layer act synergistically, and are very effective in preventing the occurrence of defects in the semiconductor substrate.
第１図は従来の半導体基板に対する欠陥発生防
止手段を説明する図、第２図および第３図はこの
発明の一実施例を説明するもので、半導体基板に
対する欠陥発生防止工程を示す図である。
１１……半導体基板、１３……背面、１６……
ガス雰囲気、１７……薄膜。
FIG. 1 is a diagram for explaining a conventional means for preventing the occurrence of defects on a semiconductor substrate, and FIGS. 2 and 3 are diagrams for explaining an embodiment of the present invention, and are diagrams showing a process for preventing the occurrence of defects on a semiconductor substrate. . 11...Semiconductor substrate, 13...Back surface, 16...
Gas atmosphere, 17...thin film.
Claims (1)
くとも背面部に反応性物質が存在する状態で、上
記半導体基板の背面部にレーザあるいは電子線等
のエネルギー線の照射を行ない、上記半導体基板
背面を溶融してダメージ層を形成すると共に、ゲ
ツタリング効果を有する反応生成薄膜層を同時に
形成させるようにしたことを特徴とする半導体装
置の製造方法。1. With a reactive substance present on at least the back surface of the semiconductor substrate on which elements are to be formed, the back surface of the semiconductor substrate is irradiated with an energy beam such as a laser or an electron beam to irradiate the back surface of the semiconductor substrate. 1. A method for manufacturing a semiconductor device, characterized in that a damaged layer is formed by melting and a reaction-generated thin film layer having a gettering effect is simultaneously formed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1659882A JPS58134430A (en) | 1982-02-04 | 1982-02-04 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1659882A JPS58134430A (en) | 1982-02-04 | 1982-02-04 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58134430A JPS58134430A (en) | 1983-08-10 |
| JPH0345535B2 true JPH0345535B2 (en) | 1991-07-11 |
Family
ID=11920724
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1659882A Granted JPS58134430A (en) | 1982-02-04 | 1982-02-04 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58134430A (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60111430A (en) * | 1983-11-22 | 1985-06-17 | Rikagaku Kenkyusho | Buried-formation of impurity or metal layer in semiconductor surface layer |
| US4650524A (en) * | 1984-06-20 | 1987-03-17 | Sanyo Electric Co., Ltd | Method for dividing semiconductor film formed on a substrate into plural regions by backside energy beam irradiation |
| US4687682A (en) * | 1986-05-02 | 1987-08-18 | American Telephone And Telegraph Company, At&T Technologies, Inc. | Back sealing of silicon wafers |
| JPS63108728A (en) * | 1986-10-24 | 1988-05-13 | Nec Corp | Method of straining rear face of semiconductor substrate |
| US5189508A (en) * | 1988-03-30 | 1993-02-23 | Nippon Steel Corporation | Silicon wafer excelling in gettering ability and method for production thereof |
| JP5568054B2 (en) | 2011-05-16 | 2014-08-06 | トヨタ自動車株式会社 | Manufacturing method of semiconductor device |
| RU2680607C1 (en) * | 2018-01-23 | 2019-02-25 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Кабардино-Балкарский государственный университет им. Х.М. Бербекова" (КБГУ) | Method for making semiconductor device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5567143A (en) * | 1978-11-15 | 1980-05-21 | Toshiba Corp | Method for manufacturing semiconductor device |
| JPS5671928A (en) * | 1979-11-16 | 1981-06-15 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Treatment for silicon substrate |
-
1982
- 1982-02-04 JP JP1659882A patent/JPS58134430A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5567143A (en) * | 1978-11-15 | 1980-05-21 | Toshiba Corp | Method for manufacturing semiconductor device |
| JPS5671928A (en) * | 1979-11-16 | 1981-06-15 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Treatment for silicon substrate |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58134430A (en) | 1983-08-10 |
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