JPH0344952A - Electronic circuit substrate - Google Patents

Electronic circuit substrate

Info

Publication number
JPH0344952A
JPH0344952A JP1181200A JP18120089A JPH0344952A JP H0344952 A JPH0344952 A JP H0344952A JP 1181200 A JP1181200 A JP 1181200A JP 18120089 A JP18120089 A JP 18120089A JP H0344952 A JPH0344952 A JP H0344952A
Authority
JP
Japan
Prior art keywords
electronic circuit
organic material
material substrate
aluminum nitride
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1181200A
Other languages
Japanese (ja)
Inventor
Takashi Sakamoto
孝 坂本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1181200A priority Critical patent/JPH0344952A/en
Publication of JPH0344952A publication Critical patent/JPH0344952A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To obtain an electronic circuit substrate with improved heat dissipation property by bonding an organic material substrate, having a conductor pattern on the surface thereof wherein holes are formed in the integrated circuit mounting part, and a aluminum nitride plate together. CONSTITUTION:An electronic circuit substrate is formed by bonding an organic material substrate 1 and a aluminum nitride plate 1. An IC chip 3 is bonded at the rear surface thereof to the part of the organic material substrate 1 where holes are formed, i.e., to the aluminum nitride plate 2 with a bonding agent, and a conductor pattern 6 formed on the surface of the organic material substrate 1 and the IC 3 are connected to each other by wire bonding process. Thus, the thermal dissipation property of the IC 3 and the reliability of the electronic circuit can be improved. In particular, the improvement of heat dissipation property of the electronic circuit can be realized as the density of the integrated circuit increases.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電子回路基板に関し、特に熱放散性の優れた電
子回路基板に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an electronic circuit board, and particularly to an electronic circuit board with excellent heat dissipation properties.

〔従来の技術〕[Conventional technology]

従来、集積回路の搭載される電子回路基板としては有機
材料を基材とする絶縁基板が用いられ、電子回路の形成
にあたっては絶縁基板上に集積回路チップが接着剤で固
定され、集積回路チップと絶縁基板上に形成された配線
の間をワイヤホンディング方法により接続することによ
り構成されていた。Conventionally, an insulating substrate based on an organic material has been used as an electronic circuit board on which an integrated circuit is mounted, and when forming an electronic circuit, an integrated circuit chip is fixed on the insulating substrate with adhesive, and the integrated circuit chip and It was constructed by connecting wires formed on an insulating substrate using a wire bonding method.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の電子回路基板は、これを構成する基板が
有機材料により構成されているので熱・放散が悪く、電
子回路の信頼性の低下につながっていた。特に集積回路
の高密度化にともない熱放散のよい電子回路基板が強く
要望されている。The above-described conventional electronic circuit board has poor heat dissipation because its constituent substrate is made of an organic material, leading to a decrease in the reliability of the electronic circuit. In particular, with the increasing density of integrated circuits, there is a strong demand for electronic circuit boards with good heat dissipation.

本発明の目的は、熱放散がよく電子回路の信頼性を大幅
に向上できる電子回路基板を提供することにある。An object of the present invention is to provide an electronic circuit board that has good heat dissipation and can significantly improve the reliability of electronic circuits.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の電子回路基板は、集積回路搭載部分に穴をあけ
た導体パターンを表面に有する有機材料基板と窒化アル
ミニウムとを貼り合せた構造を有している。The electronic circuit board of the present invention has a structure in which aluminum nitride is bonded to an organic material substrate having a conductor pattern on the surface with holes in the integrated circuit mounting portion.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第１図は本発明の一実施例の縦断面図である。FIG. 1 is a longitudinal sectional view of one embodiment of the present invention.

第１図は有機材料基板１と窒化アルミニウム板２とを貼
り合わせたもので、有機材料基板の穴のあけた部分すな
わち窒化アルミニウム板にＩＣチップ裏面を接着剤で接
着し、有機材料基板１の表面に形成した配線パターンと
ＩＣとをワイヤボンディング法で接続している。Figure 1 shows an organic material substrate 1 and an aluminum nitride plate 2 bonded together. The wiring pattern formed on the surface and the IC are connected by wire bonding.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は熱伝達性のよい窒化アルミ
ニウム板を有機材料基板と貼り合わすことにより熱放散
性の良い電子回路基板を実現できる効果がある。As explained above, the present invention has the effect of realizing an electronic circuit board with good heat dissipation properties by bonding an aluminum nitride plate with good heat transfer properties to an organic material substrate.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明の一実施例の電子回路基板の縦断面図で
ある。 ■・・・有機材料基板、２・・・窒化アルミニウム板、
３・・・ＩＣチップ、４・・・接着剤、５・・・ボンデ
ィングワイヤ、６・・・導体パターン。FIG. 1 is a longitudinal sectional view of an electronic circuit board according to an embodiment of the present invention. ■...Organic material substrate, 2...Aluminum nitride plate,
3... IC chip, 4... Adhesive, 5... Bonding wire, 6... Conductor pattern.

Claims (1)

【特許請求の範囲】[Claims] 集積回路搭載部分に穴をあけた表面に導体パターンを有
する有機材料基板と窒化アルミニウム板とを貼り合せた
ことを特徴とする電子回路基板。An electronic circuit board characterized in that an organic material substrate having a conductive pattern on the surface with holes in the integrated circuit mounting portion and an aluminum nitride plate are bonded together.
JP1181200A 1989-07-12 1989-07-12 Electronic circuit substrate Pending JPH0344952A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1181200A JPH0344952A (en) 1989-07-12 1989-07-12 Electronic circuit substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1181200A JPH0344952A (en) 1989-07-12 1989-07-12 Electronic circuit substrate

Publications (1)

Publication Number Publication Date
JPH0344952A true JPH0344952A (en) 1991-02-26

Family

ID=16096593

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1181200A Pending JPH0344952A (en) 1989-07-12 1989-07-12 Electronic circuit substrate

Country Status (1)

Country Link
JP (1) JPH0344952A (en)

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