JPH0342832A - Forming method for multilayer insulating film - Google Patents
Forming method for multilayer insulating filmInfo
- Publication number
- JPH0342832A JPH0342832A JP17880189A JP17880189A JPH0342832A JP H0342832 A JPH0342832 A JP H0342832A JP 17880189 A JP17880189 A JP 17880189A JP 17880189 A JP17880189 A JP 17880189A JP H0342832 A JPH0342832 A JP H0342832A
- Authority
- JP
- Japan
- Prior art keywords
- film
- cvd
- polysilicon
- silicon nitride
- cvd method
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 15
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 39
- 229920005591 polysilicon Polymers 0.000 claims abstract description 39
- 238000005229 chemical vapour deposition Methods 0.000 claims abstract description 21
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 19
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 19
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 13
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 13
- 239000010703 silicon Substances 0.000 claims abstract description 13
- 239000000758 substrate Substances 0.000 claims abstract description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 5
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 5
- 230000001590 oxidative effect Effects 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims 2
- 230000003647 oxidation Effects 0.000 abstract description 12
- 238000007254 oxidation reaction Methods 0.000 abstract description 12
- 239000004065 semiconductor Substances 0.000 abstract description 6
- 229910003818 SiH2Cl2 Inorganic materials 0.000 abstract 1
- 238000007493 shaping process Methods 0.000 abstract 1
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 230000015654 memory Effects 0.000 description 2
- 231100000989 no adverse effect Toxicity 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、シリコン半導体素子、例えばポリシリコン2
層構造の半導体不揮発性メモリ、ポリシリコンスタック
型ダイナ逅ツタランダムアクセスメモリなどに用いられ
る高性能、高信頼性を持ったポリシリコン上の絶縁膜の
形成方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention is directed to silicon semiconductor devices, such as polysilicon 2
This invention relates to a method for forming an insulating film on polysilicon with high performance and high reliability, which is used in layered semiconductor nonvolatile memories, polysilicon stacked type random access memories, etc.
本発明は、ポリシリコン電極上にSiH1C1zとNt
Oの高温化学気相成長(CVD)法によりシリコン酸化
膜(以下HTO(旧gh Temperature C
VD Th1nOxide)膜と呼ぶ)を堆積した。次
に高温酸化雰囲気中で短時間熱酸化し、HTO膜とポリ
シリコン電極界面に薄いシリコン熱酸化膜を形成させた
。さらにこのHTO膜上にCVD法によりCVDシリコ
ン窒化膜を堆積させた。そしてこのCVDシリコン窒化
膜を熱酸化することによりその膜表面上に熱酸化シリコ
ン窒化膜を形成する。以上の工程により高性能・高信頼
性を持ったポリシリコン上の多層絶縁膜の形成を可能と
したものである。In the present invention, SiH1C1z and Nt are formed on a polysilicon electrode.
A silicon oxide film (hereinafter referred to as HTO (formerly GH Temperature C
A VD Th1nOxide film) was deposited. Next, thermal oxidation was performed for a short time in a high-temperature oxidizing atmosphere to form a thin silicon thermal oxide film at the interface between the HTO film and the polysilicon electrode. Furthermore, a CVD silicon nitride film was deposited on this HTO film by the CVD method. Then, by thermally oxidizing this CVD silicon nitride film, a thermally oxidized silicon nitride film is formed on the film surface. The above process makes it possible to form a multilayer insulating film on polysilicon with high performance and high reliability.
従来の技術を図面を用いて説明する。第2図fat〜I
cIは従来の技術を用いて作成されたボリシリコン電極
上の多層絶縁膜の形成工程を示す断面図である。まず半
導体基板1の表面上に薄いゲート絶縁膜2が形成されて
おり、その上に1層目のポリシリコン電極3がCVD法
により堆積されている(第2図(al)、次にこのポリ
シリコン電極3を熱酸化して薄いポリシリコン熱酸化W
:1.9を形成し、その上にCVD法によりCVDシリ
コン窒化膜6を堆積させる(第2図(b))。さらにこ
のCVDシリコン窒化膜6を熱酸化して、その膜表面上
に熱酸化シリコン窒化膜7を形成させる。そして最後に
2層目のポリシリコン電極8をCνDiにより堆積させ
た(第2図(C))。A conventional technique will be explained using drawings. Figure 2 fat~I
cI is a cross-sectional view showing the process of forming a multilayer insulating film on a polysilicon electrode created using a conventional technique. First, a thin gate insulating film 2 is formed on the surface of a semiconductor substrate 1, and a first layer of polysilicon electrode 3 is deposited on it by the CVD method (Fig. 2 (al)). Thermal oxidation of silicon electrode 3 results in thin polysilicon thermal oxidation W
:1.9 is formed, and a CVD silicon nitride film 6 is deposited thereon by the CVD method (FIG. 2(b)). Further, this CVD silicon nitride film 6 is thermally oxidized to form a thermally oxidized silicon nitride film 7 on the surface of the film. Finally, a second layer of polysilicon electrode 8 was deposited using CvDi (FIG. 2(C)).
しかし、従来の形成工程では以下の二項目の課題がある
。まず第1に濃いリン濃度でドープされたIN目のポリ
シリコン電極のポリシリコン酸化を行う場合、その酸化
速度が速いため、大口径シリコンウェハの面内膜厚均一
性を得るのが難しい。However, the conventional forming process has the following two problems. First, when polysilicon oxidation is performed on an IN-th polysilicon electrode doped with a high phosphorus concentration, the oxidation rate is fast, making it difficult to obtain in-plane film thickness uniformity on a large-diameter silicon wafer.
第2に1000℃以上の高温酸化雰囲気でポリシリコン
の酸化を行う場合、100Å以下の薄いゲート絶縁膜を
形成してから1層目のポリシリコン堆積後に高温熱処理
工程を行うと薄いゲート絶縁膜の膜質を著しく劣化させ
るという結果が得られている。Second, when polysilicon is oxidized in a high-temperature oxidation atmosphere of 1000°C or higher, if a thin gate insulating film of 100 Å or less is formed and then a high-temperature heat treatment process is performed after the first layer of polysilicon is deposited, the thin gate insulating film will become thinner. The result has been obtained that the film quality is significantly deteriorated.
以上の課題を解決するために、本発明ではポリシリコン
電極上のポリシリコン熱酸化膜の代わりに、より低い熱
処理温度で形成が可能であるCVD法の)HTO膜を用
いた。In order to solve the above problems, in the present invention, instead of the polysilicon thermal oxide film on the polysilicon electrode, an HTO film (CVD method) which can be formed at a lower heat treatment temperature is used.
上記のごとくポリシリコン電極上の多層絶縁膜を形成す
る場合、HTO膜はCVD膜であるので大口径シリコン
ウェハでもリンネ鈍物濃度によらず、ウェハ面内均一性
は良好である。さらに、)HTO膜の形aS度は、ポリ
シリコンの熱酸化より200℃程度低いので、100Å
以下の薄いゲート絶縁膜の改質を著しく劣化させること
を防止できる。また、HTOlc;1cvo taであ
るのでポリシリコンのアスペリティを発生させない。When forming a multilayer insulating film on a polysilicon electrode as described above, since the HTO film is a CVD film, the in-plane uniformity of the wafer is good even on a large-diameter silicon wafer, regardless of the Linnean obtuse concentration. Furthermore, since the aS degree of the )HTO film is about 200°C lower than that of polysilicon thermal oxidation,
It is possible to prevent the following modification of the thin gate insulating film from significantly deteriorating. Furthermore, since HTOlc: 1 cvo ta, polysilicon asperities are not generated.
以上のように、本発明の多層絶縁膜はそれ自体の膜厚均
一性・膜質が優れており、さらに、前工程で形成される
薄いゲート絶縁膜への悪影響がほとんどないという優れ
た特徴をもっている。As described above, the multilayer insulating film of the present invention has excellent film thickness uniformity and film quality, and also has the excellent feature of having almost no adverse effect on the thin gate insulating film formed in the previous process. .
以下に、本発明の実施例を図面に基づいて詳細に説明す
る。第1図(al〜(C1は本発明の技術を用いて作成
されたポリシリコン電極上の多層絶縁膜の形成工程を示
す断面図である。まず半導体基板lの表面上に薄いゲー
ト絶縁膜2が形成されており、その上に1層目のポリシ
リコン電極3がCVD法により堆積されている(第1図
(a))。次にこのポリシリコン電極3上にSiHIC
j! zとN、0の850℃の高温CVD法よりHTO
膜4を堆積させる。さらに、)ITO膜4と11目のポ
リシリコン電極3の界面状態を改善するために、ごく短
時間の高温熱酸化雰囲気で界面の熱酸化を行い薄いシリ
コン熱酸化膜5を形成する。そしてその上にCVDシリ
コン窒化膜6を堆積させる(第1囲い))、さらにこの
CVDシリコン窒化膜6を熱酸化してその膜表面上に熱
酸化シリコン窒化膜7を形成させる。そして最後に2N
目のポリシリコン電極8をCVD法により堆積させた(
第1図(C1)。Embodiments of the present invention will be described in detail below based on the drawings. FIG. 1 (al~(C1) is a sectional view showing the formation process of a multilayer insulating film on a polysilicon electrode created using the technique of the present invention. First, a thin gate insulating film 2 is formed on the surface of a semiconductor substrate l. is formed, and a first layer of polysilicon electrode 3 is deposited thereon by the CVD method (Fig. 1(a)).Next, SiHIC is deposited on this polysilicon electrode 3.
j! HTO by high temperature CVD method at 850℃ of z and N, 0
Deposit film 4. Furthermore, in order to improve the state of the interface between the ITO film 4 and the eleventh polysilicon electrode 3, the interface is thermally oxidized for a very short time in a high temperature thermal oxidation atmosphere to form a thin silicon thermal oxide film 5. Then, a CVD silicon nitride film 6 is deposited thereon (first enclosure)), and this CVD silicon nitride film 6 is further thermally oxidized to form a thermally oxidized silicon nitride film 7 on the film surface. And finally 2N
Eye polysilicon electrodes 8 were deposited by CVD method (
Figure 1 (C1).
上記のごとくポリシリコン電極上の多層絶縁膜を形成す
る場合、HTO膜はCVD膜であるので大口径シリコン
ウェハでもリンネ鈍物濃度によらず、面内膜厚均一性は
良好である。さらに、HTO膜の形成温度は、ポリシリ
コンの熱酸化より200℃程度低いので、100Å以下
の薄いゲート絶縁膜の膜質を著しく劣化させることを防
止できる。また、HTO膜はCVD膜であるのでポリシ
リコンのアスペリティを発生させない。When forming a multilayer insulating film on a polysilicon electrode as described above, since the HTO film is a CVD film, the in-plane film thickness uniformity is good even on a large diameter silicon wafer, regardless of the concentration of Linnean obtuse. Furthermore, since the formation temperature of the HTO film is about 200° C. lower than that of thermal oxidation of polysilicon, it is possible to prevent the film quality of a thin gate insulating film of 100 Å or less from being significantly deteriorated. Furthermore, since the HTO film is a CVD film, polysilicon asperities do not occur.
本発明は以上説明したように、ポリシリコン熱酸化膜の
代わりにCVD法のIITO膜を用いた多層絶縁膜であ
り、それ自体の膜厚均一性、膜質が優れており、さらに
前工程で形成される薄いゲート絶縁膜への悪影響がほと
んどない。As explained above, the present invention is a multilayer insulating film that uses a CVD IITO film instead of a polysilicon thermal oxide film, and has excellent film thickness uniformity and film quality. There is almost no adverse effect on the thin gate insulating film.
第1図(al〜(C1は本発明の技術を用いて作成され
たポリシリコン電極上の多層絶縁膜の形成工程順断面図
である。第2図(al〜tC)は従来の技術を用いて作
成されたポリシリコン電極上の多層絶縁膜の形成工程順
断面図である。
・半導体基板
・薄いゲート絶縁膜
・1層目のポリシリコン電極
・HTO膜
・薄いシリコン熱酸化膜
・CVOシリコン窒化膜
・熱酸化シリコン窒化膜
・2N目のポリシリコン電極
以
上FIG. 1 (al~(C1) is a cross-sectional view of the process of forming a multilayer insulating film on a polysilicon electrode created using the technique of the present invention. FIG. These are cross-sectional views in order of the formation process of a multilayer insulating film on a polysilicon electrode created by: - Semiconductor substrate - Thin gate insulating film - First layer polysilicon electrode - HTO film - Thin silicon thermal oxide film - CVO silicon nitride Film, thermal oxidation silicon nitride film, 2Nth polysilicon electrode or higher
Claims (1)
気相成長(CVD)法によりCVDシリコン酸化膜を堆
積する工程と、前記CVDシリコン酸化膜を熱酸化し、
薄いシリコン熱酸化膜を前記CVDシリコン酸化膜とシ
リコン基板もしくはポリシリコン界面に形成する工程と
、前記CVDシリコン酸化膜上に化学気相成長(CVD
)法によりCVDシリコン窒化膜を堆積する工程と、前
記CVDシリコン窒化膜を熱酸化し前記CVDシリコン
窒化膜表面上に薄い熱酸化シリコン窒化膜を形成する工
程とからなる多層絶縁膜の形成方法。A step of depositing a CVD silicon oxide film by a high temperature chemical vapor deposition (CVD) method of SiH_2Cl_2 and N_2O to form a multilayer insulating film, and thermally oxidizing the CVD silicon oxide film,
A step of forming a thin silicon thermal oxide film at the interface between the CVD silicon oxide film and the silicon substrate or polysilicon, and a step of forming a thin silicon thermal oxide film on the CVD silicon oxide film.
) A method for forming a multilayer insulating film comprising the steps of: depositing a CVD silicon nitride film by a method; and thermally oxidizing the CVD silicon nitride film to form a thin thermally oxidized silicon nitride film on the surface of the CVD silicon nitride film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17880189A JPH0342832A (en) | 1989-07-10 | 1989-07-10 | Forming method for multilayer insulating film |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17880189A JPH0342832A (en) | 1989-07-10 | 1989-07-10 | Forming method for multilayer insulating film |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0342832A true JPH0342832A (en) | 1991-02-25 |
Family
ID=16054887
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17880189A Pending JPH0342832A (en) | 1989-07-10 | 1989-07-10 | Forming method for multilayer insulating film |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0342832A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7012649B2 (en) | 2001-01-15 | 2006-03-14 | Sony Corporation | Image processing apparatus and method, program, and recording medium |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63302524A (en) * | 1987-06-02 | 1988-12-09 | Seiko Epson Corp | Manufacture of semiconductor device |
JPS6415985A (en) * | 1987-07-09 | 1989-01-19 | Fujitsu Ltd | Manufacture of semiconductor device |
-
1989
- 1989-07-10 JP JP17880189A patent/JPH0342832A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63302524A (en) * | 1987-06-02 | 1988-12-09 | Seiko Epson Corp | Manufacture of semiconductor device |
JPS6415985A (en) * | 1987-07-09 | 1989-01-19 | Fujitsu Ltd | Manufacture of semiconductor device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7012649B2 (en) | 2001-01-15 | 2006-03-14 | Sony Corporation | Image processing apparatus and method, program, and recording medium |
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