JPH0342815A - Manufacture of semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To achieve periphery exposure without generating dust by providing a heating treatment process for heating a wafer between a mask pattern exposure process and a periphery exposure process. CONSTITUTION:By performing PEB(Post Exposure Bake) 6 before a periphery exposure 5, heating treatment processes to be performed before periphery exposure are two processes of a prebake 3 and the PEB and the maximum temperature before periphery exposure is not the pre-bake temperature but the PEB temperature. Namely, the maximum temperature before periphery exposure was 100 deg.C (pre-bake temperature) before but is now 120 deg.C (PEB temperature), thus reducing the generation of expansion letgo on periphery exposure to 1/10 or less and improving the yield in the production process of a semiconductor integrated circuit. without changing the order of the periphery exposure and PEB in conventional process and a new heating treatment process may be provided between an exposure 4 and the periphery exposure 5.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor integrated circuit, and particularly to a photolithography process for semiconductor integrated circuits.

[Conventional technology]

FIG. 4 is a flowchart showing a conventional process procedure for forming a resist pattern in a photolithography process for semiconductor integrated circuits. Before applying positive photoresist to the wafer, baking is performed (step 1), then applying positive photoresist to the wafer using a spin cord (step 2), and then removing residual solvent in the positive photoresist film. Prebaking is performed for evaporation and for strengthening the adhesion between the photoresist film and the wafer (step 3).

Next, masks are aligned and exposed (step 4).

For exposure, use product number N5R1505G3A, for example.
Use a stepper. Table 1 shows the characteristics of this stepper. After the exposure in step 4, peripheral exposure is performed (step 5). Here, the peripheral exposure refers to exposing the peripheral portion of the wafer of the positive photoresist coated on the wafer to light before development so that it can be dissolved in the developer. For peripheral exposure, for example, a peripheral exposure device manufactured by Tokyo Electron is used. Table 1 shows the characteristics of this peripheral exposure device.

Table 1 Next, post-exposure baking (hereinafter abbreviated as FEB) is performed to uniformly redistribute the photosensitizer in the positive photoresist film into the positive photoresist by thermal diffusion (step 6), followed by development. Then, a resist with a desired circuit pattern is obtained, and the positive photoresist around the wafer is removed (step 7). After that, the developer and rinse solution remaining in or on the positive photoresist film are removed by evaporation, and a boost bake is performed to harden the positive photoresist film and strengthen its adhesion to the wafer (step 8). The resist pattern formation in the plate making process is completed.

The above is the conventional process flow for forming a resist pattern in a photolithography process for semiconductor integrated circuits.

The role of peripheral exposure during this process will be explained using FIGS. 5 and 6. When resist pattern formation is completed, the wafer is stored in a wafer cassette. Figure 5 is a diagram showing the positional relationship between the wafer and the wafer cassette after development (step 7) when peripheral exposure is not performed;
The figure shows the positional relationship between the developed wafer and the wafer cassette when peripheral exposure is performed. If peripheral exposure is not performed, as shown in FIG. 5, the positive photoresist 11 on the substrate 10 and the wafer cassette 12 are in contact with each other, and the positive photoresist 11 may peel off and generate dust. On the other hand, when peripheral exposure is performed, the positive photoresist 11 and the wafer cassette 12 do not come into contact as shown in FIG.

Therefore, the positive photoresist 11 does not peel off and no dust is generated. The positive photoresist 11 around the wafer, which causes dust by performing peripheral exposure in this way,
By preventing contact between the wafer cassette 12 and the wafer cassette 12, the yield in the wafer manufacturing process can be improved.

[Problem to be solved by the invention]

Positive photoresist 1 coated on substrate 1
1 is exposed to the G-line (wavelength: 436 na), the photosensitive agent contained in the positive-type photoresist 11 is decomposed by the G-line, and nitrogen N2 is generated in the positive-type photoresist 11 as shown in FIG. The amount of nitrogen N2 generated is proportional to the amount of light irradiation and the amount of photosensitizer. Therefore, if the amount of light irradiation is large or the amount of photosensitizer contained in a positive photoresist is large, nitrogen N2'lk is generated per unit time.
will increase. If the amount of nitrogen N2 generated is greater than the amount of nitrogen N2 that escapes into the air from the positive photoresist 11,
As shown in FIG. 8, nitrogen N2 enters the interface between the substrate 1 and the positive photoresist 11. As shown in FIG.

Then, as shown in FIG. 9, the positive photoresist 11 peels off in areas where the adhesion between the wafer 10 and the photoresist 11 is low. Hereinafter, the peeling of the positive photoresist 11 due to the generation of nitrogen N2 will be referred to as foaming peeling.

FIG. 10 is a graph showing the relationship between the number of locations where foam delamination occurs per wafer and the wafer heating temperature. From this graph, it can be seen that the higher the heating temperature, the less likely it is that foaming and peeling will occur. This is because: (1) the photosensitive agent contained in the positive photoresist 11 is thermally decomposed by heating, and the amount of photosensitive agent in the positive photoresist 11 is reduced; and (2) the positive photoresist 11 and the substrate 10 are separated by heating. This is thought to be due to two reasons: the adhesion of the photoresist 11 has improved, and the positive photoresist 11 has become difficult to peel off.

Based on the above, we will discuss the problems during peripheral exposure in Chapter 11.
This will be explained using figures. FIG. 11 is an enlarged view of the peripheral portion (edge portion) of the substrate 10. As shown in the figure, it can be seen that the positive photoresist 11 is thicker at the periphery than at the inside. This is due to the fact that the positive photoresist 11 was applied using a spin code as described above. Since the positive photoresist 11 is thicker in the peripheral area, the photosensitizer content is also greater in the peripheral area. Further, since the peripheral portion is the end portion where the positive photoresist 11 spreads, stress during coating of the positive photoresist 11 remains in the positive photoresist 11 in the peripheral portion. From these facts, it is considered that even if exposure is performed uniformly, foaming and separation are more likely to occur in the peripheral area of the substrate 10 than in the central area.

Table 2 Now, when resist is applied and exposed uniformly based on the conditions shown in Table 2, there will be 10 to 20 areas where the foam will peel off within 1 onll1 of the periphery of the substrate 10, and there will be no foaming peeling off at other places on the head. There were O locations. This is consistent with the idea mentioned above. In other words, experiments have confirmed that foaming peels off more easily at the periphery than at the center of the substrate 10.

Further, the exposure power and exposure area of the stepper and peripheral exposure device are shown in Table 1 as described above. This table shows that the peripheral exposure device has a higher exposure power and a smaller exposure area than the stepper. Therefore, the amount of light irradiated per unit area is greater in peripheral exposure. Therefore, foaming and peeling are even more likely to occur in the peripheral area of the substrate 10.

As a result, foaming and peeling is more likely to occur in the peripheral exposure (step 5) process than in the mask pattern transfer process using a stepper or the like.

By the way, in order to reduce the occurrence of foaming and peeling, it is conceivable to increase the heating temperature of the wafer before exposure as described above. In the flowchart in Figure 4, the only heating step before exposure is pre-bake, so in order to reduce foaming and peeling without increasing the number of processing steps, the pre-bake temperature can be increased, but if it is set too high, the heat of the photosensitizer will heat up. Due to decomposition, etc., the characteristics of subsequent exposure and development change.

Therefore, it is not possible to prevent foaming and peeling by raising the heating temperature of the wafer by prebaking to a sufficiently high temperature.

Although peripheral exposure is intended to prevent dust generation as mentioned above, if dust is generated due to foam peeling, the original effect of peripheral exposure is canceled out, and the yield of the wafer manufacturing process is improved. The problem was that it didn't.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a method for manufacturing a semiconductor integrated circuit that can perform peripheral exposure without generating dust.

[Means to solve the problem]

The method for manufacturing a semiconductor integrated circuit according to the present invention includes a mask pattern exposure step in which a mask pattern is exposed to a resist on a wafer, and a peripheral exposure step in which only the peripheral portion of the wafer is exposed to light in order to remove the resist in the peripheral portion of the wafer. It is applied to a method of manufacturing a semiconductor integrated circuit including a process. The method for manufacturing a semiconductor integrated circuit according to the present invention is characterized by comprising a heat treatment step of subjecting the wafer to heat treatment between the mask pattern exposure step and the peripheral exposure step.

[Effect]

In this invention, a heat treatment step is provided in which the wafer is subjected to heat treatment between the mask pattern exposure step and the peripheral exposure step, so if the temperature of the heat treatment step is made relatively high, the peripheral exposure can be performed. First, the photosensitive agent in the resist is thermally decomposed and reduced, and the adhesion between the wafer and the resist is improved.

〔Example〕

FIG. 1 is a flowchart showing a process procedure for forming a resist pattern in a photolithography process which is an embodiment of the method for manufacturing a semiconductor integrated circuit according to the present invention. The processing procedure of this embodiment differs from the conventional processing procedure shown in FIG. 4 in that peripheral exposure (step 5) is performed after FEB (step 6). Other processing procedures are the same as before. For details on FEB, see e.g.
eslst standlng-wave errec
ts by post-exposure bake”
E., J. Walker, IEEE TRANSACTI.
ONS ON ELECTRON DEVICES,V
OL.

ED22. No.7. JULY 1975J. The original function of PEB is to uniformly redistribute the photosensitizer contained in the resist into the resist film after exposure by thermal diffusion. Therefore, in order to enhance the heat diffusion effect, the FEB temperature should be made as high as possible.

However, if it is too high, the resist resin and the photosensitive agent will thermally crosslink with each other, resulting in a decrease in the solubility of the resist in a developer during development, resulting in a decrease in resolution. Taking these things into consideration, the upper limit of the FEB temperature is determined.

On the other hand, prebaking is for removing the solvent that has dissolved the resist, and is baking performed after applying the resist and before exposure. In the aforementioned FEB, the larger the amount of solvent remaining in the resist, the easier the photosensitizer will diffuse. From this point of view, the prebaking temperature should be as low as possible so as not to evaporate the solvent. However, if it is too low, the amount of solvent remaining will be too large, resulting in poor dimensional accuracy. The lower limit of the prebake temperature is determined taking these things into consideration. Considering the above, the prebake temperature is 90 to 100℃, and PEBff1 degree is 110 to 1℃.
20°C is considered optimal.

Table 3 shows an example of processing conditions when pre-baking and FEB are performed using a vacuum adsorption type hot plate. These processing temperatures were determined based on the above considerations.

Table 3 FIGS. 2 and 3 are flowcharts showing processing procedures when performing FEB and pre-bake using a vacuum adsorption type hot plate. In the FEB shown in FIG. 2, the wafer is heated to 120°C (step 6a) and then cooled to 25°C (step 6b). On the other hand, in the pre-bake process shown in FIG. 3, the wafer is heated to 100°C (step 3a) and then cooled to 25°C (step 3b).
. Similar processing is performed in the conventional PEB process and pre-bake process.

FEB (Step 6) before peripheral exposure (Step 5)
By doing this, the heat treatment process performed before peripheral exposure is two steps: pre-bake (step 3) and FEB, and the maximum temperature before peripheral exposure is not the pre-bake temperature but FEB.
The temperature reaches EB. In other words, the maximum temperature before peripheral exposure was 100°C (pre-bake temperature) in the past, but it was 100°C (pre-bake temperature).
The temperature becomes 20°C (FEB temperature). Looking at Figure 10, 10
At 0°C, there are 100 or more locations where foaming peels off, while at 120°C, there are 10 or fewer locations.

By performing FEB before peripheral exposure, as will be explained, the occurrence of foaming and peeling during peripheral exposure can be reduced to 1/10 or less, and the yield of the semiconductor integrated circuit manufacturing process can be improved.

Furthermore, in this example, by switching the order of FEB and peripheral exposure, the wafer is heat-treated at a temperature higher than the pre-bake temperature before peripheral exposure.
There is no need to provide a new heat treatment process between the exposure (step 4) and the peripheral exposure (step 5), and the time and cost of the resist pattern forming process in the photolithography process do not increase.

Note that by performing FEB (step 6) before peripheral exposure (step 5), the process of thermally diffusing the photosensitizer after peripheral exposure is eliminated, and the accuracy of peripheral exposure decreases; however, peripheral exposure Since the process simply removes the raised resist around the periphery, there is no problem even if the accuracy decreases a little.

Note that in the above embodiment, F is used before peripheral exposure (step 5).
By performing EB (step 6), heat treatment is performed before peripheral exposure, but the order of peripheral exposure and FEB remains the same as before, and exposure (step 4) and peripheral exposure (
A new heat treatment step may be interposed between step 5).

〔Effect of the invention〕

As described above, according to the present invention, since the heat treatment step of applying heat treatment to the wafer is provided between the mask pattern exposure step and the peripheral exposure step, if the temperature of the heat treatment step is made relatively high, Before peripheral exposure is performed, the photosensitive agent in the resist is thermally decomposed and reduced, and the adhesion between the wafer and the resist is improved, and as a result, there is an effect that foaming and delamination are less likely to occur.

[Brief explanation of drawings]

FIG. 1 is a flowchart showing an embodiment of the method for manufacturing a semiconductor integrated circuit according to the present invention, FIG. 2 is a flowchart showing the FEB processing procedure, FIG. 3 is a flowchart showing the pre-bake processing procedure, and FIG. A flowchart of a conventional semiconductor integrated circuit manufacturing method. Figure 5 is a diagram showing the positional relationship between the knee cassette and the resist on the substrate when peripheral exposure is performed. Figure 6 is a wafer cassette when peripheral exposure is not performed. A diagram showing the positional relationship between the resist and the resist on the substrate,
Figures 7 to 9 are diagrams showing the principle of foam release, and Figure 10 is a diagram showing the principle of foam peeling.
The figure is a graph showing the relationship between wafer heating temperature and foaming separation, and FIG. 11 is an enlarged view of the periphery of the wafer. In the figure, 4 is a mask alignment/exposure process, 5 is a peripheral exposure process, and 6 is a boss exposure baking process. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] (1) A semiconductor integrated circuit manufacturing method including a mask pattern exposure step in which a mask pattern is exposed to a resist on a wafer, and a peripheral exposure step in which only the periphery of the wafer is exposed to light in order to remove the resist at the periphery of the wafer. . A method of manufacturing a semiconductor integrated circuit, comprising a heat treatment step of subjecting the wafer to heat treatment between the mask pattern exposure step and the peripheral exposure step.