JPH0342020B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a self-resetting superconducting loop circuit constructed using Josephson junctions and superconducting striplines.

A superconducting loop circuit consisting of a Josephson junction and a superconducting stripline, which is conventionally used in a Josephson memory circuit, has the configuration shown in FIG. The superconducting loop circuit shown in the figure operates as follows. When an input current I _S is applied to the input line 11 while a gate current Ig is applied from the gate current path 12, the gate 10 is switched to a voltage state. When gate 10 switches to voltage state, gate current Ig flows through superconducting loop circuit 13. Gate 10 is reset to a zero voltage state as the bias current decreases. On the other hand, the superconducting loop circuit 13 has inductance and the resistance component is zero, so the following equation holds true.

LdI/dt=V where L: inductance, V: voltage across the inductance I: current flowing through the inductance, t: time Gate current Ig flows toward the superconducting loop circuit,
When the gate 10 is reset to a zero voltage state, the voltage across the inductance becomes zero and dI/dt=0, so that the gate current Ig continues to flow toward the superconducting loop circuit 13. When the gate current Ig becomes zero from this state, the current flowing through the superconducting stripline having the above-mentioned inductance is conserved when the voltage across the superconducting stripline is zero, so the superconducting loop circuit 13 A circulating current continues to flow through the circuit formed by the gate 10 and the gate 10. Therefore, even if the gate current becomes zero, this superconducting loop circuit 13 is not reset to its original state. Conventionally, a reset gate 1 is used to reset the circuit.
4 is connected in series with the superconducting loop circuit 13, a reset signal is applied from the outside using the reset input line 15, and the reset 14 is switched to a voltage state, thereby generating a voltage across the inductance and closing the closed circuit. The circulating current flowing through the circuit was reset to zero.

However, the reset method using the reset gate 14 shown in FIG. 1 requires an external circuit for generating a reset signal. The circuit that generates this reset signal uses the gate current that drove the gate 10.
It must be driven at a time when the current of Ig is zero, it must use a current that has a different time dependence from the current that drove the gate 10, and it must also have timing control to determine the time to apply the reset signal. This has the disadvantage that a circuit is required and the circuit becomes complicated.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above drawbacks and provide a self-resetting superconducting loop circuit using a Josephson junction that does not require an external reset signal.

According to the present invention, one or more switches using Josephson junctions are connected in series, and the first gate is switched by a current applied to the input line, and the input line is magnetically coupled. A superconducting loop circuit consisting of a second gate using a Josephson junction with an inductance, a superconducting stripline having an inductance, and a gate current path that supplies gate current to the first gate and the superconducting loop circuit. a first current path in which the first gate and the second gate are coupled in series;
A self-resetting superconducting loop circuit using Josephson junction is obtained, which is characterized in that the second current path in which the superconducting loop circuit and the input line of the second gate are coupled in series is coupled in parallel.

The details of the present invention will be explained below using the drawings.

FIG. 2 is a diagram showing a first embodiment of the present invention, in which reference numerals 20 and 24 indicate magnetically coupled quantum interferometer gates. 22 is a gate current path through which a gate current Ig flows. 21 is the input line of gate 20 and gate 2
0 and magnetically coupled. 25 is gate 20
is the input line of gate 24 coupled in series with . 23 is a superconducting loop circuit consisting of a superconducting stripline having an inductance L, and is connected in series to the input line 25 of the gate 24.
Further, a first current path in which the gates 20 and 24 are connected in series, and a second current path in which the input lines 25 of the superconducting loop circuit 23 and the gate 24 are directly connected are connected in parallel. .

In the circuit shown in Figure 2, the gate current Ig input current Is
are run in the time relationship shown in Figure 3. After the current Ig flows through the gate at time t ₁ , the input current changes at time t ₂ .
When Is is input, the gate 20 starts the switch, and the superconducting loop circuit 23 and the gate 24 are activated at time t ₃ , which is the sum of the switching time of the gate 20 and the current transfer time, J ₁ after time t ₂ . A current I _L appears on the input line 25. On the other hand, if the current flowing through the gates 20 and 24 is _IA , then IA appears at time _t1 when the gate current Ig is input, and at time _t2 when the gate current Ig flows toward the superconducting loop circuit 23.
becomes zero. Gate 2 by decreasing I _A
When zero is reset to the superconducting state, the voltage across the inductance of the superconducting loop circuit 23 becomes zero, so the current I _L is conserved. Input current I _S at time _t4
Even if becomes zero, the currents I _L and I _A are not affected. When the gate current Ig becomes zero at time _t5 , the current flowing through the superconducting loop circuit 23 is conserved, so that a circulating current flows through the closed circuit in which the superconducting loop circuit 23 and the gates 20 and 24 are connected in series. Due to this circulating current
I _L and I _A become I _A = I _L. As a result, the gate current and the input current flow through the gate 24 through the input line 25, and the gate 24 switches to a voltage state. When a voltage is generated at the gate 24, the circulating current flowing through the closed circuit becomes zero with a delay of time _J2 from time _t5 , and the circuit is reset. Here, the time _J2 is determined from the switching time of the gate 24 and the circuit constant of the closed circuit. Furthermore, since the gate current I _A becomes zero, the gate 24 is reset to a superconducting state.

FIG. 4 shows the threshold characteristics of the gate 24, with the current I _A on the vertical axis and the current I _L on the horizontal axis. The gate current Ig in FIG. 3 in the circuit shown in FIG. 2 above,
The operation under the time relationship shown in the input current I _S will be explained using FIG. 4. Point 4 at first time t ₀
The operating point, which was 0, moves to point 41 at time _t1 by inputting the gate current Ig, and moves to point 42 at time _t3 by switching the gate 20.
As the gate current Ig becomes zero, the operating point moves to point 43 at time _t5 , and the gate 24 switches. When the gate 24 switches, the currents I _A and I _L
Since both become zero, the operating point returns to point 40.

FIG. 5 shows a second embodiment of the invention. The gate 50 is a current injection type quantum interferometer gate, and the gate 52
5 is a gate current path that supplies a gate current Ig to the gate 50; 51 is an input line that supplies an input current to the gate 50; 53 is a superconducting loop circuit consisting of a superconducting stripline having an inductance L;
Reference numeral 4 denotes a gate consisting of a single Josephson element connected in series to the gate 50, and reference numeral 55 denotes a gate 54 which is an input line and is connected in series to the superconducting loop circuit 53. Resistor 56 is a damping resistor coupled in parallel to gates 50 and 54 to ensure current transfer to superconducting loop circuit 53 by the switch in gate 50 and reset by the switch in gate 54. The difference between the first embodiment shown in FIG. 2 and the second embodiment shown in FIG. The magnetically coupled quantum interferometer gate of gate 24 is a single Josephson junction of gate 54, and a damping resistor 56 is coupled in parallel to the series circuit of gates 50 and 54. It is a point. Therefore, the circuit operation of the second embodiment is similar to that of the first embodiment.
This is similar to the embodiment.

The above embodiments have been described on the assumption that the sum of the inductances of the superconducting loop circuit 23 and the input line 25 of the gate 24 is sufficiently larger than the sum of the inductances of the gates 20 and 24. If the circuit of the present invention is actually used in a driver circuit or a sense bus circuit of a memory circuit, the inductance of the superconducting loop 23 will be several hundred times larger than the sum of the inductances of the gates 20 and 24, and the above assumption will approximately hold true. On the other hand, if the above assumption does not hold, that is, the superconducting loop circuit 23 and the gate 24
Let the sum of the inductances with the input line 25 be aL ₀ , and let the sum of the inductances of the gates 20 and 24 be bL ₀ , and consider a case where a and b have similar values. At time t ₁ shown in Figure 3, the gate current Ig flows through both inductances in inverse proportion to the ratio of the inductances, so if the current flowing through the inductance of aL ₀ is 1/aI ₀ , then the inductance of bL ₀ is 1/ A current of bI ₀ flows. At time t ₃ , all current flows toward the inductance of aL ₀ , so aL ₀
The magnetic flux created by the current flowing through the inductance is aL ₀ (1/a+1/b)I ₀ . At time _t5 , since the magnetic flux of the superconducting loop circuit is conserved, the circulating current flowing through the inductances aL ₀ and bL ₀ becomes a(1/a+1/b)/a+bI ₀ , that is, 1/bI ₀ . The gate 24 shown in FIG.
Assuming that the current flowing from the side toward the gate 24 is positive, when the gate current is 1/bI ₀ and the input current is 1/aI ₀ at time t ₁ , there is no switch, and at time t ₃ the current is -1 /bI ₀ and it is necessary to switch when the input current is 1/bI ₀ . Therefore, when a>b, the gate 24 may be left as is, but when a<b, it is necessary to replace the gate 24 with a gate having an asymmetric threshold characteristic as shown in FIG.
FIG. 6 shows the asymmetric threshold characteristics of the gate used for gate 24. As in FIG. 4, the vertical axis is the current I _A flowing through gate 20 and gate 24, and the horizontal axis is superconducting loop circuit 23 and gate A current I _L flows through the 24 input lines 25. Point 60 in FIG. 6 is the operating point at time t ₀ in FIG. 3, point 61 is the operating point at time t ₁ , and point 62
is the operating point at time _t3 , and point 63 is the operating point at time _t5 . Further, a gate having an asymmetric threshold characteristic as shown in FIG. 6 can be used as the gate 24 even when a>b for the purpose of widening the operating margin.

FIG. 7 shows a third embodiment of the present invention. 70 to 75 in FIG. 7 are the same as 20 to 25 in FIG. 2, respectively, the first gate, the input line of the first gate,
A gate current path, a second gate of a superconducting loop circuit consisting of an inductance, and a first input line of the second gate. 76 is a second input line of the second gate 74, and an input current is supplied from the outside. As shown in this embodiment, the operating margin can be expanded by providing a second input line to the second gate 74 and constantly supplying an input current of a constant value from the outside. This method is particularly effective when a gate with asymmetric threshold characteristics is used as the second gate 74. In the embodiment described above, a single switch using a Josephson junction was used as the first gate, but a gate in which a plurality of switches using Josephson junctions were connected in series was used as the first gate. You can also do that. In this case, if the circuit parameters are selected so that all switches switch simultaneously according to the input current _IS , the essential operation of the circuit is the same as that described in the above embodiment, but the By increasing the generated voltage, the ability to drive current to the superconducting loop circuit increases, and the time for transferring current to the superconducting loop circuit can be shortened.

As is clear from the above explanation, the first gate has a resistor, such as a two-junction or three-junction magnetically coupled quantum interferometer gate, a current injection quantum interferometer gate, or a single Josephson junction gate. Gates with Josephson junctions that do not have a gate can be used. The second gate may be a two-junction or three-junction magnetically coupled quantum interferometer gate, a single Josephson junction gate, or a gate using a Josephson junction with a magnetically coupled input line that has no resistance. can be used.

As explained above, the self-resetting superconducting loop circuit using the Josephson junction according to the present invention has a higher power supply than the conventional circuit which generates the external reset signal, a power source for driving the reset signal generating circuit, and a timing for providing the timing for generating the reset signal. No circuit is required, miniaturization of circuit, ease of design,
It has advantages such as increased operating margin and reduced operating time because no timing circuit is required.

[Brief explanation of drawings]

FIG. 1 is a diagram for explaining a conventional example. FIG. 2 shows a first embodiment of the invention.
Figure 3 shows the gate current Ig and input current in the example.
It shows the time dependence of the current I _L flowing through _{the IS} superconducting loop and the current I _A flowing through the first gate. Figure 4 shows the threshold characteristics of the gate used as the second gate in the first embodiment, where the vertical axis is the current I _A flowing through the first gate, and the horizontal axis is the current I flowing through the superconducting loop. It is _L. FIG. 5 shows a second embodiment of the invention. FIG. 6 shows the threshold characteristics of a gate with asymmetric threshold characteristics, where the horizontal axis represents the current I _L flowing through the superconducting loop, and the vertical axis represents the current I _A flowing through the first gate. FIG. 7 shows a third embodiment of the invention. In the figure, 10...gate using Josephson junction, 11...input line, 12...gate current path, 13...superconducting loop circuit, 14...reset gate, 15...reset input line, 20...
...first gate, 21 ... input line of first gate, 22 ... gate current path, 23 ... superconducting loop circuit, 24 ... second gate, 25 ... input line of second gate , 40...Operating point at time _t0 in Fig. 3, 41...Operating point at time _t1 in Fig. 3, 42...Operating point at time t3 in Fig. ₃ ,
43...Operating point at time _t5 in Fig. 3, 50...
...first gate, 51 ... input line of first gate, 52 ... gate current path, 53 ... superconducting loop circuit, 54 ... second gate, 55 ... input line of second gate , 56...damping resistance, 6
0... Operating point at time t ₀ in Figure 3, 61...
Operating point at time t ₁ in Figure 3, 62... Operating point at time t 3 in Figure ₃ , 63... Time in Figure 3
Operating point at t ₅ , 70...first gate, 71
...First gate input line, 72...Gate current path, 73...Superconducting loop circuit, 74...Second
gate, 75...first input line of the second gate, 76...second input line of the second gate.

Claims (1)

[Claims] 1 One or more switches using Josephson junctions are connected in series, and the first gate is switched by a current applied to the input line, and the Josephson junction has a magnetically coupled input line. a superconducting loop circuit consisting of a superconducting stripline having an inductance; and a gate current path that supplies a gate current to the first gate and the superconducting loop circuit; A first current path in which the first gate and the second gate are connected in series, and a second current path in which the superconducting loop circuit and the input line of the second gate are connected in series are connected in parallel. A self-resetting superconducting loop circuit using Josephson junction characterized by the following.