JPH0338068A - Photoelectromotive force element - Google Patents
Photoelectromotive force elementInfo
- Publication number
- JPH0338068A JPH0338068A JP1173723A JP17372389A JPH0338068A JP H0338068 A JPH0338068 A JP H0338068A JP 1173723 A JP1173723 A JP 1173723A JP 17372389 A JP17372389 A JP 17372389A JP H0338068 A JPH0338068 A JP H0338068A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor layer
- type semiconductor
- layer
- layers
- diffusion preventive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 43
- 238000009792 diffusion process Methods 0.000 claims abstract description 18
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 abstract description 10
- 229910052796 boron Inorganic materials 0.000 abstract description 10
- 239000002019 doping agent Substances 0.000 abstract description 7
- 239000000758 substrate Substances 0.000 abstract description 4
- 239000011521 glass Substances 0.000 abstract description 2
- 230000003449 preventive effect Effects 0.000 abstract 5
- 238000000034 method Methods 0.000 abstract 2
- 238000006243 chemical reaction Methods 0.000 description 10
- 229910021417 amorphous silicon Inorganic materials 0.000 description 9
- 230000000694 effects Effects 0.000 description 8
- 230000002265 prevention Effects 0.000 description 7
- 238000000137 annealing Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Photovoltaic Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は太陽電池等として用いられる光起電力素子に関
する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a photovoltaic element used as a solar cell or the like.
例えばpin型アモルファスシリコン太陽電池にあって
は、透光性基板上に、導電型がp型のアモルファスシリ
コン半導体層(以下単にp型半導体層という)、導電型
がi型のアモルファスシリコン半導体層(以下単にl型
半導体層という〉、導電型がn型のアモルファスシリコ
ン半導体層(以下単にn型半導体層という)等がこの順
序で積層されるが、p型半導体層上にl型半導体層を積
層形成する場合、p型半導体層のドーパントであるボロ
ンがl型半導体層内に拡散するのを防止するためl型半
導体層の形成に先立ってP型半導体層上にエネルギバン
ドギャップの不連続性の改善を兼ねてSiC等の拡散防
止層を形成することが行われている。For example, in a pin-type amorphous silicon solar cell, an amorphous silicon semiconductor layer with a p-type conductivity (hereinafter simply referred to as a p-type semiconductor layer) and an amorphous silicon semiconductor layer with an i-type conductivity are formed on a transparent substrate. An amorphous silicon semiconductor layer with an n-type conductivity (hereinafter simply referred to as an n-type semiconductor layer) is laminated in this order, but an l-type semiconductor layer is laminated on a p-type semiconductor layer. In order to prevent boron, which is a dopant of the p-type semiconductor layer, from diffusing into the l-type semiconductor layer, an energy band gap discontinuity is formed on the p-type semiconductor layer prior to the formation of the l-type semiconductor layer. For improvement, a diffusion prevention layer such as SiC is formed.
ところでこのような従来素子にあっては、ボロン等のド
ーパントに対する拡散防止効果が十分でなく熱的安定性
を欠くという問題があった。However, such conventional elements have a problem in that the diffusion prevention effect against dopants such as boron is not sufficient and they lack thermal stability.
本発明は斯かる事情に鑑みなされたものであって、その
目的とするところは高いドーパントの拡散防止効果が得
られるようにした光起電力素子を提供するにある。The present invention has been made in view of the above circumstances, and its object is to provide a photovoltaic element that can achieve a high dopant diffusion prevention effect.
本発明に係る光起電力素子にあっては、少なくとも1組
以上のpin構造を持つ光起電力素子において、p型半
導体層とl型半導体層との間に2層以上の拡散防止層を
設けたことを特徴とする。In the photovoltaic device according to the present invention, in the photovoltaic device having at least one set of pin structures, two or more anti-diffusion layers are provided between the p-type semiconductor layer and the l-type semiconductor layer. It is characterized by:
〔作用]
本発明にあってはこれによってi型半導体層の形成に際
しても拡散防止層は熱的に安定しており、ドーパントの
拡散を防止する。[Function] According to the present invention, the diffusion prevention layer is thermally stable even when forming an i-type semiconductor layer, and prevents dopant diffusion.
〔実施例1〕
以下本発明をその実施例を示す図面に基づいて具体的に
説明する。[Example 1] The present invention will be specifically described below based on drawings showing examples thereof.
第1図は本発明の実”施例1の断面構造図であり、ガラ
ス等の透光性基板lの表面に透明電極2.導電性がp型
のアモルファスシリコン半導体層(以下単にp型半導体
層という)3.拡散防止層たる界面層4+を型のアモル
ファスシリコン半導体層(以下単にi型半導体層という
)7.n型のアモルファスシリコン半導体層(以下単に
n型半導体層という)8、裏面電極9をこの順序に積層
形成して構成しである。FIG. 1 is a cross-sectional structural diagram of Example 1 of the present invention, in which a transparent electrode 2 is formed on the surface of a transparent substrate l such as glass. 3. An amorphous silicon semiconductor layer (hereinafter simply referred to as an i-type semiconductor layer) 7. An n-type amorphous silicon semiconductor layer (hereinafter simply referred to as an n-type semiconductor layer) 8. A back electrode. 9 are laminated in this order.
界面層4は複数のSiN層を有する超格子構造にて構威
されている。SiN層の形成条件の1例を表1に示す。The interface layer 4 has a superlattice structure having a plurality of SiN layers. Table 1 shows an example of the conditions for forming the SiN layer.
表 1
なお、窒素源としてはNH3に代えてN、を用いてもよ
い。Nil!の供給量は10secm105e/5iH
4=0.5)とし、界面層のs/5i=o、5とした。Table 1 Note that N may be used instead of NH3 as the nitrogen source. Nil! The supply amount is 10sec105e/5iH
4=0.5), and s/5i of the interface layer was set to 5.
その形成条件、各層の暦数、膜厚等については限定する
ものではなく必要に応じて設定すればよい。The formation conditions, the calendar number of each layer, the film thickness, etc. are not limited and may be set as necessary.
アモルファスSiNとアモルファスSiCとのボロン拡
散素子機能を比較すると第2図に示す如くである。第2
図は第1図に示した構造の光起電力素子を用いて太陽電
池を構威し、これに250°Cで5時間熱アニールを施
した後におけるボロンのIMAプロファイルを示し、横
軸にスパッタ時間(時)を、また縦軸にボロン濃度をと
って示している。A comparison of the boron diffusion element functions of amorphous SiN and amorphous SiC is as shown in FIG. Second
The figure shows the IMA profile of boron after constructing a solar cell using a photovoltaic element with the structure shown in Figure 1 and thermally annealing it at 250°C for 5 hours. Time (hours) is shown, and boron concentration is plotted on the vertical axis.
このグラフから明らかな如<SiCに比較してSiNを
用いたときはボロンの濃度が大幅に低減され、換言すれ
ばボロンの拡散防止効果が大きいことが解る。As is clear from this graph, the concentration of boron is significantly reduced when SiN is used compared to SiC, in other words, the effect of preventing boron diffusion is greater.
〔実施例2〕
第3図は本発明の実施例2の断面構造図であり、ガラス
等の透光性基板1の表面に透明電極2.p型半導体層3
.界面層であるアモルファスSiN 7!!14゜アモ
ルファスSiC層15.更にi型半導体層Ln型半導体
層8.裏面電極9をこの順序に積層して構成しである。[Example 2] FIG. 3 is a cross-sectional structural diagram of Example 2 of the present invention, in which a transparent electrode 2. p-type semiconductor layer 3
.. Amorphous SiN which is the interface layer 7! ! 14° amorphous SiC layer 15. Further, an i-type semiconductor layer Ln-type semiconductor layer 8. The back electrode 9 is laminated in this order.
アモルファスSiN層14とアモルファス5iCJi1
5との積層順序はp型半導体層3側にアモルファスSi
N層14が、またi型半導体層7側にアモルファス5i
CIJ15が位置するようにすればよい。Amorphous SiN layer 14 and amorphous 5iCJi1
The stacking order with 5 is that amorphous Si is placed on the p-type semiconductor layer 3 side.
The N layer 14 also has an amorphous layer 5i on the i-type semiconductor layer 7 side.
CIJ15 may be located.
なおSiCはグレーテツド層、或いは5i−Hz結合の
多いi型半導体層を用いても同様の効果が得られること
が確認された。It has been confirmed that similar effects can be obtained by using a graded SiC layer or an i-type semiconductor layer with many 5i-Hz bonds.
これを太陽電池として構成したときの初期光電変換効率
は8.5%であった。またこれについて250°Cで熱
アニールを施し光電変換効率の推移を測定する耐熱性試
験を行った結果、第4図に示す如き結果を得た。When this was constructed as a solar cell, the initial photoelectric conversion efficiency was 8.5%. Further, a heat resistance test was conducted to thermally anneal the material at 250° C. and measure the change in photoelectric conversion efficiency, and the results shown in FIG. 4 were obtained.
第4図は横軸にアニール時間(時)を、また縦軸に充電
変換効率(%)をとって示しである。グラフ中O印でプ
ロットしたのは本発明素子、Δ印でプロットしたのは従
来素子の結果である。このグラフから明らかなようにア
ニール時間が1時間を越えると従来素子にあっては光電
変換効率(%)が急速に低下、換言すればボロンのi型
半導体層への拡散が急速に増大して太陽電池としての特
性を低下させているのに対し、本発明素子では若干の低
下は認められるものの特性が長時間維持されていること
が解る。FIG. 4 shows annealing time (hours) on the horizontal axis and charge conversion efficiency (%) on the vertical axis. In the graph, the results plotted with O marks are the results for the device of the present invention, and the results plotted with Δ marks are the results for the conventional device. As is clear from this graph, when the annealing time exceeds 1 hour, the photoelectric conversion efficiency (%) of the conventional device rapidly decreases, in other words, the diffusion of boron into the i-type semiconductor layer rapidly increases. It can be seen that while the characteristics as a solar cell are deteriorated, the characteristics of the device of the present invention are maintained for a long time although some deterioration is observed.
(実施例3〕
第5図は本発明の実施例3の断面構造図であり、ガラス
等の透光性基板lの表面に透明電極2.p型半導体層3
.界面層であるアモルファスSi0層24゜アモルファ
スSiN 層25.アモルファスSiC層26゜更にi
型半導体N7.n型半導体層8.裏面電極9をこの順序
に積層して形成しである。(Example 3) FIG. 5 is a cross-sectional structural diagram of Example 3 of the present invention, in which a transparent electrode 2, a p-type semiconductor layer 3, a transparent electrode 2, a p-type semiconductor layer 3, etc.
.. Amorphous Si0 layer 24° amorphous SiN layer 25. which is an interface layer. Amorphous SiC layer 26° further i
type semiconductor N7. n-type semiconductor layer 8. The back electrodes 9 are formed by laminating them in this order.
なお、SiNはSiに対するNの比率、即ちN / S
i=0.5(=50%)以上の成分組成とする。この
実施例3の光起電力素子を太陽電池として用いたときの
初期先覚変換効率は9%であった。Note that SiN is the ratio of N to Si, that is, N/S
The component composition is i=0.5 (=50%) or more. When the photovoltaic device of Example 3 was used as a solar cell, the initial preemptive conversion efficiency was 9%.
第6図はN / S iと、光電変換効率との関係を示
すグラフであり、横軸にN/Si(%)を、また縦軸に
光電変換効率(%)をとって示してあり、グラフ中O印
でプロットしたのはSiN層の厚さを100人、またΔ
印でプロットしたのはSiN層の厚さを50入とした場
合であって、これを250℃で3時間熱アニール処理し
た後の結果を示している。このグラフから明らかなよう
にN/5i=5%以上でいずれも従来素子よりも高い光
電変換効率が得られていることが解る。FIG. 6 is a graph showing the relationship between N/Si and photoelectric conversion efficiency, with N/Si (%) plotted on the horizontal axis and photoelectric conversion efficiency (%) plotted on the vertical axis. The O mark in the graph plots the thickness of the SiN layer for 100 people, and Δ
Plotted with marks is the case where the thickness of the SiN layer is 50 mm, and shows the results after thermal annealing at 250° C. for 3 hours. As is clear from this graph, it can be seen that higher photoelectric conversion efficiency than the conventional element is obtained when N/5i=5% or more.
なお、上述の実施例1〜3にあってはpin型アモルフ
ァスシリコン光起電力素子の場合について説明したが、
nip型アモルファスシリコン光起電力素子にも適用し
得ることは勿論である。In addition, in the above-mentioned Examples 1 to 3, the case of a pin-type amorphous silicon photovoltaic element was explained.
Of course, the present invention can also be applied to nip type amorphous silicon photovoltaic elements.
以上の如く本発明素子にあっては、p型半導体層とl型
半導体層との間に2層以上のドーパント拡散防止層を介
装せしめることとしたから、拡散防止効果が確実で、高
い耐熱性が得られ、信頼性を高め得るなど本発明は優れ
た効果を奏するものである。As described above, in the device of the present invention, two or more dopant diffusion prevention layers are interposed between the p-type semiconductor layer and the l-type semiconductor layer, so that the diffusion prevention effect is reliable and the heat resistance is high. The present invention has excellent effects such as improved performance and improved reliability.
第1図は本発明の実施例1の断面構造図、第2図はSi
NとSiCとのボロン拡散防止効果を示すグラフ、第3
図は本発明の実施例2を示す断面構造図、第4図は熱ア
ニール時間と光電変換効率とを示すグラフ、第5図は本
発明の実施例3を示す断面構造図、第6図はN / S
iと熱アニール後の光電変換効率との関係を示すグラ
フである。
l・・・透光性基板 2・・・透明電極3・・・p型
半導体層 4・・・界面層7・・・l型半導体層
8・・・n型半導体層特 許 出願人 三洋電機株式
会社FIG. 1 is a cross-sectional structural diagram of Example 1 of the present invention, and FIG.
Graph showing the boron diffusion prevention effect of N and SiC, 3rd
FIG. 4 is a graph showing thermal annealing time and photoelectric conversion efficiency. FIG. 5 is a cross-sectional structure diagram showing Example 3 of the present invention. FIG. N/S
It is a graph showing the relationship between i and photoelectric conversion efficiency after thermal annealing. l... Transparent substrate 2... Transparent electrode 3... P-type semiconductor layer 4... Interface layer 7... L-type semiconductor layer
8...N-type semiconductor layer patent Applicant: Sanyo Electric Co., Ltd.
Claims (1)
子において、p型半導体層とi型半導体層との間に2層
以上の拡散防止層を設けたことを特徴とする光起電力素
子。1. A photovoltaic device having at least one set of pin structures, characterized in that two or more anti-diffusion layers are provided between a p-type semiconductor layer and an i-type semiconductor layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1173723A JPH0338068A (en) | 1989-07-05 | 1989-07-05 | Photoelectromotive force element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1173723A JPH0338068A (en) | 1989-07-05 | 1989-07-05 | Photoelectromotive force element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0338068A true JPH0338068A (en) | 1991-02-19 |
Family
ID=15965951
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1173723A Pending JPH0338068A (en) | 1989-07-05 | 1989-07-05 | Photoelectromotive force element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0338068A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11186587A (en) * | 1997-12-18 | 1999-07-09 | Sanyo Electric Co Ltd | Photodetecting element |
GB2364599A (en) * | 2000-01-07 | 2002-01-30 | Lucent Technologies Inc | Diffusion barrier spike in layer not forming a pn junction |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6340382A (en) * | 1986-08-05 | 1988-02-20 | Sanyo Electric Co Ltd | Amorphous photovoltaic device |
JPH01145875A (en) * | 1987-12-02 | 1989-06-07 | Hitachi Ltd | Amorphous si solar battery |
-
1989
- 1989-07-05 JP JP1173723A patent/JPH0338068A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6340382A (en) * | 1986-08-05 | 1988-02-20 | Sanyo Electric Co Ltd | Amorphous photovoltaic device |
JPH01145875A (en) * | 1987-12-02 | 1989-06-07 | Hitachi Ltd | Amorphous si solar battery |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11186587A (en) * | 1997-12-18 | 1999-07-09 | Sanyo Electric Co Ltd | Photodetecting element |
GB2364599A (en) * | 2000-01-07 | 2002-01-30 | Lucent Technologies Inc | Diffusion barrier spike in layer not forming a pn junction |
US6437372B1 (en) | 2000-01-07 | 2002-08-20 | Agere Systems Guardian Corp. | Diffusion barrier spikes for III-V structures |
GB2364599B (en) * | 2000-01-07 | 2002-10-30 | Lucent Technologies Inc | Diffusion barrier spikes for III-V structures |
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