JPH0337734A - Dually constituted device - Google Patents

Abstract

PURPOSE:To improve the maintainability by accessing a module of one block through a module of the other device and performing diagnosis to specify the trouble position. CONSTITUTION:If a block A is in trouble, a module 2a2 and following modules of the block A are accessed from a module 2b1; and when they are normally accessed, trouble of a module 2a1 or an access path 4a1 to the module 2a2 is judged. When the module 2b2 is accessed from the module 2a1, trouble of the access path 4a1 is specified if it is normally accessed, and trouble of the module 2a1 is specified if it is not normally accessed. Thus, the maintainability is improved.

Description

[Detailed Description of the Invention] [Summary] Regarding the redundant configuration device adopted in magnetic control devices etc. that require high reliability in information processing systems, failure points can be quickly identified and maintainability is improved. One or more modules are connected in series to the module connected to the common bus, and one block has access to the final module via each module; A duplex configuration device consisting of another block having the same configuration and the same function and also connected to the common bus, in which the access path between the blocks is accessed from the module at the same stage of both blocks to the module at the next stage of each other. The module is configured so that the module in one block is accessed via the module in the other block to perform diagnosis and identify the location of the failure.

[Field of Industrial Application] The present invention relates to a duplex configuration device employed in a magnetic control device etc. that requires high reliability in an information processing system, and in particular, the present invention relates to a duplex configuration device employed in a magnetic control device etc. that requires high reliability in an information processing system. The present invention relates to a duplex configuration device suitable for identifying a fault location in a block that is being processed.

[Prior Art] FIG. 4 is a block diagram of the prior art. The device shown in the figure is a dual storage device configured in a file control unit or the like. In the figure, 4A and 4B are storage devices having the same configuration and the same function;
41b is a bus interface module connected to common buses 42a and 42b, and 43a and 43b are bus interface modules 41a and 41b connected to data bus 4.
memory module 45 connected by 4a, 44b;
45b is a service adapter connected to the common bus 42a and connected to the bus interface module 41a by a service bus 46a;
2b, and is also connected to a bus interface module 41b and a service bus 46b. This service adapter 45a, 4
5b is a bus interface module 4La, 41b
The memory modules 43a and 43b are modules not equipped with a processor, whereas they are modules equipped with a processor, and are used to load firmware at startup, perform diagnosis in the event of a failure, and the like.

The same data is written to the storage devices 4A and 4B from a control device (not shown) at the same time, and at the time of reading, a predetermined device is accessed to read the data. If some kind of failure occurs in the device being accessed during this reading, that device is disconnected and access is switched to the other device.

During maintenance (maintenance and management) when a failure occurs, an instruction to execute diagnosis is issued from the outside to the service adapter of the failed device, and the service adapter accesses the bus interface module and memory module via the common bus or service bus. A diagnosis had been made.

[Problems to be Solved by the Invention] However, in conventional diagnosis, access from a service adapter to a memory module must go through a bus interface module within the same device. It was not possible to determine which bus interface module was at fault. Therefore, each module is sequentially replaced while diagnosis is performed using the service adapter to detect a failure location, which requires a long time for diagnosis, which poses a problem in terms of maintainability.

The present invention was created in view of these problems, and
It is an object of the present invention to provide a duplex configuration device that can quickly identify a failure location and improve maintainability.

[Means to solve the problem] FIG. 1 is a block diagram of the principle of the present invention.

As shown in the figure, the means of the present invention for achieving the above object is such that one or more modules 2a2 to 2an are connected in series to a module 2al connected to the common buses la and lb, and each module is connected to the module 2al connected to the common buses la and lb. A duplex configuration consisting of one block A, which is accessed up to the final module 2an, and the other block B, which has the same configuration and function as the other block A and is also connected to the common buses la and lb. An access path 3a1 between blocks that accesses modules at the same stage of both blocks A and B to modules at the next stage of each other.
~3an-1, 3b1 to 3bn-1 are provided, and the duplex configuration device is characterized in that the module of one block is accessed via the module of the other block to perform diagnosis and identify the fault location. .

In addition, in the figure, 4al ~ 4an-1, 4bl ~ 4Bn
-1 is an access route between modules in the device, 5a, 5
b is a service adapter that diagnoses blocks A and B.

[Function] In the present invention, as shown in FIG.
Apart from the access route 4al from al to the next module 2a2 in the same block, there is also an access route 3al to the next module 2b2 of block B, and an access route 3b from module 2bl to module 2a2.
As shown in Figure 1, access routes between blocks are provided in a cross pattern, and the access routes between blocks are switched during diagnosis.
The fault location is identified by changing the modules to be accessed, such as accessing the modules in the other block via the modules in one block.

For example, if block A is faulty, module 2
If module 2a2 and subsequent blocks of block A can be accessed normally from bl, it can be determined that either the module 2al or the access route 4al to module 2a2 is faulty, and the module 2b2 can be accessed from module 2al. In this case, it can be determined that the access route 4al is faulty if access is possible normally, and that the module 2al is faulty if access is defective.

[Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 2 is a block diagram of an embodiment of the present invention, showing a storage device configured as a buffer for transfer data in a file control unit. The storage device shown in the figure is made redundant with two storage devices and a storage device 2B to make it highly reliable. That is, the storage devices 2A and 2B are both connected to common buses 20a and 20b, and have a channel adapter T that serves as an interface with a host that is also connected to the common buses 20a and 20b.
It is accessed from a device adapter D that interfaces with a file device such as a magnetic disk device, data is written to both storage devices 2A and 2B, and data is read from a predetermined storage device. When one of the storage devices from which reading is performed fails, access is switched to the other storage device, thereby improving reliability against failure.

The storage device 2A has a bus interface module 21a.
, a data control module 22a, and a memory module 23a.The bus interface module 21a is connected to common buses 20a and 20b, and the data control module 22a and memory module 2
3a is connected in series to the bus interface module 21a. That is, the bus interface module 21a accesses the next-stage data control module 22a via the data bus 24a, and the data control module 22a further accesses the memory module 23a configured at the final end via the memory bus 25a. Then, data is read or written.

The storage device 2B consists of a bus interface module 21b, which has the same functions as the storage device 2A, a data control module 22b, and a memory module 23b. Similarly, the bus interface module 21b is connected to the common buses 20a and 20b, and has a data bus 24b. A data control module 22b1 and a memory module 23b are connected to each other by a memory bus 25b.

An access path is provided between the storage device 2A and the storage device 2B from modules at the same stage to modules at the next stage. That is, the front data bus 26a is connected from the bus interface module 21a of the storage device 2A to the data control module 22b of the memory device 2B, and the front data bus 26a is connected to the bus interface module 21b of the storage device 2B.
From the data control module 22 of the storage device 2A
A front data bus 26b is provided to the storage device 2A, and a front memory bus 27a is provided from the data control module 22a of the storage device 2A to the memory module 23b of the storage device 2B. 2B's data control module 22b to the memory module 23 of the storage device 2A.
A front memory bus 27b is provided to a. Further, the bus interface modules 21a, 21b and the data control modules 22a, 22b are each provided with a bus select circuit 28, and the bus interface modules 21a, 21b are provided with bus select registers 29a, 29b, respectively. ,
Its bus select register 29a.

Each bus select circuit 28 is switched by a bus select signal outputted from 29b, so that one of the modules at the next stage is accessed.

In addition, the storage devices 2A and 2B include service adapters Sa,
Sb is connected. The service adapter Sa is connected to the common bus 20a, and the bus select register 29
Service buses SBI and SB for setting a and 29b
2 and 2 are respectively bus interface modules 21a,
21b. The service adapter sb is connected to the common bus 20b and is also used for setting the bus select registers 29a and 29b.
I and SB2 are each bus interface module 2
1a and 21b. These service adapters Sa and Sb are bus interface modules 21a
, 21 bs data control module 22 a,
22 bs and memory modules 23a and 23b are modules without a processor, whereas they are equipped with a processor and are used to load firmware to the module at startup, process when a failure occurs, and connect externally during maintenance. The device is connected to the computer and executes a diagnostic program in response to commands from the outside to perform diagnosis, etc.

FIG. 3 is a circuit diagram of the bus select register 29 and bus select circuit 28. As shown in the figure, the bus select register 29 consists of 8 bits, and each bit is defined as follows.

Bit O "O": Normal operation "1": Diagnosis execution bits 1 to 4 "O": Bus connection to own device module "1": Bus connection to other device modules Bits 5 to 7 Reserved This bus select register 29 is a service adapter Sa, Sb via a service bus driver/receiver 290.
The settings are made from , and the output is configured with AND gates (AND circuits) 291, 292, 293° 294,
The output of bit 0 is a 1 to one input of each AND gate, and the output of each bit 1 to 4 is a 1 to one input of each AND gate.
It is output to the other input of the D gate. The outputs of AND gates 291 and 292 are connected to the bus interface module, and the outputs of AND gates 293 and 294 are connected to the respective bus select circuits 2 in the data control module.
8 as a bus select signal.

The bus select circuit 28 includes bus branch circuits 281a, 28
1b, internal bus selectors 282a and 282b, a driver/receiver 283 that is a human output buffer for the bus to other devices, and a driver/receiver 284 that is a human output buffer for the bus to the own device, and a bus branch circuit 281a.
, 281b and internal bus selectors 282a, 282b
The bus branch circuits 281a and 281b are configured to accommodate duplication of processing circuits within the module, and the bus branch circuits 281a and 281b connect the internal bus to the driver/receiver 283 of the other device bus and the driver/receiver 284 of the own device bus. The internal bus selectors 282a and 282b input a bus select signal to enable one of the two branched internal buses. Here, a buffer is provided for each of the two internal buses that are branched off, and a bus select signal is input to one, and a signal that is an inverted version of the bus select signal is input to the other, so that when one is enabled, the other is disabled. When the bus select signal is "1", the internal bus to the driver/receiver 283 of the other device bus is enabled, and when it is "0", the internal bus to the driver/receiver 284 of the own device bus is enabled. It is composed of

In the storage devices 2A and 2B having the above configuration, the bus select register 29a is selected by the service adapters Sa and Sb at startup.
, 29b are all set to "0" to perform normal operation. That is, access is performed by validating the data buses 24a, 24b and memory buses 25a, 25b that connect the modules within the device itself. In normal diagnosis or diagnosis at the time of a failure, the settings of the bus select registers 29a and 29b are changed by the service adapters Sa and Sb, and access is performed through various access routes to identify the failure location. For example, (1) First, write Hex'80' (bit 0-
In this setting, the access route is the same as in normal operation), and each device is diagnosed.

(2) As a result of the diagnosis, for example, if the storage device 2A is found to be malfunctioning, a Hex '88° (beep) will appear in the register 29a.
0.4="1") to access the storage device 2A.

(3) Access to the storage device 2A is via the memory module 23 of the storage device 2B via the bus interface module 21a and data control module 22a.
This is access to b. If this access is normal,
Memory bus 25a of storage device 2A or memory module 2
3a is found to be at fault.

(4) Furthermore, set lex'^8' (beep 0, 2.4 = "1") in the register 29a to access the storage device 2A.

(5) Access to the storage device 2A is from the bus interface module 21a to the memory module 23a of the storage device 2A via the data control module 22b of the storage device 2B. If this access is normal, it can be determined that the memory bus 25a is out of order, and if it is defective, it can be determined that the memory module 23a is out of order.

In this way, in this embodiment, cross-shaped access routes are provided so that the modules of each device can be shared, and diagnosis is performed by accessing through various access routes.
Failure locations can be quickly identified, reducing maintenance time. Furthermore, if this diagnosis is automatically performed using the diagnostic program in the service adapter and a display function is provided to display the results, it will be possible to quickly identify and replace the faulty part during maintenance, which will significantly shorten maintenance time and improve equipment efficiency. Availability can be improved.

In addition, although the example of three module configurations was shown in the said Example, it is clear that this invention is not limited to this. Furthermore, the bus switching means can also be modified in various ways.

[Effects of the Invention] As explained above, according to the present invention, it is possible to quickly diagnose and identify a failure location without replacing modules, thereby significantly shortening maintenance time and improving equipment efficiency. Availability can be improved.

[Brief explanation of drawings]

Fig. 1 is a block diagram of the principle of the present invention, Fig. 2 is a block diagram of an embodiment of the present invention, Fig. 3 is a circuit diagram of the bus select register and bus select circuit of the embodiment, and Fig. 4 is a diagram of the prior art. It is a block diagram. la, lb, 20a, 20b・-common bus, 2al
~2an, 2bl ~2bn・”Module, 3
al ~ 3an-1, 3b1 ~ 3bn-1 - access route between devices, 4al ~ Jan-1, 4b1 ~ 4bn-1... access route between modules within the device, 5a, 5b, Sa, Sb -... service, adapter, 2
A, 2B... Storage device, T... Channel adapter, D... Device adapter, 21a, 21b... Path interface module, 22a, 22b... Data control module, 23a, 23b... Memory module, 24a, 24
b...Data bus, 25a, 25b'' memory bus, 26a, 26ty...Front data bus, 27a,
27b...Front memory bus, 28...Bus select circuit, 29a, 29b...Bus select register. Figure 1

Claims (1)

[Claims] Module (2) connected to common bus (1a, 1b)
a_1) with one or more modules (2a_2 to 2a
__n) are connected in series, and one block (A) is accessed via each module to the final end module (2a_n), and the other block (A) is connected in series.
It has the same configuration and functions as A), and also uses a common bus (
1a, 1b), which is a duplex configuration device consisting of the other block (B) connected to the blocks (A, 1b), and an access path between the blocks that accesses from the modules at the same stage of both blocks (A, B) to the modules at the next stage of each other. (3a_1~3a_n_-_1, 3b_1~3b_n
_-_1) is provided, and a module of one block is accessed via a module of the other block to perform diagnosis and identify a fault location.