JPH0337332B2 - - Google Patents
Info
- Publication number
- JPH0337332B2 JPH0337332B2 JP56073714A JP7371481A JPH0337332B2 JP H0337332 B2 JPH0337332 B2 JP H0337332B2 JP 56073714 A JP56073714 A JP 56073714A JP 7371481 A JP7371481 A JP 7371481A JP H0337332 B2 JPH0337332 B2 JP H0337332B2
- Authority
- JP
- Japan
- Prior art keywords
- reference signal
- circuit
- output
- phase
- preset value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/131—Digitally controlled
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
- H03K2005/00078—Fixed delay
- H03K2005/00097—Avoiding variations of delay using feedback, e.g. controlled by a PLL
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00293—Output pulse is a delayed pulse issued after a rising or a falling edge, the length of the output pulse not being in relation with the length of the input triggering pulse
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Pulse Circuits (AREA)
- Manipulation Of Pulses (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56073714A JPS57188140A (en) | 1981-05-15 | 1981-05-15 | Reference signal generating circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56073714A JPS57188140A (en) | 1981-05-15 | 1981-05-15 | Reference signal generating circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57188140A JPS57188140A (en) | 1982-11-19 |
| JPH0337332B2 true JPH0337332B2 (enrdf_load_html_response) | 1991-06-05 |
Family
ID=13526159
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56073714A Granted JPS57188140A (en) | 1981-05-15 | 1981-05-15 | Reference signal generating circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57188140A (enrdf_load_html_response) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3467880B2 (ja) * | 1994-12-26 | 2003-11-17 | ソニー株式会社 | クロック信号発生装置 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6019689B2 (ja) * | 1977-07-28 | 1985-05-17 | 松下電器産業株式会社 | 分周装置 |
-
1981
- 1981-05-15 JP JP56073714A patent/JPS57188140A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57188140A (en) | 1982-11-19 |
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