JPH0336749A - Reliability estimating element - Google Patents
Reliability estimating elementInfo
- Publication number
- JPH0336749A JPH0336749A JP17239589A JP17239589A JPH0336749A JP H0336749 A JPH0336749 A JP H0336749A JP 17239589 A JP17239589 A JP 17239589A JP 17239589 A JP17239589 A JP 17239589A JP H0336749 A JPH0336749 A JP H0336749A
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- layer wiring
- reliability evaluation
- film
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 9
- 229920005591 polysilicon Polymers 0.000 claims abstract description 9
- 238000012360 testing method Methods 0.000 claims abstract description 8
- 238000011156 evaluation Methods 0.000 claims description 29
- 238000009792 diffusion process Methods 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 5
- 229910052710 silicon Inorganic materials 0.000 abstract description 5
- 239000010703 silicon Substances 0.000 abstract description 5
- 239000000758 substrate Substances 0.000 abstract description 5
- 239000010410 layer Substances 0.000 description 21
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 6
- 239000011521 glass Substances 0.000 description 6
- 229910052698 phosphorus Inorganic materials 0.000 description 6
- 239000011574 phosphorus Substances 0.000 description 6
- 230000001681 protective effect Effects 0.000 description 5
- 239000011229 interlayer Substances 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 239000000470 constituent Substances 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 210000004709 eyebrow Anatomy 0.000 description 1
- 230000008595 infiltration Effects 0.000 description 1
- 238000001764 infiltration Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
（ω
（２）
（１）
本発明は、２層配線以上の多層金属配線膜の信頼性評価
に用いる信頼性評価用素子に関する。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application (ω (2) (1) The present invention relates to a reliability evaluation element used for reliability evaluation of a multilayer metal wiring film having two or more layers of wiring.
従来の技術
半導体集積回路は、近年高集積化ならびに高密度化の方
向にあり、回路パターン寸法の微細化が進行している。BACKGROUND OF THE INVENTION Semiconductor integrated circuits have recently become highly integrated and densely packed, and circuit pattern dimensions are becoming increasingly finer.
このようなパターン寸法の微細化に伴い、回路構成素子
などの電気的特性との関連において、構造・配置及び加
工プロセスなどに大きな変革を受けつつある。各構成素
子間を電気的に相互接続する金属配線膜は、高集積化の
ため多層構造化され、多層配線化に伴い各種の問題が生
じている。With such miniaturization of pattern dimensions, the structure, arrangement, processing process, etc. are undergoing major changes in relation to the electrical characteristics of circuit components and the like. The metal wiring film that electrically interconnects each constituent element has been made into a multilayer structure for higher integration, and various problems have arisen with the multilayer wiring.
多層配線構造の信頼性上の解決課題は、保護膜、眉間絶
縁膜、配線膜のカバレッジの悪さに起因する水分の浸入
による特性劣化、エレクトロマイグレーションおよびス
トレスマイグレーションによる配線膜の抵抗増加あるい
は断線である。これらの課題を評価するために、信頼性
評価用素子が用いられている。従来、信頼性評価素子と
しては、簡単な構造が使用されている。Reliability issues for multilayer wiring structures include deterioration of characteristics due to moisture infiltration due to poor coverage of the protective film, glabella insulating film, and wiring film, and increased resistance or disconnection of the wiring film due to electromigration and stress migration. . Reliability evaluation elements are used to evaluate these issues. Conventionally, a simple structure has been used as a reliability evaluation element.
第２図および第３図は従来の信頼性評価用素子の構造例
を示す図であり、第２図の信頼性評価用素子はシリコン
基板１に分離用５ｉ０２膜２を形成し、この上にポリシ
リコン配線３を形成したシリコン基板上の全域を眉間絶
縁膜４で覆い、さらに、この上に第１層配線（Ａｅ −
８１−Ｃｕ）５、眉間絶縁膜（Ｓｉ（ｈ膜とリンガラス
膜）６゜第２層配線（Ａ！！ −８１−Ｃｕ）７および
保護膜（窒化シリコン膜とリンガラス膜）８を順次配置
した構造となっている。また、第３図で示す信頼性評価
用素子は、シリコン基板１の表面全域に分離用５ｉ（ｈ
膜相当の５ｉ０２膜２０が形成され、この上に眉間絶縁
膜４．第１層配線５２層間絶縁膜６．第２層配線７およ
び保護膜８を順次配置した構造となっている。これらの
信頼性評価用素子は、そのいずれもが第２層配線を評価
するためのものであり、第２層配線の下部に第１層配線
やポリシリコン配線が交差配置された構造となっている
。また、第２層配線と第１層配線の接続（バイアホール
〉がチェーン構造のような信頼性評価用素子もある。こ
れらの信頼性評価用素子の構造は、実製品とはかけ離れ
た単純な構造である。2 and 3 are diagrams showing structural examples of conventional reliability evaluation elements. The reliability evaluation element in FIG. 2 has a 5i02 film 2 for isolation formed on a silicon substrate 1, and The entire area on the silicon substrate on which the polysilicon wiring 3 is formed is covered with a glabellar insulating film 4, and the first layer wiring (Ae -
81-Cu) 5, eyebrow insulating film (Si (h film and phosphorus glass film) 6° second layer wiring (A!! -81-Cu) 7 and protective film (silicon nitride film and phosphorus glass film) 8. In addition, the reliability evaluation element shown in FIG.
A 5i02 film 20 corresponding to the film is formed, and a glabella insulating film 4 is formed thereon. 1st layer wiring 52 interlayer insulating film 6. It has a structure in which second layer wiring 7 and protective film 8 are sequentially arranged. All of these reliability evaluation elements are for evaluating second-layer wiring, and have a structure in which first-layer wiring and polysilicon wiring are intersected under the second-layer wiring. There is. There are also devices for reliability evaluation where the connection (via hole) between the second layer wiring and the first layer wiring has a chain structure.The structure of these reliability evaluation devices is simple and far from the actual product. It is a structure.
発明が解決しようとする課題
上記のように、多層配線構造の信頼性評価用素子は、そ
の構造が実製品とかけ離れた単純な構造であるため、実
製品に即した信頼性評価結果にならないという問題点が
あった。Problems to be Solved by the Invention As mentioned above, reliability evaluation elements with multilayer wiring structures have a simple structure far different from that of actual products, so reliability evaluation results cannot be obtained in line with actual products. There was a problem.
課題を解決するための手段
上記の問題点を解決するために、本発明の信頼性評価素
子では、被試験配線膜下部に実製品と同等の構造部を設
けた構造となっている。Means for Solving the Problems In order to solve the above problems, the reliability evaluation element of the present invention has a structure in which a structure similar to that of the actual product is provided below the wiring film to be tested.
作用
第２層目配線下部に実製品と同等の構造部を設けた評価
素子構造としたことにより、エレクトロマイグレーショ
ン等の信頼性試験結果が、実製品に即したものとなる。By adopting an evaluation element structure in which a structure similar to that of the actual product is provided below the second layer wiring, the results of reliability tests such as electromigration are in line with the actual product.
実施例
第１図は、本発明の信頼性評価用素子の実施例を示す要
部断面図である。この実施例の信頼性評価用素子は、２
層配線構造のもので、第２層配線７は第１層配線５との
接続部を有し、しかも第２層配線７の下部には第１層配
線５．ポリシリコン配線３と共に、第１層配線５とシリ
コン基板１との接続部および第１層配線５とポリシリコ
ン配線３との接続部が存在している。このように、実製
品の構造とできる限り近似させている。Embodiment FIG. 1 is a sectional view of essential parts showing an embodiment of the reliability evaluation element of the present invention. The reliability evaluation element of this example is 2
It has a layer wiring structure, and the second layer wiring 7 has a connection part with the first layer wiring 5, and the first layer wiring 5. Along with the polysilicon wiring 3, there are a connecting portion between the first layer wiring 5 and the silicon substrate 1 and a connecting portion between the first layer wiring 5 and the polysilicon wiring 3. In this way, the structure of the actual product is approximated as much as possible.
本発明の信頼性評価用素子と、第２図、第３図に示した
ような単純な構造を有する従来の信頼性評価用素子とを
用いたエレクトロマイグレーションの比較結果を下表に
示す。The table below shows the comparison results of electromigration using the reliability evaluation element of the present invention and the conventional reliability evaluation element having a simple structure as shown in FIGS. 2 and 3.
ところで、 試験素子の寸法等の製作条件は、 次 の通りである。by the way, The manufacturing conditions such as the dimensions of the test element are as follows: Next It is as follows.
ポリシリコン配線３：厚さ４０００Ａ 第１層配！＄５：Ａｇ−１％５ｉ−０，５％Ｃｕ。Polysilicon wiring 3: thickness 4000A First layer distribution! $5: Ag-1%5i-0.5%Cu.
厚さ１μｍ
層間絶縁膜６：５ｉＯｔ膜とリンガラス膜、厚さ計１μ
ｍ
第２層配線７：／ｌ−１％５ｉ−０，５％Ｃｕ。Thickness 1μm Interlayer insulation film 6: 5iOt film and phosphorus glass film, total thickness 1μm
m Second layer wiring 7: /l-1%5i-0.5%Cu.
厚さ１μｍ
保護膜８：窒化シリコン膜とリンガラス膜、厚さ計１．
３μｍ
パッケージ：プラスチックパッケージ
また、比較のための加速試験は、１５０℃の高温中に上
記３種類の試験試料を配置し、１×１０６Ａ ／ ｃ−
の電流を流した。そして、試料に故障（断線〉が発生す
る時間を測定して行った。試験結果として、本発明を用
いた第１図で示した本発明の信頼性評価用素子の寿命を
１．０とした時の相対的な寿命を図面により示した従来
の信頼性評価用素子について、表に示したが、表から明
らかなように、本発明の信頼性評価用素子を用いた場合
が一番寿命が短く、従来の信頼性評価用素子に比べ、信
頼性評価精度が大幅に改善されている。Thickness: 1 μm Protective film 8: Silicon nitride film and phosphorus glass film, total thickness: 1.
3 μm Package: Plastic package In addition, in an accelerated test for comparison, the above three types of test samples were placed in a high temperature of 150 °C, and the test sample was 1 x 106 A/c-
A current was applied. Then, the time required for failure (disconnection) to occur in the sample was measured.As a test result, the life of the reliability evaluation element of the present invention shown in FIG. 1 using the present invention was set as 1.0. The table shows the relative lifespan of the conventional reliability evaluation element using drawings.As is clear from the table, the reliability evaluation element of the present invention has the longest lifespan. It is short and has significantly improved reliability evaluation accuracy compared to conventional reliability evaluation elements.
発明の詳細
な説明したところから明らかなように、本発明の信頼性
評価用素子構造は、実製品に即した信頼性評価精度の点
で、大きな効果を奏する。As is clear from the detailed description of the invention, the reliability evaluation element structure of the present invention has a great effect in terms of reliability evaluation accuracy that is consistent with actual products.
第１図は本発明の実施例を示す要部断面図、秦１・・・
・・・シリコン基板、２・・・・・・分離用５ｉ０２．
３・・・・・・ポリシリコン配線、４・・・・・・層間
絶縁膜、５・・・・・・第１層配線（Ａｅ−８１−Ｃｕ
） 、６・・・・・・層間絶縁膜（Ｓｉ０２とリンガラ
ス）、７・・・・・・第２層配線（Ａｅ−３１−Ｃｕ）
、８・・・・・・保護膜（窒化膜とリンガラス）。FIG. 1 is a sectional view of a main part showing an embodiment of the present invention, Hata 1...
...Silicon substrate, 2...Separation 5i02.
3... Polysilicon wiring, 4... Interlayer insulating film, 5... First layer wiring (Ae-81-Cu
), 6... Interlayer insulating film (Si02 and phosphorus glass), 7... Second layer wiring (Ae-31-Cu)
, 8... Protective film (nitride film and phosphorus glass).
Claims (4)
験配線膜と独立の複数の他の配線膜を設けたことを特徴
とする信頼性評価用素子。(1) A reliability evaluation element having a multilayer wiring structure, characterized in that a plurality of other wiring films independent of the wiring film to be tested are provided.
たことを特徴とする特許請求範囲第１項記載の信頼性評
価用素子。(2) The reliability evaluation element according to claim 1, characterized in that the wiring film to be tested is provided with another wiring film via an insulating film.
層と第１層目配線およびポリシリコンと第１層目配線と
のコンタクト部を設けたことを特徴とする特許請求範囲
第１項記載の信頼性評価用素子。(3) A contact portion between the diffusion layer and the first layer wiring, and between the polysilicon and the first layer wiring is provided below the wiring under test above the second layer wiring. Reliability evaluation element according to item 1.
ホールを設けたことを特徴とする特許請求範囲第１項記
載の信頼性評価素子。(4) The reliability evaluation element according to claim 1, characterized in that a via hole connecting different layer wiring is provided as the wiring to be tested.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17239589A JPH0336749A (en) | 1989-07-04 | 1989-07-04 | Reliability estimating element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17239589A JPH0336749A (en) | 1989-07-04 | 1989-07-04 | Reliability estimating element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0336749A true JPH0336749A (en) | 1991-02-18 |
Family
ID=15941142
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17239589A Pending JPH0336749A (en) | 1989-07-04 | 1989-07-04 | Reliability estimating element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0336749A (en) |
-
1989
- 1989-07-04 JP JP17239589A patent/JPH0336749A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI601222B (en) | Integrated circuit (ic) test structure with monitor chain and test wires | |
| KR100476900B1 (en) | Semiconductor integrated circuit device with test element group circuit | |
| US6288453B1 (en) | Alignment of openings in semiconductor fabrication | |
| US20080128893A1 (en) | Semiconductor package having semiconductor device featuring externally-accessible endless ring-shaped resistance circuit | |
| US6066561A (en) | Apparatus and method for electrical determination of delamination at one or more interfaces within a semiconductor wafer | |
| US6897475B2 (en) | Test structure and related methods for evaluating stress-induced voiding | |
| JP3337901B2 (en) | Integrated circuit test board with limited thermal expansion characteristics | |
| US4814283A (en) | Simple automated discretionary bonding of multiple parallel elements | |
| EP0692799A2 (en) | Trimmable capacitor | |
| US6091080A (en) | Evaluation method for wirings of semiconductor device | |
| JPH0336749A (en) | Reliability estimating element | |
| US7074629B2 (en) | Test patterns for measurement of effective vacancy diffusion area | |
| JPH04365347A (en) | Element structure for monitor apparatus in semiconductor chip | |
| WO2023019657A1 (en) | Semiconductor structure and manufacturing method therefor | |
| JP3093216B2 (en) | Semiconductor device and inspection method thereof | |
| JPH03268441A (en) | Substrate of semiconductor integrated circuit | |
| US20230046800A1 (en) | Semiconductor structure and method for manufacturing same | |
| JPH0496343A (en) | Semiconductor device | |
| JPH0766263A (en) | Contact resistance measuring method of multilayered metal wiring, semiconductor device and wafer | |
| KR20050101857A (en) | Stacked via chain test pattern group of semiconductor device | |
| JPH0964122A (en) | Probe card, manufacture of probe card and manufacture of semiconductor device using probe card | |
| Homa et al. | Reliability of Metallized Ceramic/Polyimide Substrates | |
| KR20010061492A (en) | Test pattern of metal line's reliability in a semiconductor device | |
| JPH0545398A (en) | Testing method of circuit board | |
| JPH06177221A (en) | Semiconductor device for evaluating reliability and product lsi and wafer with built-in evaluation pattern for evaluating reliability |