JPH0336619A - Printer device - Google Patents

Abstract

PURPOSE:To confirm the received data on a printer device side by printing and outputting external data as a character with a hexadecimal number by an operation of the printer device side as necessary in addition to a function for executing the printing in accordance with the received data. CONSTITUTION:In the case of a second operation mode, in a switch 1, '1' and '2' are brought into contact with each other, and an operation mode F/F a is '1'. When received data is written, a synchronizm control F/F 8 becomes '1', and becomes a write inhibiting state. A data selecting F/F 7 is '0', a nega tive logical output L is connected to a first data selecting circuit 4, and the circuit 4 selects the high-order 4 bits of a received data storage register 3, and outputs them to a data converting circuit 5. The circuit 5 generates the corresponding character code, when the data of 4 bits becomes hexadecimal, and outputs it to a second data selecting circuit 6. The circuit 6 outputs it as reception data 2. In the case of reading out the data 2, the F/F 7 is inverted by a signal and becomes '1', and outputs a negative logical output '0'. On the other hand, a mode signal is '1' and does not pass through an OR gate 9, and the synchronism control F/F 8 is not reset. In this state, the F/F 7 becomes '1', and the circuit 4 selects the low-order 4 bits of the register 3.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a printer device used as an output device in an information processing system.

[Conventional technology]

Conventionally, printer devices are output fCII used in computer systems to output processing results on paper.
t1, and the printout function will not change in the future.

However, as the data processed by computer systems has expanded to include various media such as characters, images, and graphs, the data output by printers has also become more diverse, and the data controlled by printers has also become more complex.

[Problem to be solved by the invention]

When using a printer device that requires complicated control in such a complicated system, there is a high probability that problems will occur with other devices in the system, the communication network, or the software used.

However, the printer only performs printing according to the arc received data, and even if the print result differs from the expected value, it may be that the received data is incorrect, or that the received data is correct but the printer is malfunctioning, resulting in incorrect printing. There was a drawback that it was necessary to connect a special device to distinguish between the two.

[Means to solve the problem]

In addition to the conventional function of a printer device that prints data according to data received from the outside, the present invention enables data received from the outside to be printed as characters by operations on the printer device side as necessary.
It is an object of the present invention to provide a link device which has a function of printing out in hexadecimal numbers and allows the received data to be confirmed on the printer device side.

〔Example〕

Next, embodiments of the present invention will be described in detail using the drawings.

FIG. 1 is a diagram showing in detail the data receiving circuit of the printer device according to the embodiment of the present invention, including a switch 1 for changing the operation mode and an operation mode F/F 2 for storing the operation mode.
, a reception data storage register 3 that stores externally received data, and the upper 4 outputs of the reception data storage register 3.
An @l data selection circuit 4 that selects a bit or lower 4 bits, a data conversion circuit 5 that generates a corresponding character code when the 4-bit output from the first data selection circuit 4 is converted into a hexadecimal number, and the operation A second data selection circuit 6 selectively outputs the output of the reception data storage register 3 or the output of the data conversion circuit 5 depending on the mode, and a second data selection circuit 6 that operates when the operation mode F/F 2 is "L" and outputs the output of the reception data storage register 3. A data selection F/F 7 that generates selection signals for the upper 4 bits and lower 4 bits, a synchronization side control F/F 8 that indicates that received data is stored in the received data storage register 3, and an operation mode signal and readout. It is composed of an OR gate 9 that takes a logical sum with a signal, and an AND gate 10 that takes a logical term between the output of the OR gate 9 and the negative logic output of the data selection F/F 7.

First, a first operation mode in which the same data as received data is output will be explained. #! In the case of operation mode 1, switch 1 is in contact with ■ and ■, and operation mode F/F 2 is "0". When received data is written from outside, a # write signal is generated along with the received data. The lull signal is a negative 11ii pulse, which stores the received data in the received data storage register and also controls the synchronization control F/F.
Set 8.

The output of the periodic control F/F 8 is sent back to the outside as a write prohibition signal, and to the inside as a read permission signal. On the other hand, an operation mode signal is connected to the second data selection circuit 6, and the operation mode signal is connected to the second data selection circuit 6. Since the operation mode signal is "0", the second data selection circuit 6 outputs the data corresponding to the output of the received data storage register 3 as received data 2.

Here, since the read permission signal has been output, the read operation starts. When reading data, a read signal is generated. The read signal is a negative logic pulse signal υ
, data selection F/F7> and OR gate 9. Since the operation mode signal is connected to the reset terminal of data selection F/F7 and D is "0", data selection F
/F7 does not work. Further, since the operation mode signal "0" is also connected to the OR gate 9, the read signal passes through the OR gate 9. On the other hand, the data selection F/F7 is "0", and the negative logic output is "1", which is A N D goo)
101/(: Since it is connected with the output of OIL gate 9, the read signal passes through AND gate lo, and is connected to the clock terminal of synchronous control F/F 8, and also the data input terminal of synchronous control @P/F 8. Since “0” is connected to
8 becomes "0" and the write inhibit signal is reset.

Next, a second operation mode will be described in which received data is selected in the order of upper and lower (4 bifs), converted into corresponding character codes, and output. In the second operation mode, switch l is in contact with ■ and ■, and operation mode F/F21rl
It is J. The operation in which received data is written from the outside is similar to that in the first operation mode. When the received data is written, the synchronous control F/F 8 becomes "1" and a write-inhibited state is established. The data selection F/F 7 is rOJ, and the negative logic output rLJ is connected to the first data selection circuit 4. The first data selection circuit 4ti selects the upper 4 bits of the received data storage register 3, and selects the upper 4 bits of the received data storage register 3. Output to conversion circuit 5. The data conversion circuit 5 generates a character code corresponding to the 4-bit data in hexadecimal notation, and outputs it to the second data selection circuit 6. Second data selection circuit 6
Since the operation mode signal is "l", the data being sent from the data conversion circuit 5 is output as received data 2. Here, when reading received data 2, a read signal is generated, and data selection F is generated at the rising edge of the start-up signal.
/F7 is inverted and becomes "1", and as a negative logic output "
0" is output. - 10,000, the alignment signal is also connected to OR gate 9, but since the operation mode signal is "l", it does not pass through OR gate 9. For this reason, synchronous control F/F
8 is not reset.

Here, the data selection F/F 7 is set to "L" and the negative logic output is sent to the first data selection circuit 4, so
The first data selection circuit 4 selects the lower four bits of the received data storage register 3. Therefore, the second data selection circuit 6 selects 1 from the lower 4 bits of the received data storage register 3.
When converted into a hexadecimal number, the corresponding character code is output.

Since the synchronous control F/F 8 has not been reset, a read signal is subsequently generated, and data obtained by converting the lower 4 bits into a character code is read. At this time, data selection F
/F7 is inverted again to become rOJ, and the first data selection circuit 4 selects the upper four bits of the received data storage register 3 again.

On the other hand, the negative logic output of the data selection F/F 7 is output via the flAND gate 10 to the clock terminal of the synchronous control F/F 8. When p, data selection F/F 7 becomes rOJ, it changes from rOJ to "l", so one-cycle control F
/F8 is reset and the oath prohibition state is canceled.

〔Effect of the invention〕

As described above, the present invention includes a switch for changing the operating mode, an F/F for storing the operating mode, and depending on the operating mode, outputs the same data as the received data, or outputs the upper 4 bits of the received data, the lower 4 bits, and the 4 each with selection
By configuring the reception data circuit with a data conversion circuit that outputs the character code corresponding to when bits are converted into hexadecimal numbers, printing is normally performed according to the received data, and if necessary, by making a selection on the printer device side. , it is possible to provide a printer device that converts received data into hexadecimal numbers and prints out the converted data.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a receiving data circuit of a printer device according to the present invention. l...Switch, 2...Operating mode F
/F, 3...Receive data storage register, 4
- River: first data selection circuit, 5... data conversion path, 6... second data selection circuit, 7.
...Data selection F/F, 8...Synchronization control F/F, 9...OR gate, 1o...
...AND gate, a...Operating mode 16
No., b... Received data 1% C... Write signal, d... Write inhibit signal, e...
... Received data 2, f ... Read signal, g
...read permission signal.

Claims (1)

[Claims] An operation mode F/F that stores the operation mode, and when the operation mode F/F represents the first operation mode, outputs the same data as 8-bit data received from the outside, and outputs the same data as the 8-bit data received from the outside. To indicate operation mode 2, extract the 8-bit data received from the outside in the order of the upper 4 bits and the lower 4 bits,
It has a data receiving circuit consisting of a data conversion circuit that sequentially outputs a character code corresponding to when 4 bits are handled as a hexadecimal number, and a switch that changes the operation mode F/F, and the first operation mode is In the second operation mode, the printer device performs printing according to data received from the outside, and in the second operation mode, converts all the data received from the outside into hexadecimal numbers and prints.