JPH0334542A - Method and apparatus for fixation of semiconductor wafer to backplate - Google Patents
Method and apparatus for fixation of semiconductor wafer to backplateInfo
- Publication number
- JPH0334542A JPH0334542A JP16921289A JP16921289A JPH0334542A JP H0334542 A JPH0334542 A JP H0334542A JP 16921289 A JP16921289 A JP 16921289A JP 16921289 A JP16921289 A JP 16921289A JP H0334542 A JPH0334542 A JP H0334542A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor wafer
- backplates
- semiconductor wafers
- plate
- contact plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 86
- 238000000034 method Methods 0.000 title claims abstract description 23
- 239000000853 adhesive Substances 0.000 claims abstract description 29
- 230000001070 adhesive effect Effects 0.000 claims abstract description 29
- 239000012535 impurity Substances 0.000 claims abstract description 23
- 230000001105 regulatory effect Effects 0.000 claims abstract description 8
- 238000009792 diffusion process Methods 0.000 claims abstract description 7
- 238000003860 storage Methods 0.000 claims description 17
- 230000002093 peripheral effect Effects 0.000 claims description 6
- 235000012431 wafers Nutrition 0.000 abstract description 101
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 230000000694 effects Effects 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 239000013078 crystal Substances 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 238000010186 staining Methods 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 241000257465 Echinoidea Species 0.000 description 1
- 239000004809 Teflon Substances 0.000 description 1
- 229920006362 Teflon® Polymers 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 229920001971 elastomer Polymers 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 229920006122 polyamide resin Polymers 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001225 polyester resin Polymers 0.000 description 1
- 239000004645 polyester resin Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 229920005749 polyurethane resin Polymers 0.000 description 1
- BFKJFAAPBSQJPD-UHFFFAOYSA-N tetrafluoroethene Chemical group FC(F)=C(F)F BFKJFAAPBSQJPD-UHFFFAOYSA-N 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Landscapes
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
Description
［産業上の利用分野］
本発明は、半導体ウェハの当板固着方法および装置に関
する。
さらに詳しくは、トランジスタ、ダイオード等のディス
クリート素子（個別素子〉等として利用されるシリコン
（ＳＬ ）単結晶の円板形等からなる半導体ウェハから
ディスクリート素子用基板を製造する際に、半導体ウェ
ハを２分割切断工作する工程において半導体ウェハの周
縁へ当板を固着する方法と装置とに関する。
［従来の技術１
従来、本出願人は、シリコン単結晶の消耗低減等を目的
として、中央部に不純物が拡散されていない不純物未拡
散層を有し両面に不純物が拡散された不純物拡散層を有
する半導体ウェハを、厚み巾の略中心部から切断し、各
半導体ウェハの夫々の切断面を新な不純物を拡散するた
めの不純物未拡散層とするディスクリート素子用基板の
製造方法等を先に提案している（特願昭６３−１２６５
９１号〉。
さらに、前記製造方法等における半導体ウェハの切断工
作について、工作効率の確保、切断端の、損傷防止等を
目的として、半導体ウェハの周縁に当板を固着して行な
う技術についても先に提案している（特願平 ＠）
。
従来、前述の本出願人の先提案において、半導体ウェハ
の周縁に当板を固着する手段としては、例えばウェハキ
ャリアに並列した半導体ウェハの周縁上部に当板を一枚
づつ接着剤で固着していくことが行なわれている。
［発明が解決しようとする課題］
前述の従来の半導体ウェハの周縁に当板を固着する手段
では、第７図に示すように接着剤Ｃが硬化するまでに半
導体ウェハＷに対して当板Ｐが傾倒してしまい固着強度
不足や寸法精度の誤差が生じたり、第８図に示すように
接着剤Ｃが半導体ウェハＷ側に流下してしまい汚損が生
じたりして、固着工作の仕上がりが不良となるという問
題点を有している。
本発明はこのような問題点を解決するためになされたも
のであり、その目的は、固着工作の仕上りが良好な半導
体ウェハの当板固着方法とこの方法を実施するに好適な
装置とを提供することにある。
［課題を解決するための手段］
前述の目的を達成するため、本発明に係る半導体ウェハ
の当板固着方法は、当板を一定間隔で並列立設してその
上部に接着剤を塗布し、または上部に接着剤を塗布した
当板を一定間隔で並列立設した後に、中央部に不純物が
拡散されていない不純物未拡散層を有し両面に不純物が
拡散された不純物拡散層を有する半導体ウェハを当板と
同−間隔で並列して当板上に降下させ、半導体ウェハの
自重により半導体の周縁下部を当板に圧接固着する手段
を採用する。
また、本発明に係る半導体ウェハの当板固着装置は、当
板を上方向へ抜出し自在に一定間隔で並列立設する溝を
有する載置台と、中央部に不純物が拡散されていない不
純物未拡散層を有し両面に不純物が拡散された不純物拡
散層を有する半導体ウェハを上方向へ抜出し自在に当板
と同一間隔で並列する溝を有するウェハ収納部とからな
り、載置台、ウェハ収納部の一方または双方には載置台
上の定位置にウェハ収納部を組付ける規制部を設け、ウ
ェハ収納部の溝の下部には半導体ウェハと載置台に並列
立設された当板との当触を許容する開放部を設けてなる
手段を採用する。[Industrial Field of Application] The present invention relates to a method and apparatus for fixing a semiconductor wafer to a backing plate. More specifically, when manufacturing a substrate for a discrete element from a semiconductor wafer made of a disc-shaped silicon (SL) single crystal used as a discrete element (individual element) such as a transistor or a diode, the semiconductor wafer is It relates to a method and apparatus for fixing a contact plate to the periphery of a semiconductor wafer in the step of dividing and cutting. [Prior Art 1] Conventionally, the present applicant has proposed a technique in which impurities are formed in the center of a silicon single crystal for the purpose of reducing wear and tear of a silicon single crystal. A semiconductor wafer having an undiffused impurity layer and an impurity diffusion layer with impurities diffused on both sides is cut from approximately the center of the thickness, and each cut surface of each semiconductor wafer is treated with new impurities. We have previously proposed a method for manufacturing a substrate for discrete elements that uses an undiffused layer of impurities for diffusion (Japanese Patent Application No. 1265/1986).
No. 91〉. Furthermore, regarding the cutting of semiconductor wafers in the above-mentioned manufacturing method, etc., we have previously proposed a technique in which a plate is fixed to the periphery of the semiconductor wafer for the purpose of ensuring efficiency of the work and preventing damage to the cut edges. There is (Tokuganhei @)
. Conventionally, in the above-mentioned previous proposal of the present applicant, as a means for fixing the plate to the periphery of the semiconductor wafer, for example, the plate was fixed one by one to the upper part of the periphery of the semiconductor wafers arranged in parallel with the wafer carrier using an adhesive. Things are being done. [Problems to be Solved by the Invention] In the conventional means for fixing the contact plate to the peripheral edge of the semiconductor wafer, as shown in FIG. The adhesive C may tilt, resulting in insufficient adhesion strength or errors in dimensional accuracy, or as shown in Figure 8, the adhesive C may flow down to the semiconductor wafer W side, causing contamination, resulting in a poor finish of the adhesion work. There is a problem that. The present invention has been made to solve these problems, and its purpose is to provide a method for bonding a semiconductor wafer to a plate with a good finish in the bonding process, and a device suitable for carrying out this method. It's about doing. [Means for Solving the Problems] In order to achieve the above-mentioned object, the method for fixing a semiconductor wafer to a contact plate according to the present invention includes erecting contact plates in parallel at regular intervals and applying an adhesive to the upper part of the contact plates. Or a semiconductor wafer that has an impurity undiffused layer in the center with no impurities diffused and an impurity diffused layer in which impurities are diffused on both sides, after the top plates coated with adhesive are erected in parallel at regular intervals. are lowered onto the contact plate in parallel at the same distance as the contact plate, and the lower peripheral edge of the semiconductor is pressed and fixed to the contact plate by the weight of the semiconductor wafer. Further, the device for fixing a semiconductor wafer to a contact plate according to the present invention includes a mounting table having grooves arranged in parallel at regular intervals so that the contact plate can be freely pulled out upwardly, and an impurity-undiffused central portion in which no impurities are diffused. It consists of a wafer storage section having grooves arranged in parallel at the same interval as a mounting plate, and a mounting table and a wafer storage section that allow semiconductor wafers having impurity diffusion layers on both sides of which impurities are diffused to be freely pulled out upward. One or both of them are provided with a regulating part for assembling the wafer storage section at a fixed position on the mounting table, and the lower part of the groove of the wafer storage section is provided to prevent the semiconductor wafer from coming into contact with a contact plate installed in parallel with the mounting table. Adopt a means of providing an opening that allows this.
前述の手段によると、半導体ウェハの当板１２ｉＩ＠方
法では、半導体ウェハ、当板が一定の同一＠隔に並列規
制された状態で接着剤を介して当触し、半導体ウェハの
自重により圧接固着されることかから、半導体ウェハ、
当板が傾倒等することなく正確な姿勢で当触し固着され
ることになるため、傾倒等による固着強度不足や寸法精
度の誤差が生じることはなくなる。さらに、当板上に半
導体ウェハが配置されるため、接着剤が流出しても当板
側に流下り半導体ウェハを汚損することが防止される。
このため、固着工作の仕上りが良好な半導体ウェハの当
板固着方法を提供するという目的が達成される。
また、半導体ウェハの当板固着装置では、前述の作用に
おける半導体ウェハ、当板の並列規制を溝を有するウェ
ハ収納部、載置台で夫々行ない、また半導体ウェハ、当
板の当触をウェハ収納部、載置台の規１１１部による定
位置への組付けで行なっている。さらに、ウェハ収納部
の溝を半導体ウェハが上方向へ抜出し自在にし下部に開
放部を設けることで、半導体ウェハの自重で当板に圧接
するようにしである。このため、前述の方法を実施する
に好適な装置を提供するという目的が達成される。
［実施例］
以下、本発明に係る半導体ウェハの当板固着方法および
装置の実施例を第１図〜第４図に基いて説明する。
まず本発明に係る半導体ウェハの当板固着方法の実施例
について説明する。
この実施例では、第１図に示すように、まず当板Ｐ、半
導体ウつハＷを同一の一定間隔に並列規ありする。この
並列規制は、当板Ｐ、半導体ウつハＷの双方の移動、傾
倒、ズレ等を防止するものであり、半導体ウェハＷを上
側に当板Ｐを下側に配置する。なお、この当板Ｐは、カ
ーボン、シリコン等で形成されたものである。また、半
導体ウェハＷは、シリコン単結晶の円板形等からなり、
中央部に不純物が拡散されていない不耗物未拡散層を有
し両面に不純物が拡散された不純物拡敢層を有するもの
である。
次に、並列ＭＷＪされている当板Ｐの上面に接着剤Ｃを
塗布する。この接着剤Ｃは、前述した当板Ｐ、半導体ウ
つハＷの材質から、エポキシ系樹脂。
ポリエステル系樹脂、ポリウレタン系樹脂、ポリイミド
系樹脂、ポリアミド系樹脂等の熱硬化性樹脂接着剤の外
、ゴム系統接着剤も使用することができる。なお、この
接着剤Ｃの塗布は、当板Ｐの並列ＭｌｉＩｌの前に行な
うことも可能である。
雨後、第２図に示すように、当板Ｐの上に半導体ウェハ
Ｗを降下させて、当板Ｐの上面と半導体ウェハＷの周縁
下部とを接着剤Ｃを介して当触させ、半導体ウェハＷの
自重により当板Ｐに圧接固着する。なお、半導体ウェハ
ＷのオリフィラＷ′を下方にして、オリフィラＷ′に当
板Ｐを固着することも可能である。
このような実施例によると、半導体ウェハＷ。
当板Ｐが並列規ｔｉ１１された状態で接着剤Ｃを介して
当触するため、半導体ウェハＷ、当板Ｐが移動。
傾倒、ズレ等することなく正確な姿勢で当触し固着され
ることになる。この結果、固着工作の仕上りにおいては
、移動、傾倒、ズレ等による固着強度不足や寸法精度の
誤差が生じることはなくなる。
また、当板Ｐ上に半導体ウェハＷが配置されるため、接
着剤Ｃが過剰等のｉ因等で流出しても、当板Ｐ側に流下
り半導体ウェハＷを汚損することが防止される。なお、
第４図に示すように、半導体ウェハＷの厚み巾よりも当
板Ｐの厚み巾を厚くしておくと、接着剤Ｃの流出防止が
図られると共に多量の接着剤Ｃを留めて半導体ウェハＷ
、当板Ｐの固着強度を高め、当板Ｐの剥離を防ぐことが
できる。
又、半導体ウェハと当板の固着強度をさらに高めるため
には、第５図に示す如く、当板Ｐ′に溝（４０）を形成
しておき該１ｉ（４０）に半導体ウェハＷの周側縁を嵌
合うようにする。
この第５図の当板Ｐ′を用いることによってウェハＷと
当板Ｐ′の固着が強固となり、そのウェハＷを二分割技
術により分割した後も２枚のウェハは当板Ｐ′を介して
確実に３１！設されており、２枚の分割ウェハの同時回
収に有利であり、とくに大口径ウェハに好適である。
さらに当板の形状は第５図の如く溝付きとするまでもな
く、ウェハＷの周側縁−面のみ接合する切欠４１を形成
した当板Ｐ”とすることもよい（第６図）。
次に、本発明に係る半導体ウェハの当板固着方法の実施
例について説明する。
この実施例は、板状の載置台１と箱状のウェハ収納部２
とから構成されている。
載置台１は接着剤Ｃの影響を受けないような材質（例え
ば、四ふつ化エチレン樹脂）で形成されており、平板状
の基部１１の中央に上方へ向けて開放した満１２を一定
間隔で規則的に配列形威しである。この満１２は当板Ｐ
を前述のように並列規ｖ１するものであり、当板Ｐを差
込んで一定間隔に並列立設し、また当板Ｐを上方向へ抜
出すことができるような構造となっている。
ウェハ収納部２は載置台１と同様に接着剤Ｃの影響を受
けないような材′Ｒ（例えば、テフロン）で形成されて
おり、上部を開放したケース休２１の相対する２面に１
１２２を載置台１の溝１２と同一の−定間隔で規則的に
配列形成しである。このＷ４２２は半導体ウェハＷを前
述のように並列規制するものであり、半導体ウェハＷを
差−込んで一定間隔に並列し、また半導体ウェハＷを上
方向へ抜出すことができるような構造となっている。な
お、この満２２の下部には、載置台１の溝１２に並列立
設された当板Ｐが半導体ウェハＷと当触することができ
るような開放部２３が設けられている。なお、このウェ
ハ収納部２は必要に応じて運搬のための把手や識別管理
のための番号表示等を設けることができるものであり、
前述のようなＭＡ造から既存のウェハキャリアを利用す
ることも可能である。
このような載置台１とウェハ収納部２とは、載置台１の
周縁近くに設けられた凹溝３１と、ウェハ収納部２の下
面のこの凹溝３１に対応する付置、形状に設けられた突
起３２とからなる規制部３によって、定位置に組付けら
れるようになっている。このため、前述の半導体ウェハ
Ｗ、当板Ｐの当触が確実に行なわれることになる。なお
、この規制部３の構造は任意であり、適当な嵌合４に３
？［、係止構造等を採用することができる。
このような実施例によると、第１図に示すように、半導
体ウェハＷをウェハ収納部２の溝２２に入れ、当板Ｐを
載置台１の溝１２に入れてから（当板Ｐに接着剤Ｃを塗
布してから）、第２図に示すように、載置台１の上から
ウェハ収納部２を組付けることにより、半導体ウェハＷ
、当板Ｐを固着することができる。
この固着においては、ウェハ収納部２の％２２の構造か
ら、第３図に示すように、半導体ウェハＷが当板Ｐによ
って押上げられるように寸法設定しておくことにより、
当板Ｐに半導体ウェハＷの自重を掛けることができる。
また、接着剤Ｃの材質によっては、第２図の状態で加熱
槽等へ入れて接着剤Ｃの硬化を図ることもできる。さら
に、固着後は、ウェハ収納部２の溝２２の構造から、半
導体ウェハＷを抜出すとｖＡ着している当板Ｐをも一体
的に抜出すことができる。
尚、上記装置について説明した実施例においても、当板
Ｐ＆：代えて、第５図又は第６図に示した当板４Ｇ、
４１を使用することもよい。
［発明の効果］
以上のように本発明に係る半導体ウェハの当板固着方法
は、半導体ウェハ、当板が傾倒等することなく正確な姿
勢で当触し固着されるため、傾倒等による固着強度不足
や寸法精度の誤差が生じることがなくなり、また当板上
に半導体ウェハが配置されるため、接着剤が流出しても
当板側に流下り半導体ウェハを汚損することが防止され
る。このため、固着工作の仕上りが良好となる効果があ
る。また、この効果により、本出願人の先提案に係る半
導体ウェハの切断工作を精密かつ効率内折なうことがで
きる効果を生ずる。
さらに、本発明に係る半導体ウェハの当板固着装置は、
前述の効果に寄与することに加えて、半導体ウニへ、当
板が並列ＭＩｌｌされた載置台、ウェハ収納部の２部材
を組付けるだけで固着することができるため、固着工作
を容易に行なうことができると共に、その構造も簡素で
あり安価、容易に製造提供することができる効果がある
。
さらに請求項３項記載によればウェハと当板の固着強度
が高まり、ウェハを二分割技術により分割した後におい
て、その同時回収が容易となり、作業性を高め、装置構
造を簡素化し得る。According to the above-mentioned means, in the semiconductor wafer contact plate 12iI@ method, the semiconductor wafer and the contact plate are brought into contact with each other via an adhesive in a state where they are regulated in parallel at a certain constant interval, and the semiconductor wafer's own weight causes the pressure bonding and fixation. Semiconductor wafers,
Since the contact plate contacts and is fixed in an accurate posture without being tilted, insufficient fixing strength or errors in dimensional accuracy due to tilting or the like will not occur. Furthermore, since the semiconductor wafer is placed on the backing plate, even if the adhesive flows out, it is prevented from flowing down to the backing plate and staining the semiconductor wafer. Therefore, the object of providing a method for fixing a semiconductor wafer to a contact plate with a good finish in the fixing process is achieved. In addition, in the semiconductor wafer contact plate fixing device, the semiconductor wafer and the contact plate are controlled in parallel in the above-mentioned action using a wafer storage section having a groove and a mounting table, respectively, and the contact between the semiconductor wafer and the contact plate is controlled by the wafer storage section. This is done by assembling it into a fixed position using the guide 111 of the mounting table. Furthermore, the groove of the wafer storage section is such that the semiconductor wafer can be freely pulled out upward and an open section is provided at the bottom, so that the semiconductor wafer is pressed against the contact plate by its own weight. The object of providing a device suitable for carrying out the method described above is thus achieved. [Example] Hereinafter, an example of the method and apparatus for fixing a semiconductor wafer to a contact plate according to the present invention will be described with reference to FIGS. 1 to 4. First, an embodiment of the method for fixing a semiconductor wafer to a contact plate according to the present invention will be described. In this embodiment, as shown in FIG. 1, first, a contact plate P and a semiconductor substrate W are arranged in parallel at the same constant interval. This parallel regulation prevents movement, tilting, displacement, etc. of both the contact plate P and the semiconductor wafer W, and arranges the semiconductor wafer W on the upper side and the contact plate P on the lower side. Note that this contact plate P is made of carbon, silicon, or the like. Further, the semiconductor wafer W is made of a disc-shaped silicon single crystal, etc.
It has an undiffused undiffused layer in the center where impurities are not diffused, and an impurity diffusion layer in which impurities are diffused on both sides. Next, adhesive C is applied to the upper surface of the backing plate P that is subjected to parallel MWJ. This adhesive C is an epoxy resin based on the materials of the above-mentioned backing plate P and semiconductor backing W. In addition to thermosetting resin adhesives such as polyester resins, polyurethane resins, polyimide resins, and polyamide resins, rubber adhesives can also be used. Note that the application of the adhesive C can also be performed before the parallel MliIl of the contact plate P. After the rain, as shown in FIG. 2, the semiconductor wafer W is lowered onto the contact plate P, and the upper surface of the contact plate P and the lower peripheral edge of the semiconductor wafer W are brought into contact with each other via the adhesive C. W is pressed and fixed to the contact plate P by its own weight. Note that it is also possible to fix the contact plate P to the orifiller W' with the orifiller W' of the semiconductor wafer W facing downward. According to such an embodiment, a semiconductor wafer W. The semiconductor wafer W and the contact plate P move because they come into contact with each other via the adhesive C in a state where the contact plate P is arranged in parallel. It will contact and be fixed in an accurate posture without tilting or shifting. As a result, in the finishing of the fixing work, there will be no insufficient fixing strength or errors in dimensional accuracy due to movement, tilting, misalignment, etc. In addition, since the semiconductor wafer W is placed on the contact plate P, even if the adhesive C leaks due to reasons such as excess, it is prevented from flowing down to the contact plate P side and contaminating the semiconductor wafer W. . In addition,
As shown in FIG. 4, if the thickness of the contact plate P is made thicker than the thickness of the semiconductor wafer W, it is possible to prevent the adhesive C from flowing out and to hold a large amount of the adhesive C to the semiconductor wafer W.
, the adhesion strength of the backing plate P can be increased and peeling of the backing plate P can be prevented. In addition, in order to further increase the adhesion strength between the semiconductor wafer and the contact plate, as shown in FIG. Make sure the edges fit together. By using the contact plate P' shown in FIG. 5, the adhesion between the wafer W and the contact plate P' becomes strong, and even after the wafer W is divided by the two-splitting technique, the two wafers are still connected through the contact plate P'. Definitely 31! It is advantageous to collect two divided wafers at the same time, and is particularly suitable for large-diameter wafers. Further, the shape of the contact plate need not be grooved as shown in FIG. 5, but may be a contact plate P" having a notch 41 for joining only the peripheral edge and surface of the wafer W (FIG. 6). Next, an embodiment of the method of fixing a semiconductor wafer to a plate according to the present invention will be described.
It is composed of. The mounting table 1 is made of a material that is not affected by the adhesive C (for example, tetrafluoroethylene resin). It is a regular array shape. This full 12 is our board P
As mentioned above, the plates are arranged in parallel v1, and the structure is such that the plates P can be inserted and arranged in parallel at regular intervals, and the plates P can be pulled out upward. Like the mounting table 1, the wafer storage section 2 is made of a material R (for example, Teflon) that is not affected by the adhesive C.
122 are regularly arranged and formed at the same regular intervals as the grooves 12 of the mounting table 1. This W422 is for regulating the semiconductor wafers W in parallel as described above, and has a structure that allows the semiconductor wafers W to be inserted and arranged in parallel at regular intervals, and the semiconductor wafers W can be taken out upward. ing. Note that an open portion 23 is provided at the lower part of the wafer 22 so that the contact plate P, which is erected in parallel with the groove 12 of the mounting table 1, can come into contact with the semiconductor wafer W. Note that this wafer storage section 2 can be provided with a handle for transportation, a number display for identification management, etc., as necessary.
It is also possible to use an existing wafer carrier from MA construction as described above. The mounting table 1 and the wafer storage section 2 have a groove 31 provided near the periphery of the mounting table 1, and a groove 31 formed on the lower surface of the wafer storage section 2 in a shape corresponding to the groove 31. The regulating portion 3 consisting of a protrusion 32 allows it to be assembled in a fixed position. Therefore, the contact between the semiconductor wafer W and the contact plate P described above is ensured. Note that the structure of this regulating part 3 is arbitrary, and the structure of this regulating part 3 is arbitrary.
? [, a locking structure, etc. can be adopted. According to such an embodiment, as shown in FIG. After applying agent C), as shown in FIG.
, the backing plate P can be fixed. In this fixing, from the structure of the wafer storage part 2, the dimensions are set so that the semiconductor wafer W is pushed up by the contact plate P, as shown in FIG.
The weight of the semiconductor wafer W can be applied to the contact plate P. Further, depending on the material of the adhesive C, the adhesive C can be cured by putting it in a heating tank or the like in the state shown in FIG. Further, after being fixed, when the semiconductor wafer W is removed from the structure of the groove 22 of the wafer storage portion 2, the contact plate P to which vA is attached can also be removed integrally. In addition, also in the embodiment described for the above-mentioned device, the backing plate 4G shown in FIG. 5 or 6 is used instead of the backing plate P&:
41 may also be used. [Effects of the Invention] As described above, in the method for fixing a semiconductor wafer to a contact plate according to the present invention, the semiconductor wafer and the contact plate are brought into contact and fixed in an accurate posture without being tilted, so that the fixing strength due to tilting, etc. There is no shortage or error in dimensional accuracy, and since the semiconductor wafer is placed on the contact plate, even if the adhesive flows out, it is prevented from flowing down to the contact plate and staining the semiconductor wafer. This has the effect of improving the finish of the fixing work. Moreover, this effect brings about the effect that the semiconductor wafer cutting operation according to the applicant's previous proposal can be carried out precisely and efficiently. Furthermore, the device for fixing a semiconductor wafer to a plate according to the present invention includes:
In addition to contributing to the above-mentioned effects, the fixing work can be easily performed because it can be fixed by simply assembling two parts, the mounting table on which the plate is parallel-MIlled, and the wafer storage part, to the semiconductor urchin. In addition, the structure is simple, inexpensive, and easy to manufacture and provide. Furthermore, according to the third aspect of the present invention, the adhesion strength between the wafer and the contact plate is increased, and after the wafer is divided by the two-part technique, it is easy to simultaneously recover the wafer, which improves work efficiency and simplifies the device structure.
第１図は本発明に係る半導体ウェハの当板固着方法およ
び装置の実施例を示す正面断面図、第２図は第１図の組
付は状態を示す一部切断の正面図、第３図は第２図のｘ
−ｘｍｉ面ｓ、第４図は第２図の要部拡大図、第５図、
第６図は当板の変形例を示す断面図、第７図、第８図は
従来例の問題点を示す正面図である。
１・・・載置台 １２・・・溝２・・・
ウェハ収納部 ２２・・・溝３・−Ｍ割部
４０・・・溝Ｃ・・・接着剤
４１・・・切欠Ｐ、Ｐ’ 、Ｐ”・・・当板
Ｗ・・・半導体ウエハ
第１図
第３図FIG. 1 is a front sectional view showing an embodiment of the method and apparatus for fixing a semiconductor wafer to a contact plate according to the present invention, FIG. 2 is a partially cutaway front view showing the assembled state of FIG. 1, and FIG. is x in Figure 2
-xmi plane s, Figure 4 is an enlarged view of the main part of Figure 2, Figure 5,
FIG. 6 is a sectional view showing a modified example of the backing plate, and FIGS. 7 and 8 are front views showing problems in the conventional example. 1... Placement stand 12... Groove 2...
Wafer storage section 22...Groove 3/-M division section
40...Groove C...Adhesive
41... Notches P, P', P''... Contact plate W... Semiconductor wafer Fig. 1 Fig. 3
Claims (3)
を塗布し、または上部に接着剤を塗布した当板を一定間
隔で並列立設した後に、中央部に不純物が拡散されてい
ない不純物未拡散層を有し両面に不純物が拡散された不
純物拡散層を有する半導体ウェハを当板と同一間隔で並
列して当板上に降下させ、半導体ウェハの自重により半
導体ウェハの周縁下部を当板に圧接固着する半導体ウェ
ハの当板固着方法。(1) After placing the plates in parallel at regular intervals and applying adhesive to the top, or by standing the plates with adhesive applied on the top in parallel at regular intervals, impurities are diffused into the center. A semiconductor wafer having an impurity-undiffused layer with no impurities diffused on both sides and an impurity-diffused layer with impurities diffused on both sides is lowered onto the contact plate in parallel with the contact plate, and the semiconductor wafer's own weight causes the lower peripheral edge of the semiconductor wafer to be lowered. A method for fixing a semiconductor wafer to a backing plate by pressure bonding it to the backing plate.
する溝を有する載置台と、中央部に不純物が拡散されて
いない不純物未拡散層を有し両面に不純物が拡散された
不純物拡散層を有する半導体ウェハを上方向へ抜出し自
在に当板と同一間隔で並列する溝を有するウェハ収納部
とからなり、載置台、ウェハ収納部の一方または双方に
は載置台上の定位置にウェハ収納部を組付ける規制部を
設け、ウェハ収納部の溝の下部には半導体ウェハと載置
台に並列立設された当板との当触を許容する開放部を設
けてなる半導体ウェハの当板固着装置。(2) A mounting table with grooves arranged in parallel at regular intervals so that the plate can be freely pulled out upwards, an impurity undiffused layer in the center, and impurities diffused on both sides. It consists of a wafer accommodating part having grooves parallel to each other at the same spacing as a contact plate so that a semiconductor wafer having a diffusion layer can be freely pulled out upwardly. A semiconductor wafer mounting plate is provided with a regulating part for assembling the wafer storage part, and an open part at the bottom of the groove of the wafer storage part to allow contact between the semiconductor wafer and a contact plate installed in parallel on the mounting table. Board fixing device.
しめる切欠形状又は溝付形状である請求項２項記載の当
板固着装置。(3) The plate fixing device according to claim 2, wherein the plate has a cutout shape or a grooved shape that fixes the semiconductor wafer including its peripheral edge.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16921289A JPH0334542A (en) | 1989-06-30 | 1989-06-30 | Method and apparatus for fixation of semiconductor wafer to backplate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16921289A JPH0334542A (en) | 1989-06-30 | 1989-06-30 | Method and apparatus for fixation of semiconductor wafer to backplate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0334542A true JPH0334542A (en) | 1991-02-14 |
| JPH0583174B2 JPH0583174B2 (en) | 1993-11-25 |
Family
ID=15882284
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16921289A Granted JPH0334542A (en) | 1989-06-30 | 1989-06-30 | Method and apparatus for fixation of semiconductor wafer to backplate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0334542A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10323779B2 (en) | 2013-11-20 | 2019-06-18 | Toki Engineering Co., Ltd. | Pipe coupling structure |
-
1989
- 1989-06-30 JP JP16921289A patent/JPH0334542A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10323779B2 (en) | 2013-11-20 | 2019-06-18 | Toki Engineering Co., Ltd. | Pipe coupling structure |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0583174B2 (en) | 1993-11-25 |
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