JPH0334321A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To perfectly flatten the step difference made by metal wirings by a method wherein a lower layer metal wirings are formed on the first insulating film on a semiconductor substrate; the second insulating film and a polyimide film are formed on the whole surface and then anisotropically etched away to flatten the surface; finally an upper wirings connecting to lower metal wirings through an opening part is formed. CONSTITUTION:An insulating film 2 is provided on a semiconductor substrate 1 and then the first layer Al wirings 30.8mum thick are provided on the insulating film 2. A lower layer plasma oxide film 4 1.0mum thick is formed. Next, the whole surface is coated with a polyimide film 5 so as to be flattened. Next, the whole surface is anisotropically etched away by reactive etching process meeting the requirement of selection ratio between the plasma oxide film 4 and the polyimide films of 1:1. Finally, an upper layer plasma oxide film 60.8mum thick is formed and then an opening part reaching the first layer Al wirings 3 is made by ordinary photolithography to form the second layer Al wiring 7.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a semiconductor device.

[Conventional technology]

FIG. 2 is a cross-sectional view of an example of a conventional semiconductor device.

An insulation M2 is provided on the semiconductor substrate 1, a first layer A1 wiring 3 is provided on it, a silica film layer 8 is formed to cover the lower plasma oxide film 4 to make the stepped portion smooth, and then An upper plasma oxide film 6 is provided, and an opening reaching the first layer A (wiring 3) is formed to form a second layer A1 wiring 7.

In such a conventional method, the level difference due to the first layer A control line 3 is not sufficiently flattened.

Note that a plasma nitride film or a plasma oxynitride film may be used as the lower and upper insulating films.

[Problem to be solved by the invention]

In the conventional technology mentioned above, silica film is used as a coating film for flattening, but if silica film is applied thickly in one application, cracks will occur during baking, so a film that can be applied without cracking is required. Thickness is 0,
The limit is about 1 μm. Therefore, the thickness is 0.8 to 1 μm.
The disadvantage is that the level difference caused by the metal wiring cannot be made sufficiently flat. In order to compensate for this drawback, there is a method of applying silica film in two parts, but even this method cannot sufficiently flatten the level difference. There is a disadvantage that repeating coating and baking until the surface becomes flat requires a large number of man-hours.

[Means to solve the problem]

The method for manufacturing a semiconductor device of the present invention includes a first
a step of forming a lower metal wiring on the insulating crotch, a step of forming a second insulating film on the entire surface including the lower metal layer, and a step of forming a polyimide film with a thickness such that the surface becomes flat; a step of flattening the surface by anisotropic etching until the polyimide film is removed; a step of forming a third insulating film on the entire surface; a step of providing an opening reaching the lower metal wiring; The method includes a step of forming an upper layer metal wiring connected to a lower layer metal wiring.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIGS. 1(a) to 1(d) are cross-sectional views shown in the order of steps for explaining one embodiment of the present invention.

First, as shown in FIG. 1(a), an insulator 11g2 is provided on a semiconductor substrate 1, and a first layer A, & wiring 3 having a thickness of 08 μm is provided thereon. Plasma oxide film as lower layer film
A 13a is formed to a thickness of 1.071rn.

Next, as shown in FIG. 1(b), a polyimide film 5 is applied to flatten the surface.

Next, as shown in FIG. 1(c), the entire surface is anisotropically etched by reactive ion etching under conditions such that the selectivity ratio between the plasma oxide film and the polyimide film is 1:1.

Next, as shown in FIG. 1(d), an upper plasma oxide film is formed to a thickness of 0.8 μm, and an opening reaching the first layer Au wiring 3 is formed using ordinary photolithography technology. , the second layer A1 wiring 7 is formed.

Note that a plasma nitride film or a plasma oxynitride film may be used as the lower and upper insulating films instead of the plasma oxide film.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to obtain the effect that the level difference caused by the metal wiring can be completely flattened by eliminating the difference in level by a simple method and a small number of man-hours.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing an example of the present invention in the order of steps, and FIG. 2 is a sectional view of an example of a conventional semiconductor device. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Insulating film, 3... 1st layer A (wiring, 4... Plasma oxide film, 5... Polyimide film, 6... Plasma oxide film, 7... ...Second layer AI!
Wiring, 8...silica film layer.

Claims (1)

[Claims] A step of forming a lower metal wiring on a first insulating film on a semiconductor substrate, forming a second insulating film on the entire surface including the lower metal layer, and forming a polyimide film with a thickness such that the surface becomes flat. a step of flattening the surface by anisotropic etching until the polyimide film is removed; a step of forming a third insulating film on the entire surface; and a step of providing an opening reaching the lower metal wiring. A method for manufacturing a semiconductor device, comprising the steps of: forming an upper layer metal interconnect that connects to the lower layer metal interconnect through the opening.