JPH033427B2 - - Google Patents
Info
- Publication number
- JPH033427B2 JPH033427B2 JP58224640A JP22464083A JPH033427B2 JP H033427 B2 JPH033427 B2 JP H033427B2 JP 58224640 A JP58224640 A JP 58224640A JP 22464083 A JP22464083 A JP 22464083A JP H033427 B2 JPH033427 B2 JP H033427B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- alarm
- circuit
- frame synchronization
- alarm signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 claims description 8
- 238000001514 detection method Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/14—Monitoring arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
- Small-Scale Networks (AREA)
- Maintenance And Management Of Digital Transmission (AREA)
Description
【発明の詳細な説明】
(a)発明の技術分野
本発明はフレーム同期信号を有するデータを受
信する受信回路で検出された障害の警報信号を同
一局内の他部に転送する警報信号転送方式に係
り、特に複数種類の障害毎の警報信号を同一局内
の他部に転送する場合、少ない信号線で複雑なタ
イミング系回路を必要としない警報信号転送方式
に関する。Detailed Description of the Invention (a) Technical Field of the Invention The present invention relates to an alarm signal transfer method for transferring an alarm signal of a failure detected in a receiving circuit that receives data having a frame synchronization signal to other parts within the same station. In particular, the present invention relates to an alarm signal transfer method that uses fewer signal lines and does not require complicated timing circuits, particularly when transferring alarm signals for each of a plurality of types of faults to other parts within the same station.
(b) 従来技術と問題点
従来、受信回路で検出された複数種類の障害毎
の警報信号を他パネルに転送する場合、検出され
た個々の障害の警報信号に対して各１本づつの信
号線を用いて他パネルに転送する方式及び、検出
された個々の障害の警報信号を決められたタイミ
ングで多重化して転送する方式があつたが、検出
する障害の種類が増加すれば、前者は信号線が増
加する欠点があり、後者はタイミング系回路が複
雑になり増大する欠点がある。(b) Prior art and problems Conventionally, when transmitting alarm signals for each of multiple types of faults detected by a receiving circuit to another panel, one signal was sent for each alarm signal for each detected fault. There are methods to transmit alarm signals to other panels using cables, and methods to multiplex and transmit alarm signals of individual detected faults at a predetermined timing.However, as the types of faults to be detected increase, This method has the disadvantage of increasing the number of signal lines, and the latter has the disadvantage of complicating and increasing the timing circuitry.
(c) 発明の目的
本発明の目的は上記の欠点に鑑み、検出する障
害の種類が増加しても、少ない信号線で、複雑な
タイミング系回路を必要としないで、警報信号を
転送出来る警報信号転送方式の提供にある。(c) Object of the Invention In view of the above-mentioned drawbacks, the object of the present invention is to provide an alarm that can transmit alarm signals with fewer signal lines and without the need for complex timing circuits, even if the types of faults to be detected increase. The goal is to provide a signal transfer method.
(d) 発明の構成
本発明は上記の目的を達成するために、警報信
号をフレーム同期をとつた後のデータのフレーム
同期信号位置に挿入して転送するようにしたこと
を特徴とする。(d) Structure of the Invention In order to achieve the above object, the present invention is characterized in that an alarm signal is inserted into the frame synchronization signal position of data after frame synchronization and then transferred.
(e) 発明の実施例
以下本発明の一実施例につき図に従つて説明す
る。(e) Embodiment of the invention An embodiment of the invention will be described below with reference to the drawings.
第１図は本発明の実施例の警報信号転送方式の
ブロツク図、第２図Ａ，Ｂ，Ｃは夫々第１図ａ，
ｂ，ｃ点の信号構成を示す図である。 FIG. 1 is a block diagram of an alarm signal transfer system according to an embodiment of the present invention, and FIGS. 2A, B, and C are respectively shown in FIGS.
It is a figure which shows the signal structure of b and c points.
第１図中１−１はフレーム同期回路，１−２〜
１−ｎは障害検出警報送出回路、３，７はカウン
タ、４は多重化回路、５は禁止回路、６はオア回
路、２−１〜２−ｎは警報送出回路を示し、１点
鎖線より左が受信回路、右が他部を示す。又、第
２図中８−１〜８−５はフレーム同期信号領域、
９−１〜９−５はデータ領域、１０−１〜１０−
５は警報信号を示す。 In Figure 1, 1-1 is a frame synchronization circuit, 1-2~
1-n is a failure detection alarm sending circuit, 3 and 7 are counters, 4 is a multiplexing circuit, 5 is a prohibition circuit, 6 is an OR circuit, 2-1 to 2-n are alarm sending circuits, and from the dashed line The left side shows the receiving circuit, and the right side shows other parts. In addition, 8-1 to 8-5 in FIG. 2 are frame synchronization signal areas,
9-1 to 9-5 are data areas, 10-1 to 10-
5 indicates an alarm signal.
第１図の動作を以下説明する。第２図Ａに示す
如きフレーム同期信号を有するデータが受信回路
に入力すると、フレーム同期回路１−１にてフレ
ーム同期をとりデータを受信する。この時のフレ
ームパルスでカウンタ３及び７を動作さす。 The operation of FIG. 1 will be explained below. When data having a frame synchronization signal as shown in FIG. 2A is input to the receiving circuit, the frame synchronization circuit 1-1 performs frame synchronization and receives the data. Counters 3 and 7 are operated by the frame pulse at this time.
フレーム同期回路１−１では同期はずれが生じ
た時警報信号１０−１を送出するし又障害検出警
報送出回路１−２〜１−ｎでは各々ビツトエラ
ー、アラームインデイケーシヨンシグナル等の障
害を一種類づつ検出して警報信号１０−２〜１０
−ｎを送出する。これ等の警報信号１０−１〜１
０−ｎはカウンタ３の出力に同期して多重化回路
４にて多重化され、第２図Ｂに示す如くフレーム
同期信号領域に該当する位置に警報信号１０−１
〜１０−ｎを配置しオア回路６に入力する。一方
禁止回路５では、第２図に示す入力データのフレ
ーム同期信号領域８−１〜８−５の位置をカウン
タ３の出力により、出力禁止しオア回路６に入力
する。これ等の２つの入力によりオア回路６の出
力は、第２図Ｃに示す如く、Ａのフレーム同期信
号領域８−１〜８−５に夫々警報信号１０−１〜
１０−５が挿入された信号となり同一局内の他部
に送出される。同一局内の他部を警報送出回路２
−１〜２−ｎでは送られてきた第２図Ｃに示す信
号より、カウンタ７の出力により、夫々対応した
警報信号を抽出して警報信号を抽を発する。この
ようにすれば受信回路と他部との信号線は２本で
よく又複雑なタイミング系回路も必要がなくな
る。 The frame synchronization circuit 1-1 sends an alarm signal 10-1 when synchronization occurs, and the fault detection alarm sending circuits 1-2 to 1-n each detect one type of fault such as a bit error or an alarm indication signal. Detects alarm signals 10-2 to 10
-send n. These alarm signals 10-1~1
0-n are multiplexed by a multiplexing circuit 4 in synchronization with the output of the counter 3, and an alarm signal 10-1 is placed at a position corresponding to the frame synchronization signal area as shown in FIG. 2B.
10-n are arranged and input to the OR circuit 6. On the other hand, the prohibition circuit 5 prohibits output of the positions of the frame synchronization signal areas 8-1 to 8-5 of the input data shown in FIG. With these two inputs, the output of the OR circuit 6 is sent to the frame synchronization signal areas 8-1 to 8-5 of A, respectively, as alarm signals 10-1 to 10-5, as shown in FIG. 2C.
10-5 is inserted, and the signal is sent to other parts within the same station. Alarm sending circuit 2 for other parts in the same station
-1 to 2-n, the corresponding alarm signals are extracted from the sent signals shown in FIG. 2C by the output of the counter 7, and the alarm signals are output. In this way, only two signal lines are required between the receiving circuit and other parts, and there is no need for a complicated timing system circuit.
(f) 発明の効果
以上詳細に説明せる如く本発明によれば、検出
する障害の種類が増加しても少ない信号線で複雑
なタイミング系回路を必要とせず警報信号を転送
出来るので信号線の軽減及び回路の簡素化が出来
る効果がある。(f) Effects of the Invention As explained in detail above, according to the present invention, even if the types of faults to be detected increase, alarm signals can be transferred with fewer signal lines without the need for complex timing circuits, so the number of signal lines can be reduced. This has the effect of reducing noise and simplifying the circuit.
第１図は本発明の実施例の警報信号転送方式の
ブロツク図、第２図は第１図の各部の信号構成図
である。
図中１−１はフレーム同期回路、１−２〜１−
ｎは障害検出警報送出回路、３，７はカウンタ、
４は多重化回路、５は禁止回路、６はオア回路、
２−１〜２−ｎは警報送出回路、８−１〜８−５
はフレーム同期信号領域、９−１〜９−５はデー
タ領域、１０−１〜１０−５は警報信号を示す。
FIG. 1 is a block diagram of an alarm signal transfer system according to an embodiment of the present invention, and FIG. 2 is a signal configuration diagram of each part of FIG. In the figure, 1-1 is a frame synchronization circuit, 1-2 to 1-
n is a fault detection alarm sending circuit, 3 and 7 are counters,
4 is a multiplexing circuit, 5 is a prohibition circuit, 6 is an OR circuit,
2-1 to 2-n are alarm sending circuits, 8-1 to 8-5
indicates a frame synchronization signal area, 9-1 to 9-5 indicate a data area, and 10-1 to 10-5 indicate an alarm signal.
Claims (1)
受信回路で検出された障害の警報信号を、同一局
内の他部に転送する警報信号転送方式において、 フレーム同期信号を検出し、フレーム同期をと
るとともにフレームパルスを出力するフレーム同
期回路１−１と、 障害情報を検出し、該障害の警報信号を送出す
る障害検出警報送出回路１−２〜１−ｎと、 該フレームパルスにより動作する第一のカウン
タ３及び第二のカウンタ７と、 該第一のカウンタ３の出力により入力データの
フレーム同期信号領域を出力禁止とする禁止回路
５と、 該入力データのフレーム同期信号領域に警報信
号を挿入するオア回路６と、 該第二のカウンタ７の出力により、警報信号を
抽出し、警報信号を発する警報送出回路２−１〜
２−ｎを備え、 該入力されたフレーム同期信号を有するデータ
は、同期確立後に該禁止回路５にて出力を禁止さ
れたフレーム同期信号領域に該障害の警報信号を
挿入して転送され、該第二のカウンタ７の出力に
より、同一局内における他部にて警報信号を抽出
し、警報信号を発することを特徴とする警報信号
転送方式。[Claims] 1. In an alarm signal transfer method in which a failure alarm signal detected by a receiving circuit that receives data having a frame synchronization signal is transferred to another part within the same station, the frame synchronization signal is detected and the frame synchronization signal is detected. A frame synchronization circuit 1-1 that synchronizes and outputs a frame pulse, a fault detection alarm sending circuit 1-2 to 1-n that detects fault information and sends out an alarm signal for the fault, and operates based on the frame pulse. a first counter 3 and a second counter 7; a prohibition circuit 5 that prohibits output of the frame synchronization signal area of the input data based on the output of the first counter 3; and an alarm circuit 5 that prohibits output of the frame synchronization signal area of the input data. An OR circuit 6 for inserting a signal, and alarm sending circuits 2-1 to 2-1 for extracting an alarm signal from the output of the second counter 7 and emitting the alarm signal.
2-n, the data having the input frame synchronization signal is transferred by inserting the failure alarm signal into the frame synchronization signal area whose output is prohibited by the prohibition circuit 5 after synchronization is established, and An alarm signal transfer method characterized in that an alarm signal is extracted in another part within the same station based on the output of the second counter 7, and the alarm signal is issued.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58224640A JPS60117837A (en) | 1983-11-29 | 1983-11-29 | Alarm signal transfer system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58224640A JPS60117837A (en) | 1983-11-29 | 1983-11-29 | Alarm signal transfer system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60117837A JPS60117837A (en) | 1985-06-25 |
| JPH033427B2 true JPH033427B2 (en) | 1991-01-18 |
Family
ID=16816878
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58224640A Granted JPS60117837A (en) | 1983-11-29 | 1983-11-29 | Alarm signal transfer system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60117837A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008115414A (en) * | 2006-11-01 | 2008-05-22 | Fuji Oozx Inc | Continuous heat-treatment apparatus for press-formed product |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5132216A (en) * | 1974-09-13 | 1976-03-18 | Nippon Electric Co | Taju pcm sochinokanshihoshiki |
| JPS57115046A (en) * | 1974-09-11 | 1982-07-17 | Siemens Ag | Information transmission system |
-
1983
- 1983-11-29 JP JP58224640A patent/JPS60117837A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57115046A (en) * | 1974-09-11 | 1982-07-17 | Siemens Ag | Information transmission system |
| JPS5132216A (en) * | 1974-09-13 | 1976-03-18 | Nippon Electric Co | Taju pcm sochinokanshihoshiki |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60117837A (en) | 1985-06-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20050254491A1 (en) | System for and method of providing a header and a trailer in data packets | |
| EP0214333B1 (en) | Channel monitoring circuit for use in a repeater station of a radio digital transmission system | |
| JPH033427B2 (en) | ||
| US5450440A (en) | Monitor system for digital communication apparatus | |
| JPH0793614B2 (en) | Series controller | |
| JP2655597B2 (en) | Loopback identification method for digital circuits | |
| JPH0372736A (en) | Frame synchronizing system | |
| GB2299918A (en) | Serial link for synchronous and asynchronous transmission | |
| JP2500609B2 (en) | Cable misconnection monitoring method | |
| JP2789634B2 (en) | Alarm detection method for loop type data transmission equipment | |
| JP2825049B2 (en) | High-efficiency line diagnosis method | |
| JPS5813956B2 (en) | Data collection and transmission equipment | |
| JPS61131632A (en) | Data format system for multiplex transmission | |
| JPS59161144A (en) | Frame synchronizing circuit | |
| JPH0719213B2 (en) | Online test method for disperser | |
| JPS62160833A (en) | Fault detection circuit for subsequent synchronization type transmission equipment | |
| JPH0728271B2 (en) | Burst monitoring method | |
| JPS61296833A (en) | Time division bus communication system | |
| JPH0349438A (en) | Common bus monitoring and processing system | |
| JPH0653975A (en) | Address control system in loop network | |
| JPH0244445U (en) | ||
| JPS63146532A (en) | Supervisory equipment for error of transmission line | |
| JPH07107997B2 (en) | Dataway fault location detection method | |
| JPS56122540A (en) | System switching method | |
| JPH02146835A (en) | Multiplexing circuit |