JPH033356A - Hybrid integrated circuit - Google Patents

Hybrid integrated circuit

Info

Publication number
JPH033356A
JPH033356A JP13861489A JP13861489A JPH033356A JP H033356 A JPH033356 A JP H033356A JP 13861489 A JP13861489 A JP 13861489A JP 13861489 A JP13861489 A JP 13861489A JP H033356 A JPH033356 A JP H033356A
Authority
JP
Japan
Prior art keywords
integrated circuit
voltage
power semiconductor
current
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13861489A
Other languages
Japanese (ja)
Other versions
JP2680684B2 (en
Inventor
Katsumi Okawa
克実 大川
Hisashi Shimizu
清水 永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP13861489A priority Critical patent/JP2680684B2/en
Publication of JPH033356A publication Critical patent/JPH033356A/en
Application granted granted Critical
Publication of JP2680684B2 publication Critical patent/JP2680684B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

PURPOSE:To obtain a safe device capable of stably detecting a large current independently of temperature change by providing a conducting path, the main circuit of a power inverter, and a protecting circuit on an integrated circuit substrate composed of metal, and fusing a bonding wire of a power semiconductor element when an excessive current which can not be protected by the protecting circuit generates. CONSTITUTION:The following are provided; an integrated circuit substrate 7 composed of metal, a conducting path 9 of desired shape formed on the substrate 7, the main circuit 8a of a power inverter composed of a plurality of power semiconductor elements 8 which are connected with the conducting path 9 and controls a current supplied from a power supply to a load, and a protecting circuit 8b formed in order to prevent the destruction of power semiconductor elements caused by an excessive current or voltage by using a part of the conducting path 9 stretched in the vicinity of the power semiconductor elements 8 constituting the above main circuit 8a. When the excessive current or voltage which can not be protected by the protecting circuit 8b generates, a bonding wire 8c connecting the power semiconductor element 8 and the adjacent conducting path 9 is fused, thereby cutting off the current supplied from a power source.

Description

【発明の詳細な説明】 くイ)産業上の利用分野 本発明は混成集積回路に関し、特に低抵抗の抵抗体を用
いて過電流保護及び温度保護を行う保護回路を集積化し
た混成集積回路に関するものである。
[Detailed description of the invention] B) Industrial application field The present invention relates to a hybrid integrated circuit, and more particularly to a hybrid integrated circuit in which a protection circuit for overcurrent protection and temperature protection is integrated using a low-resistance resistor. It is something.

(ロ)従来の技術 従来、電流検出を行う手段の1つとしてブリッジ回路が
ある。電流検出用のブリッジ回路は第7図の如く、抵抗
R,(22)と、抵抗R*<Z3>と、電流検出用の抵
抗R6(21)と、抵抗R,(21)に直列に接続され
た抵抗R,(25)と、抵抗R,(24)と、抵抗R,
(22)及び抵抗R,(23)の接続点と抵抗R,(2
5)及び抵抗R4(24)の接続点に入力されたコンパ
レータ(26)とから構成されている。
(B) Prior Art Conventionally, a bridge circuit is one of the means for detecting current. As shown in Figure 7, the bridge circuit for current detection is connected in series with resistor R, (22), resistor R*<Z3>, resistor R6 (21) for current detection, and resistor R, (21). The resistor R, (25), the resistor R, (24), and the resistor R,
(22) and resistance R, (23) connection point and resistance R, (2
5) and a comparator (26) input to the connection point of the resistor R4 (24).

次に動作について簡単に説明すると、電流検出用の抵抗
R,(25)に被測定電流1.が流れているとする。こ
の被測定電流工。の最大値が抵抗R,(25)に流れた
場合、ブリッジ回路が平衡となる様に各抵抗R1(22
) 、 R,(23) 、 R,(24)を設定する。
Next, to briefly explain the operation, the resistor R for current detection (25) has a current of 1. Suppose that is flowing. This electrician to be measured. When the maximum value of flows through the resistor R, (25), each resistor R1 (22
) , R, (23) and R, (24) are set.

この様なブリッジ回路の抵抗R,(25)に電流1.の
最大値以下の電流が流れたとするとコンパレータク26
)から例えばrL」レベルの信号が出力され被測定電流
1.は流れつづけ、抵抗R,(21)に電流工。の最大
値の電流が流れたとするとコンパレータ(26)の入力
の電圧が逆転し「H」レベルの信号が出力され、電流1
゜が遮断され保護回路と成きれる。
In such a bridge circuit, the resistor R, (25) has a current of 1. If a current less than the maximum value of comparator 26
), for example, a signal of level "rL" is output from the current to be measured 1. continues to flow, and the current flows through the resistance R, (21). If the maximum current of
゜ is cut off and becomes a protection circuit.

この様なブリッジ回路は特開昭53−9747号公報に
記載されている。
Such a bridge circuit is described in Japanese Patent Laid-Open No. 53-9747.

またこの様なブリッジ回路の一部を用いて温度保護回路
は構成さ゛れている。
Also, a temperature protection circuit is constructed using a part of such a bridge circuit.

上述のブリッジ回路を厚膜ICに用いた場合、電流1.
を検出する抵抗R8の抵抗体にNiメツキが主として用
いられた。しかしながら、Niメツキは溶断電流が小さ
いので小さい電流の検出は行えるが大電流の検出を行う
際には溶断電流を大とするために抵抗体面積を大きくす
るか、あるいは厚みを厚くしなければならないので、基
板実装面積の縮小、メツキ処理時間が長くなるという問
題があり、例えば40Aという大電流を検出するのは略
不可能とされていた。
When the above-mentioned bridge circuit is used in a thick film IC, the current is 1.
Ni plating was mainly used for the resistor R8 that detects the . However, since Ni plating has a small fusing current, it is possible to detect small currents, but when detecting large currents, the area of the resistor must be increased or the resistor must be made thicker in order to increase the fusing current. Therefore, there are problems such as a reduction in the board mounting area and an increase in plating processing time, and it has been considered almost impossible to detect a large current of, for example, 40A.

斯上の問題を解消するために電流検出抵抗R8の抵抗体
に溶断電流の大きい銅箔あるいはAgペーストを用いる
ことにより解消することができる。
This problem can be solved by using copper foil or Ag paste, which has a large fusing current, as the resistor of the current detection resistor R8.

(ハ)発明が解決しようとする課題 溶断電流の大きいAgペーストあるいは銅箔を検出抵抗
として用いることで大電流を検出することは可能である
。しかしながら、銅箔及びAgペーストのTCR(抵抗
温度係数)が3800±200ppm及び2150±1
50p四と非常に高いので温度変化に対して電流検出が
正確に行えない問題点があった。
(c) Problems to be Solved by the Invention It is possible to detect large currents by using Ag paste or copper foil, which has a large fusing current, as a detection resistor. However, the TCR (temperature coefficient of resistance) of copper foil and Ag paste is 3800 ± 200 ppm and 2150 ± 1
Since the current was extremely high at 50 p4, there was a problem that current detection could not be performed accurately in response to temperature changes.

(ニ)課題を解決するための手段 本発明は上述した課題に鑑みて為されたものであり、金
属から成る集積回路基板と、前記基板上に形成された所
望形状の導電路と、前記導電路に接続され電源から負荷
へ供給される電流を制御する複数のパワー半導体素子か
ら成るパワーインバータの主回路と、前記主回路を構成
する前記パワー半導体素子の近傍に延在された前記導電
路の一部を用いて過電流あるいは過電圧により前記パワ
ー半導体素子の破壊を肪止するために形成された保護回
路とを備え、前記保護回路で保護できない過電流あるい
は過電圧が発生した際、前記パワー半導体素子と近傍の
前記導電路とを接続するボンディングワイヤを溶断させ
前記電源から供給される電流を遮断することを特徴とす
る。
(D) Means for Solving the Problems The present invention has been made in view of the above-mentioned problems, and includes an integrated circuit board made of metal, a conductive path of a desired shape formed on the board, and a conductive path formed on the board. a main circuit of a power inverter comprising a plurality of power semiconductor elements connected to a conductive path and controlling a current supplied from a power source to a load; and a conductive path extending near the power semiconductor elements constituting the main circuit. and a protection circuit formed to prevent destruction of the power semiconductor element due to overcurrent or overvoltage using a part of the power semiconductor element, and when an overcurrent or overvoltage that cannot be protected by the protection circuit occurs, the power semiconductor element The present invention is characterized in that the current supplied from the power source is cut off by melting a bonding wire connecting the conductive path and the conductive path in the vicinity.

(*)作用 この様に本発明に依れば、低抵抗の@箔より形成された
導電路の一部分を検出抵抗とした保護回路を形成するこ
とにより、パワーインバータの主回路に大電流が流れ検
出抵抗が発熱したとしても温度変化に関係なく安定した
大電流を検出することができる。
(*) Effect As described above, according to the present invention, a large current flows in the main circuit of the power inverter by forming a protection circuit using a part of the conductive path formed from low-resistance @ foil as a detection resistor. Even if the detection resistor generates heat, a stable large current can be detected regardless of temperature changes.

また、上述した保護回路で保護できない過電流あるいは
過電圧が発生した際、パワー半導体素子と近傍の導電路
とを接続するボンディングワイヤを溶断させ電源から供
給される電流を遮断させることにより、混成集積回路を
実装した電子機器のシステム全体の保護を行うことがで
きる。
In addition, when an overcurrent or overvoltage that cannot be protected by the above-mentioned protection circuit occurs, the hybrid integrated circuit can It is possible to protect the entire system of electronic devices that implement this.

(へ)実施例 以下に第1図乃至第6図に示した実施例に基づいて本発
明の実施例を詳細に説明する。
(F) Embodiments Below, embodiments of the present invention will be described in detail based on the embodiments shown in FIGS. 1 to 6.

本発明の混成集積回路は第1図に示す如く、集積回路基
板(7〉と、基板(7)上に形成された所望形状の導電
路(9)と、導電路(9〉に接続され電源(図示しない
)から負荷(図示しない)へ供給される電流を制御する
複数のパワー半導体素子(8〉からなるパワーインバー
タの主回路(8a)と、主回路(8a)を構成するパワ
ー半導体素子(8)の近傍に延在された導電路(9)の
一部を検出抵抗として形成された保護回路(8b)とを
から構成される。
As shown in FIG. 1, the hybrid integrated circuit of the present invention includes an integrated circuit board (7), a conductive path (9) of a desired shape formed on the board (7), and a power supply The main circuit (8a) of the power inverter consists of a plurality of power semiconductor elements (8>) that control the current supplied from the load (not shown) to the load (not shown), and the power semiconductor elements (8a) constituting the main circuit (8a). 8) and a protection circuit (8b) formed by using a part of the conductive path (9) extending near the detection resistor as a detection resistor.

集積回路基板(1)はプリント基板あるいは金属基板が
用いられ、ここでは放熱性の優れた金属基板を用いるこ
とにする。
A printed circuit board or a metal board is used as the integrated circuit board (1), and here a metal board with excellent heat dissipation is used.

金属基板にはアルミニウム基板が用いられ、その表面は
陽極酸化により酸化アルミニウム膜が形成される。酸化
アルミニウム膜が形成された金属基板(1)の−主面に
はエポキシ樹脂あるいはポリイミド樹脂等樹脂で絶縁薄
層が形成される。ここでは酸化アルミニウム膜を形成し
たが金属基板上に直接ポリイミド等の絶縁薄層を形成す
ることも可能である。
An aluminum substrate is used as the metal substrate, and an aluminum oxide film is formed on its surface by anodic oxidation. An insulating thin layer of resin such as epoxy resin or polyimide resin is formed on the main surface of the metal substrate (1) on which the aluminum oxide film is formed. Although an aluminum oxide film was formed here, it is also possible to form an insulating thin layer of polyimide or the like directly on the metal substrate.

導電路(9)は金属基板上の絶縁薄層を介して厚さ35
μの銅箔が貼着され、所望のパターン、例えばブリッジ
回路を組む様な所定のパターンにエツチングされた後、
ボンディングを行う部分にNiメツキが施される。
The conductive path (9) has a thickness of 35 mm through a thin insulating layer on the metal substrate.
After the μ copper foil is pasted and etched into a desired pattern, such as a bridge circuit,
Ni plating is applied to the part to be bonded.

導電路(9)上には主回路(8a)を構成する複数のパ
ワー半導体素子(8)や他の回路素子例えばチップ抵抗
、チップコンデンサー、モノリシックIC等が固着形成
され、保護回路(2)を構成する所定の導電路(9)上
には抵抗R1、Ra 、 Rs 、 Ra 、 Rs 
、 RいダイオードD及び第1及び第2のコンパレータ
(5)(6)が固着されている。夫々の抵抗は抵抗ペー
ストを用いてスクリーン印刷で形成され、ダイオードD
はチップ部品が用いられ、近傍の導電路(9)上に超音
波ボンディング等でボンディング接続される。
A plurality of power semiconductor elements (8) constituting the main circuit (8a) and other circuit elements such as chip resistors, chip capacitors, monolithic ICs, etc. are fixedly formed on the conductive path (9), and the protection circuit (2) is formed on the conductive path (9). Resistors R1, Ra, Rs, Ra, Rs
, an R diode D and first and second comparators (5) and (6) are fixed. Each resistor is formed by screen printing using resistor paste, and a diode D
A chip component is used and is bonded to a nearby conductive path (9) by ultrasonic bonding or the like.

第2図は保護回路(8b)を示す回路図であり、第2図
の如く、ブリッジ回路で構成され、そのブリッジ回路に
は低抵抗の銅箔よりなる導電路(9)からなる検出抵抗
R0が接続されている。詳細に述べると保護回路(2〉
は第1及び第2の抵抗RI、 Rtと被測定電流が流れ
る前記低抵抗の金属を抵抗体とする検出抵抗R1と前記
検出抵抗R,に接続された第4及び第3の抵抗R4、R
sと前記第2の抵抗R3に接続され前記低抵抗の金属か
らなる検出抵抗R6の温度依存性を補正するダイオード
Dとを備えたブリッジ回路と、過電流保護を行うために
前記第1及び第2の抵抗R,、R,の接続点の電圧と前
記第3及び第4の抵抗Rs 、Raの接続点との電圧を
入力し比較する第1のコンパレータ(5)と、温度保護
を行うために前記第1及び第2の抵抗Rt 、 Rmの
接続点の重圧と前記ブリッジ回路の電圧を一定に保つツ
ェナーダイオードDの1圧を第5及び第6の抵抗Ra 
、 Reによって分圧された分圧電圧とを入力して比較
する第2のコンパレータ(6)とから構成される。
FIG. 2 is a circuit diagram showing the protection circuit (8b), which is composed of a bridge circuit as shown in FIG. is connected. In detail, the protection circuit (2)
are the first and second resistors RI and Rt, the detection resistor R1 whose resistor is the low-resistance metal through which the current to be measured flows, and the fourth and third resistors R4 and R connected to the detection resistor R.
a bridge circuit including a diode D connected to the second resistor R3 and correcting the temperature dependence of the detection resistor R6 made of a low-resistance metal; A first comparator (5) inputs and compares the voltage at the connection point of the second resistor R, , R, and the voltage at the connection point of the third and fourth resistors Rs and Ra, and a first comparator (5) for temperature protection. The pressure at the connection point of the first and second resistors Rt and Rm and the voltage of the Zener diode D, which keeps the voltage of the bridge circuit constant, is applied to the fifth and sixth resistors Ra.
, and a second comparator (6) which inputs and compares the divided voltages divided by Re.

第1のコンパレータ(5)は上述した如く、第1及び第
2の抵抗R+ 、Rxの接続点の電圧と第3及び第4の
抵抗R,、R,の接続点の電圧とを入力して比較し検出
抵抗R1に流れる電流を遮断させるための遮断信号を出
力する。また第2のコンパレータ(6)は第1及び第2
の抵抗R,、Rよの接続点の電圧と第5及び第6の抵抗
R* 、 Raの接続点の電圧とを入力して比較し温度
による異常を検出して電流を遮断する遮断信号を出力す
る。
As described above, the first comparator (5) inputs the voltage at the connection point of the first and second resistors R+ and Rx and the voltage at the connection point of the third and fourth resistors R, , R, After comparison, a cutoff signal for cutting off the current flowing through the detection resistor R1 is output. In addition, the second comparator (6)
By inputting and comparing the voltage at the connection point of the resistors R, R and the voltage at the connection point of the fifth and sixth resistors R* and Ra, a cutoff signal is generated to detect an abnormality due to temperature and cut off the current. Output.

第1の抵抗R+に接続されたダイオードDは検出抵抗R
0の温度変化に対する抵抗のバラツキを補正すると共に
温度による保護動作を行うことができる。
A diode D connected to the first resistor R+ is a detection resistor R
It is possible to correct variations in resistance with respect to zero temperature changes and to perform temperature-based protection operations.

以下にダイオードによる温度補正法の動作原理を説明す
る。
The operating principle of the temperature correction method using diodes will be explained below.

第2図においてツェナーダイオードでツェナー電圧v2
を一定にする(このときOvはツェナー電圧v2のアノ
ード側)。電流I0が検出抵抗R,に流れているときの
ブリッジ回路の中点電圧V、 、 V、は以下の式で与
えられる。
In Figure 2, the Zener voltage v2 at the Zener diode
(at this time, Ov is the anode side of the Zener voltage v2). The midpoint voltage V, , V, of the bridge circuit when the current I0 is flowing through the detection resistor R, is given by the following equation.

上記(2)式は電流工。の依存性があり、電流工。が大
のとき中点電圧V、は低い電圧となる。電流工、が小さ
いときの中点電圧V、 、 V、はV、<V、となり、
電流1、が犬となり工。(MA!〕に到達したとき中点
電圧V I +V、はVt−Vtと等しくなり、このと
きコンパレータの出力は反転し電流工。が遮断される。
Equation (2) above is for electric current. There is a dependence on electrician. When is large, the midpoint voltage V becomes a low voltage. When the electric current is small, the midpoint voltage V, , V, becomes V, < V, and
Current 1 becomes the dog. (MA!), the midpoint voltage V I +V becomes equal to Vt-Vt, and at this time the output of the comparator is inverted and the current is cut off.

検出抵抗R0の温度変化(ここでは銅箔の温度変化)は
第3図の如く、温度25°Cのとき抵抗値はr、。であ
り、これを式で表わすと下記の如く与えられる。
The temperature change of the detection resistor R0 (in this case, the temperature change of the copper foil) is as shown in FIG. 3, and when the temperature is 25°C, the resistance value is r. , and this can be expressed as the following formula.

Ro−foe(1+ (! (T−25))    ”
”””””””(3)ここでr、。は25℃のCuパタ
ーン抵抗値、αはCuのTCRである。上記(3)を(
2)式に代入するとV。
Ro-foe(1+ (! (T-25))”
""""""" (3) Here, r and . are the Cu pattern resistance values at 25°C, and α is the TCR of Cu.
2) Substituting into the formula gives V.

の温度変化が下記の如く与えられる。The temperature change of is given as follows.

ダイオードの温度変化は第4図の如く、温度25℃のと
き電圧’/DはVDDであり、これを式で表わすと下記
の如く与えられる。
The temperature change of the diode is shown in FIG. 4, and when the temperature is 25° C., the voltage '/D is VDD, which is expressed as follows.

VD−vDD−β(T−25)     ・・・・・・
・・・・・・・・・(5)ここでβはP−N接合V、の
温度変化量であり1つあたり約−2mV/ ”Cである
。上記(5)式を(1)に代入するとvlの温度変化が
下記の如く与えられる。
VD-vDD-β (T-25) ・・・・・・
・・・・・・・・・(5) Here, β is the amount of temperature change of the P-N junction V, which is approximately -2 mV/''C per one. By substituting, the temperature change of vl is given as follows.

温度25℃では工。”II(MAI)における中点電圧
Vt 、 VtはVt−Vaと等しイノテ、中点電圧V
、 、 V、(7)温度変化量が等しければ温度が変化
しても1゜−I。
The temperature is 25℃. ``The midpoint voltage Vt at II (MAI), Vt is equal to Vt-Va, and the midpoint voltage V
, , V, (7) If the amount of temperature change is the same, even if the temperature changes, 1°-I.

(MAz)における中点電圧V、 −V、は成立する。The midpoint voltage V at (MAz), −V, holds true.

先ず(4)式を温度Tで微分すると ・・・・・・・・・(7) 次に(6)式を温度を微分すると −ro。(1+a (’l−25))’Iecl、Ax
)   ・・・・・・・・・く4〉また、温度25℃に
おける中点電圧V+−V*を表わすと下記の如く与えら
れる。
First, when we differentiate equation (4) with respect to temperature T......(7) Next, when we differentiate equation (6) with respect to temperature, we get -ro. (1+a ('l-25))'Iecl, Ax
)......4> Also, the midpoint voltage V+-V* at a temperature of 25° C. is expressed as follows.

・・・・・・・・・(10) 比で並べかえると下記の如く2元連立方程式が与えられ
る。
・・・・・・・・・(10) When rearranged by ratio, the following two-dimensional simultaneous equations are given.

となる、 (13)(14)式は初期定数であるからR
A、 Rsも定数でただひとつ決まることになる。従っ
て(13)(14)式の如く、RA 、 Rmを定めれ
ば中点電圧V、=■、は温度変化に関係なく常に等しく
なり、第5図の如く、温度変化に関係すること無く一定
した電流を検出することができる。
Since equations (13) and (14) are initial constants, R
A and Rs are also determined by only one constant. Therefore, as shown in equations (13) and (14), if RA and Rm are determined, the midpoint voltage V, = It is possible to detect the current generated by the

次に温度保護について説明する。Next, temperature protection will be explained.

上述した検出抵抗R0の温度補正用として用いた抵抗R
1,R1及びダイオードDの直列接続した回路で抵抗R
,、R,の接続点v1の温度変化によるv1変化をV、
と比較し温度保護が行われる。
Resistor R used for temperature correction of the above-mentioned detection resistor R0
1, R1 and diode D connected in series, resistor R
The change in v1 due to temperature change at the connection point v1 of ,,R, is expressed as V,
Temperature protection is provided compared to

V、 、 V、は以下の式で与えられる。V, , V, are given by the following formula.

上記(11)(12)式の方程式を解くと下記の如く与
えられる。
Solving the equations (11) and (12) above gives the following equations.

上述した如く、■ゎは温度25°Cのとき’/Elであ
り、これを式で表わすと以下の様になる。
As mentioned above, ■ゎ is '/El when the temperature is 25°C, and this can be expressed by the following formula.

V 、−V D、−β(T−25)        −
−−−−−−−−−−−−−−(5)<5)式を(1)
式に代入すると となる。
V, -V D, -β(T-25) -
−−−−−−−−−−−−−(5)<5) Expression (1)
Substituting into the expression gives

温度が低いときVs<Vtであるが、温度が高<(IW
aX )なった場合 V 1111!1 V 1となり
、第2のコンパレータ(6)の出力信号が反転され、信
号が遮断される。
When the temperature is low, Vs < Vt, but when the temperature is high < (IW
aX ) becomes V 1111!1 V 1, the output signal of the second comparator (6) is inverted, and the signal is cut off.

第6図はコンパレータからr H、レベルの信号が出力
されたとき、パワー半導体素子(8)に検出抵抗R0を
介して流れる大電流を遮断制御する制御回路を示す等価
回路図であり、抵抗R0はブリッジ回路に設けられた電
流検出用の検出抵抗R0であル、今、コンパレータ(6
)からrH,レベルの信号が出力されたとすると、トラ
ンジスタTrt(16)がオンし、フォトカプラDCI
(17)がオンし、トランジスタ’rr*(18)がオ
フする。トランジスタτrs(1B)がオフすることに
より、大電流が遮断されパワー半導体素子(8)が保護
される。上述した制御回路はいうまでもなく保護回路(
2)と同様に基板(7)上に形成された導電路(9)と
接続きれている。
FIG. 6 is an equivalent circuit diagram showing a control circuit that controls to cut off the large current flowing through the power semiconductor element (8) via the detection resistor R0 when a signal of level rH is output from the comparator. is the detection resistor R0 for current detection provided in the bridge circuit, and now the comparator (6
), the transistor Trt (16) turns on and the photocoupler DCI
(17) is turned on, and transistor 'rr* (18) is turned off. By turning off the transistor τrs (1B), the large current is cut off and the power semiconductor element (8) is protected. Needless to say, the above-mentioned control circuit also includes a protection circuit (
Similarly to 2), it is not connected to the conductive path (9) formed on the substrate (7).

本実施例では、検出抵抗R0に導電路(9)の一部分を
利用し、ここではパワー半導体素子(8)の近傍の点a
−b間を検出抵抗R0に用いる。検出抵抗R0の近傍に
は電流検出用のブリッジ回路が形成され、更に検出抵抗
R0の端部には検出抵抗R0を調整するためのカギ状の
突出部(10)が形成される。この突出部(10)は点
a−b間の検出抵抗R0の抵抗の調整を行うものであり
、以下その調整法について説明する。
In this embodiment, a part of the conductive path (9) is used for the detection resistor R0, and here, a point a near the power semiconductor element (8) is used.
-b is used as the detection resistor R0. A bridge circuit for current detection is formed near the detection resistor R0, and a key-shaped protrusion (10) for adjusting the detection resistor R0 is further formed at the end of the detection resistor R0. This protrusion (10) is used to adjust the resistance of the detection resistor R0 between points a and b, and the adjustment method will be described below.

突出部(10)と検出抵抗R6とをNiメツキ等の接続
体(11)で接続する。ここで接続体(11)はNiメ
ツキが用いられるが、突出部(10)と検出抵抗R6と
を接続するものであれば任意である。接続体(11)で
接続された部分の検出抵抗R0の内部抵抗は幅が広い為
に略無視できる超低抵抗となり、検出抵抗R0全体の抵
抗は接続体(12)で接続された距離、即ち、突出部(
1G)j!tの任意点!!から点aまでの内部抵抗と任
意点1.から点すまで超抵抗値の内部抵抗の和である。
The protrusion (10) and the detection resistor R6 are connected by a connecting body (11) such as Ni plating. Here, Ni plating is used for the connecting body (11), but any type can be used as long as it connects the protrusion (10) and the detection resistor R6. The internal resistance of the detection resistor R0 at the part connected by the connection body (11) is wide and has an extremely low resistance that can be ignored, and the resistance of the entire detection resistor R0 is the distance connected by the connection body (12), i.e. , protrusion (
1G)j! Any point of t! ! Internal resistance from to point a and arbitrary point 1. It is the sum of the internal resistance of the super resistance value from to .

従って検出抵抗R8の突出部(10)Lにおける任意点
18を変化させることで検出抵抗R0の抵抗を調整する
ことができる。即ち、接続体(12)のトリミングスリ
ット(13)距離で任意点之、が定型り、点aから任意
点lxまでの距離の内部抵抗が検出抵抗R0の抵抗値と
なり微調整が容易に行える。
Therefore, the resistance of the detection resistor R0 can be adjusted by changing the arbitrary point 18 on the protrusion (10) L of the detection resistor R8. That is, an arbitrary point is determined by the distance between the trimming slit (13) of the connecting body (12), and the internal resistance at the distance from point a to arbitrary point lx becomes the resistance value of the detection resistor R0, and fine adjustment can be easily performed.

上述した保護回路(8b)を基板(7)上に形成するこ
とで安定した電流検出が行えパワー半導体素子(8)の
破壊を防止することができる。しかし、現実には保護回
路で保護できない過電流あるいは過電圧が発生する場合
がある。その場合は基板(7)上に形成した周辺回路の
破壊あるいは外部ノイズ等による予期できない理由によ
る誤動作で保護回路あるいは制御回路が正常な動作を行
わない場合がある。このとき、過電流あるいは過電圧が
発生しても正常動作の場合では保護できるがこの場合で
は保護できず、パワー半導体素子(8)が破壊され、導
通状態となり大電流が流れつづけることになる。
By forming the above-mentioned protection circuit (8b) on the substrate (7), stable current detection can be performed and damage to the power semiconductor element (8) can be prevented. However, in reality, overcurrent or overvoltage that cannot be protected by the protection circuit may occur. In this case, the protection circuit or control circuit may not operate normally due to destruction of the peripheral circuit formed on the substrate (7) or malfunction due to unpredictable reasons such as external noise. At this time, even if an overcurrent or overvoltage occurs, protection can be provided in the case of normal operation, but in this case, protection is not possible, and the power semiconductor element (8) is destroyed, becomes conductive, and a large current continues to flow.

この結果、インバータ用の混成集積回路を例えばエアコ
ン等の電子機器に実装した際、モータの停止あるいは誤
動作が発生する問題がある。更にACフード線等の電流
路が発熱し火災等の二次災害を誘発する大きな問題とな
る。
As a result, when a hybrid integrated circuit for an inverter is mounted on an electronic device such as an air conditioner, there is a problem that the motor may stop or malfunction. Furthermore, current paths such as AC hood wires generate heat, which poses a major problem that can lead to secondary disasters such as fire.

そこで本実施例では上述した保護回路で保護できない過
電流あるいは過電圧をパワー半導体素子(8)と導電路
(9)とを接続するボンディングワイヤ(8c)を積極
的に溶断させて混成集積回路を実装した電子機器全体の
システムを保護するものである。
Therefore, in this embodiment, the hybrid integrated circuit is mounted by actively blowing out the bonding wire (8c) connecting the power semiconductor element (8) and the conductive path (9) to prevent overcurrent or overvoltage that cannot be protected by the above-mentioned protection circuit. This protects the entire system of electronic equipment that has been exposed.

即ち、パワー半導体素子(8)と導電路(9)とを接続
するボンディングワイヤ(8C)の径を保護回路で保護
できない過電流あるいは過電圧が発生したときに溶断す
る様な径にしておき積極的にボンディングワイヤ(8C
)を溶断させてシステムの保護を行う。
That is, the diameter of the bonding wire (8C) that connects the power semiconductor element (8) and the conductive path (9) is set to a diameter that will melt when an overcurrent or overvoltage that cannot be protected by the protection circuit occurs. Bonding wire (8C
) to protect the system.

ボンディングワイヤ(8c)としては金線およびアルミ
ニウム線が用いられ、その径の大きさは過電流あるいは
過電圧を設定する大きさによって異なるが例えば0.1
a〜0.5mの範囲であれば20八〜100Aの過電流
で第1図に示す如く、ボンディングワイヤ(8c)を溶
断させることができる。
A gold wire or an aluminum wire is used as the bonding wire (8c), and the diameter thereof varies depending on the setting of overcurrent or overvoltage, but is, for example, 0.1.
If the distance is in the range of a to 0.5 m, the bonding wire (8c) can be fused with an overcurrent of 208 to 100 A, as shown in FIG.

従って保護回路で保護できない過電流電圧が発生した場
合をあらかじめ設定しておき、ワイヤ(8C)の径を設
定しておけば過電流・電圧が発生しても火災等の二次的
な災害を防止することができる。
Therefore, by setting in advance the case where an overcurrent voltage that cannot be protected by the protection circuit occurs, and by setting the diameter of the wire (8C), even if an overcurrent or voltage occurs, secondary disasters such as fire can be prevented. It can be prevented.

(ト)発明の効果 以上に詳述した如く、本発明に依れば、低抵抗の銅箔よ
り形成された導電路の一部分を検出抵抗として用いた保
護回路を基板上に形成することにより、パワーインバー
タの主回路に大電流が流れ検出抵抗が発熱したとしても
温度変化に関係することなく、安定した電流検出が行え
信頼性の優れたインバータ用の混成集積回路を提供する
ことができる。
(G) Effects of the Invention As detailed above, according to the present invention, by forming a protection circuit on a substrate using a portion of a conductive path formed of low-resistance copper foil as a detection resistor, It is possible to provide a highly reliable hybrid integrated circuit for an inverter that can perform stable current detection regardless of temperature changes even if a large current flows through the main circuit of the power inverter and the detection resistor generates heat.

また検出抵抗はf!1111により形成されているので
低抵抗の抵抗を形成したとしても抵抗面積を大きくする
必要がない利点を有する。
Also, the detection resistance is f! 1111, it has the advantage that even if a low-resistance resistor is formed, there is no need to increase the resistor area.

更に本発明では上述した保護回路で保護できない過電流
・電圧が発生してもパワー半導体素子と導電路とを接続
するボンディングワイヤが溶断されるため、過電流・電
圧が発生しても混成集積回路自体の破壊でインバータ用
混成集積回路を実装したエアコン等の電子機器全体のシ
ステムを破壊することがないので極めて安全なインバー
タ用の混成集積回路を提供することができる。
Furthermore, in the present invention, even if an overcurrent or voltage that cannot be protected by the above-mentioned protection circuit occurs, the bonding wire that connects the power semiconductor element and the conductive path is fused, so even if an overcurrent or voltage occurs, the hybrid integrated circuit An extremely safe hybrid integrated circuit for an inverter can be provided because the hybrid integrated circuit for an inverter does not destroy the entire system of an electronic device such as an air conditioner in which the hybrid integrated circuit for an inverter is mounted.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本実施例の混成集積回路を示す要部平面図、第
2図は本実施例を示す回路図、第3図は抵抗の温度特性
図、第4図は電圧の温度特性図、第5図は本発明によっ
て補正された検出電流の温度特性図、第6図は厚膜IC
に用いられる制御回路を示す回路図、第7図は従来を例
示する回路図である。 (7)・・・集積回路基板、 (8)・・・パワー半導
体素子、 (9)・・・導電路、 (8a)・・・イン
バータの主回路、 (8b)・・・保護回路、 (8C
)・・・ボンディングワイヤ。 第2図 〔 、X 第3 図 第4 第5121 O 第7r:A
FIG. 1 is a plan view of the main parts showing the hybrid integrated circuit of this embodiment, FIG. 2 is a circuit diagram showing this embodiment, FIG. 3 is a resistance temperature characteristic diagram, FIG. 4 is a voltage temperature characteristic diagram, Fig. 5 is a temperature characteristic diagram of the detected current corrected by the present invention, and Fig. 6 is a diagram of the temperature characteristic of the detected current corrected by the present invention.
FIG. 7 is a circuit diagram illustrating a conventional control circuit. (7)...Integrated circuit board, (8)...Power semiconductor element, (9)...Conducting path, (8a)...Inverter main circuit, (8b)...Protection circuit, ( 8C
)...bonding wire. Figure 2 [ , X Figure 3 Figure 4 5121 O 7th r:A

Claims (5)

【特許請求の範囲】[Claims] (1)金属からなる集積回路基板と、 前記基板上に形成された所望形状の導電路と、前記導電
路に接続され電源から負荷へ供給される電流を制御する
複数のパワー半導体素子からなるパワーインバータの主
回路と、 前記主回路を構成する前記パワー半導体素子の近傍に延
在された前記導電路の一部を用いて過電流あるいは過電
圧により前記パワー半導体素子の破壊を防止するために
形成された保護回路とを備え、 前記保護回路で保護できない過電流あるいは過電圧が発
生した際、前記パワー半導体素子と近傍の前記導電路と
を接続するボンディングワイヤを溶断させ前記電源から
供給される電流を遮断することを特徴とする混成集積回
路。
(1) A power source consisting of an integrated circuit board made of metal, a conductive path of a desired shape formed on the substrate, and a plurality of power semiconductor elements connected to the conductive path and controlling the current supplied from the power source to the load. A main circuit of an inverter and a part of the conductive path extending near the power semiconductor elements constituting the main circuit are used to prevent destruction of the power semiconductor elements due to overcurrent or overvoltage. and a protection circuit that, when an overcurrent or overvoltage that cannot be protected by the protection circuit occurs, melts a bonding wire connecting the power semiconductor element and the nearby conductive path to cut off the current supplied from the power source. A hybrid integrated circuit characterized by:
(2)前記保護回路は第1及び第2の抵抗と被測定電流
が流れる低抵抗の前記銅箔を抵抗体とする検出抵抗と前
記検出抵抗に接続された第4及び第3の抵抗と前記第2
の抵抗に接続され前記銅箔よりなる検出抵抗の温度依存
性を補正するダイオードとを備えたブリッジ回路と、過
電流保護を行うために前記第1及び第2の抵抗の接続点
の電圧と前記第3及び第4の抵抗の接続点との電圧を入
力し比較する第1のコンパレータと、温度保護を行うた
めに前記第1及び第2の抵抗の接続点の電圧と前記ブリ
ッジ回路の電圧を一定に保つツェナーダイオードの分圧
電圧とを入力して比較する第2のコンパレータとを備え
たことを特徴とする請求項1記載の混成集積回路。
(2) The protection circuit includes first and second resistors, a detection resistor whose resistor is the low-resistance copper foil through which the current to be measured flows, fourth and third resistors connected to the detection resistor, and the Second
a bridge circuit including a diode connected to the resistor to correct the temperature dependence of the detection resistor made of copper foil, and a voltage at the connection point of the first and second resistors to provide overcurrent protection; a first comparator that inputs and compares the voltage at the connection point of the third and fourth resistors, and a voltage at the connection point of the first and second resistors and the voltage of the bridge circuit for temperature protection; 2. The hybrid integrated circuit according to claim 1, further comprising a second comparator which inputs and compares the divided voltage of the Zener diode which is kept constant.
(3)前記ツェナーダイオードの電源は前記検出抵抗に
流れる電流の電源を用いて行うことを特徴とする請求項
2記載の混成集積回路。
(3) The hybrid integrated circuit according to claim 2, wherein the Zener diode is powered by a current flowing through the detection resistor.
(4)前記基板上に搭載される半導体素子はチップで搭
載されていることを特徴とする請求項1記載の混成集積
回路。
(4) The hybrid integrated circuit according to claim 1, wherein the semiconductor element mounted on the substrate is mounted as a chip.
(5)前記集積回路基板としては表面が絶縁されたアル
ミニウム基板を用いたことを特徴とする請求項1記載の
混成集積回路。
(5) The hybrid integrated circuit according to claim 1, wherein the integrated circuit board is an aluminum substrate whose surface is insulated.
JP13861489A 1989-05-31 1989-05-31 Hybrid integrated circuit Expired - Lifetime JP2680684B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13861489A JP2680684B2 (en) 1989-05-31 1989-05-31 Hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13861489A JP2680684B2 (en) 1989-05-31 1989-05-31 Hybrid integrated circuit

Publications (2)

Publication Number Publication Date
JPH033356A true JPH033356A (en) 1991-01-09
JP2680684B2 JP2680684B2 (en) 1997-11-19

Family

ID=15226203

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13861489A Expired - Lifetime JP2680684B2 (en) 1989-05-31 1989-05-31 Hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JP2680684B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011254562A (en) * 2010-05-07 2011-12-15 Panasonic Corp Motor current detection ic, and current detector and motor controller using the same
JP2012186326A (en) * 2011-03-07 2012-09-27 Nichia Chem Ind Ltd Method of manufacturing semiconductor laser driving device
JP2020096471A (en) * 2018-12-14 2020-06-18 三菱電機株式会社 Power conversion device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115132707A (en) 2021-03-24 2022-09-30 株式会社东芝 Semiconductor device with a plurality of semiconductor chips

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011254562A (en) * 2010-05-07 2011-12-15 Panasonic Corp Motor current detection ic, and current detector and motor controller using the same
JP2012186326A (en) * 2011-03-07 2012-09-27 Nichia Chem Ind Ltd Method of manufacturing semiconductor laser driving device
JP2020096471A (en) * 2018-12-14 2020-06-18 三菱電機株式会社 Power conversion device

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