JP2869261B2 - Hybrid integrated circuit device - Google Patents
Hybrid integrated circuit deviceInfo
- Publication number
- JP2869261B2 JP2869261B2 JP4229960A JP22996092A JP2869261B2 JP 2869261 B2 JP2869261 B2 JP 2869261B2 JP 4229960 A JP4229960 A JP 4229960A JP 22996092 A JP22996092 A JP 22996092A JP 2869261 B2 JP2869261 B2 JP 2869261B2
- Authority
- JP
- Japan
- Prior art keywords
- resistance
- current
- integrated circuit
- hybrid integrated
- circuit device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は混成集積回路装置に関
し、特に抵抗温度係数が極めて低い合金材よりなる抵抗
体部品をワイヤーボンディング接続で混成集積回路基板
上に接続する混成集積回路装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit device, and more particularly to a hybrid integrated circuit device in which a resistor component made of an alloy material having an extremely low temperature coefficient of resistance is connected to a hybrid integrated circuit board by wire bonding.
【０００２】[0002]
【従来の技術】従来、電流検出を行う手段の１としてブ
リッジ回路がある。この電流検出用のブリッジ回路は周
知の如く、ブリッジの平衡条件を利用して電流検出を行
うものであり、その回路について簡単に説明すると（図
３参照）、電流検出用の抵抗Ｒ 0（２１）にある電流Ｉ0
が流れているとする。この電流Ｉ0の最大値が抵抗Ｒ
0（２１）に流れたときにブリッジが平衡となる様に各
抵抗Ｒ1（２２），Ｒ2（２３），Ｒ3（２５），Ｒ4（２
４）を設定する。このブリッジ回路の抵抗Ｒ0（２１）
に電流Ｉ0の最大値以下の電流が流れたとするとコンパ
レータ（２６）から「Ｌ」レベルの信号が出力され、抵
抗Ｒ0（２１）に電流Ｉ0の最大値以上の電流が流れたと
するとコンパレータ（２６）への入力の電圧が逆転し
「Ｈ」レベルの信号が出力され電流Ｉ0を遮断し回路を
保護する。2. Description of the Related Art Conventionally, as one of means for detecting a current, a block
There is a ridge circuit. This current detection bridge circuit
As we know, current detection is performed using the balance condition of the bridge.
The circuit can be briefly described (Fig.
3), a resistor R for current detection 0Current I in (21)0
Is flowing. This current I0Is the maximum value of the resistance R
0Each bridge is balanced so that it flows to (21).
Resistance R1(22), RTwo(23), RThree(25), RFour(2
4) Set. The resistance R of this bridge circuit0(21)
Current I0If a current less than the maximum value of
The signal at the “L” level is output from the
Anti-R0(21) Current I0If the current that exceeds the maximum value of
Then, the voltage of the input to the comparator (26) reverses.
An "H" level signal is output and the current I0Cut off the circuit
Protect.
【０００３】この様なブリッジ回路は特開昭５３−９７
４７０号公報に記載されている。上述のブリッジ回路を
混成集積回路基板上に搭載形成した場合、電流Ｉ0を検
出する電流検出抵抗Ｒ0の抵抗体としては、Ｎｉメッキ
抵抗が主として用いられている。しかしながら、Ｎｉメ
ッキは溶断電流が小さいので小さい電流の検出は行える
が大電流の検出を行う際には溶断電流を大とするために
抵抗体面積を大きくするかあるいは厚みを厚くしなけれ
ばならないので、基板実装面積の縮小、メッキ処理時間
が長くなるという問題があり、例えば４０Ａという大電
流を検出するのは略不可能とされていた。Such a bridge circuit is disclosed in Japanese Patent Application Laid-Open No. 53-97.
470. When the above-described bridge circuit is mounted and formed on a hybrid integrated circuit board, a Ni plating resistor is mainly used as a resistor of the current detection resistor R 0 for detecting the current I 0 . However, Ni plating has a small fusing current, so a small current can be detected.However, when a large current is detected, the resistor area or the thickness must be increased in order to increase the fusing current. However, there is a problem that the substrate mounting area is reduced and the plating process time is prolonged, and it has been almost impossible to detect a large current of, for example, 40 A.
【０００４】斯上の問題を解消するために電流検出抵抗
Ｒ0の抵抗体溶断電流の大きい銅箔あるいはＡｇペース
トを用いることにより解消することができる。The above problem can be solved by using a copper foil or an Ag paste having a large resistance fusing current of the current detection resistor R 0 .
【０００５】[0005]
【発明が解決しようとする課題】溶断電流の大きいＡｇ
ペーストあるいは銅箔を用いることで大電流を検出する
ことは可能である。確かに銅箔の比抵抗が０．５ｍΩ，
Ａｇペーストの比抵抗３７ｍΩと小さいので大電流を流
すことができる。しかしながら、Ａｇペーストはペース
ト材にＡｇの粉末を混入しスクリーン印刷等により形成
するために抵抗面積が大きくなる問題があり、更に銅箔
をプリント基板上に形成し大電流を流すと熱によりプリ
ント基板が変形する問題点があった。SUMMARY OF THE INVENTION Ag having a large fusing current
It is possible to detect a large current by using a paste or a copper foil. Certainly, the specific resistance of copper foil is 0.5mΩ,
Since the specific resistance of the Ag paste is as small as 37 mΩ, a large current can flow. However, since the Ag paste is formed by screen printing or the like by mixing Ag powder into the paste material, there is a problem that the resistance area becomes large. Further, when a copper foil is formed on a printed circuit board and a large current is applied, the printed circuit board is heated by heat. However, there was a problem of deformation.
【０００６】また銅箔はエッチング時のサイドエッチン
グ及び銅箔の圧延工程での厚みのバラツキにより一定し
た抵抗が得られないので検出抵抗として用いることがで
きない問題点がある。更に銅箔及びＡｇペーストのＴＣ
Ｒ（抵抗温度係数）が３８００±２００ｐｐｍ及び２１
５０±１５０ｐｐｍと非常に高いので基板温度の変化に
対して抵抗のバラツキが極めて大きいため電流を正確に
検出することが行えない問題がある。かかる問題を解決
するためには別途温度補正用の補正回路が必要となり、
電流検出回路が複雑となる新たな問題が発生する。[0006] In addition, the copper foil cannot be used as a detection resistor because a constant resistance cannot be obtained due to side etching at the time of etching and variation in thickness in a rolling step of the copper foil. TC of copper foil and Ag paste
R (temperature coefficient of resistance) 3800 ± 200 ppm and 21
Since it is as high as 50 ± 150 ppm, there is a problem that the current cannot be detected accurately because the variation in resistance with respect to a change in the substrate temperature is extremely large. In order to solve such a problem, a correction circuit for temperature correction is separately required,
A new problem arises in that the current detection circuit becomes complicated.
【０００７】更に、銅箔を検出抵抗として用いる場合に
は、トリミング調整が困難であり、精度の優れた検出抵
抗を提供することが困難である。この発明は、上述した
課題に鑑みて為されたもので、この発明の目的は、抵抗
トリミング調整が容易で且つ温度変化に対しても極めて
安定した電流検出が可能な混成集積回路装置を提供する
ことを目的とする。Further, when a copper foil is used as the detection resistor, trimming adjustment is difficult, and it is difficult to provide a detection resistor with excellent accuracy. SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a hybrid integrated circuit device which can easily perform resistance trimming adjustment and can detect a current extremely stably with respect to a temperature change. The purpose is to:
【０００８】[0008]
【課題を解決するための手段】上述した課題を解決し、
目的を達成するため、この発明に保れる混成集積回路装
置は、金属基板上に絶縁樹脂層を介して銅箔により形成
された所望形状の導電路に電流検出用抵抗素子を含む複
数の回路素子が接続された混成集積回路装置の電流検出
用抵抗素子は、金属片の一主面上に絶縁樹脂膜を介して
温度係数が約１ｐｐｍ〜５００ｐｐｍの合金材により所
望形状の抵抗パターンが形成され、その抵抗パターンの
延長線上に少なくとも２以上の電流用および電圧検出用
のボンディングパッドを有した抵抗体部品であって、そ
の抵抗体部品を基板上に搭載し、抵抗体部品の近傍に延
在された導電路と抵抗体部品のボンディング用パッドを
ワイヤーボンディング接続したことを特徴としている。Means for Solving the Problems The above-mentioned problems are solved,
In order to achieve the object, a hybrid integrated circuit device according to the present invention includes a plurality of circuit elements including a current detection resistance element in a conductive path having a desired shape formed of copper foil on a metal substrate via an insulating resin layer. The resistance element for current detection of the hybrid integrated circuit device to which a temperature coefficient of about 1 ppm to 500 ppm of an alloy material having a temperature coefficient is formed on one main surface of a metal piece via an insulating resin film, A resistor component having at least two bonding pads for current and voltage detection on an extension of the resistor pattern, the resistor component being mounted on a substrate, and extending near the resistor component. The conductive path and the bonding pad of the resistor component are connected by wire bonding.
【０００９】[0009]
【作用】以上のように構成される混成集積回路装置にお
いては、電流検出抵抗体が部品となっているために、抵
抗体のトリミング調整を精度よく調整することができ
る。また、抵抗体部品に形成される抵抗パターンは抵抗
温度係数が約１ｐｐｍ〜５００ｐｐｍという極めて低い
合金材により形成されるために、温度変化に対して抵抗
値の変動がなく安定した電流検出を行うことができる。In the hybrid integrated circuit device configured as described above, since the current detection resistor is a component, the trimming adjustment of the resistor can be adjusted with high accuracy. Further, since the resistance pattern formed on the resistor component is formed of an extremely low alloy material having a temperature coefficient of resistance of about 1 ppm to 500 ppm, it is necessary to perform stable current detection without a change in resistance value with respect to a temperature change. Can be.
【００１０】[0010]
【実施例】以下に、図１に示した実施例に基づいて、本
発明の混成集積回路装置について詳述する。本発明の混
成集積回路装置は、図１に示す如く、金属基板（１）
と、その基板（１）上に貼着された絶縁樹脂層（２）
と、その樹脂層（２）上に形成された所望形状の導電路
（３）と、その導電路（３）に接続されたパワー半導体
素子（４）と、そのパワー半導体素子（４）に流れる電
流を検出する電流検出抵抗素子（５）とから構成され
る。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A hybrid integrated circuit device according to the present invention will be described below in detail with reference to the embodiment shown in FIG. As shown in FIG. 1, the hybrid integrated circuit device of the present invention comprises a metal substrate (1).
And an insulating resin layer (2) adhered on the substrate (1)
And a conductive path (3) having a desired shape formed on the resin layer (2), a power semiconductor element (4) connected to the conductive path (3), and flowing through the power semiconductor element (4). A current detection resistor element (5) for detecting a current.
【００１１】金属基板（１）はアルミニウム、銅等の基
板が用いられ、この実施例においては、アルミニウム基
板が用いられている。このアルミニウム基板の表面に
は、図示されないが、酸化アルミニウム膜が形成されて
いる。尚、この酸化膜は形成しなくとも別に支障はな
い。この金属基板（１）の一主面上にエポキシ樹脂ある
いはポリイミド樹脂と銅箔とが一体化されたクラッド材
をホットプレス等の加圧手段を用いて貼着する。そし
て、銅箔を所望形状にエッチングし所望形状の導電路
（３）が形成される。この実施例で形成される導電路
（３）は図１からでは明らかにされないが、図２に示す
インバータ回路が形成されている。As the metal substrate (1), a substrate made of aluminum, copper or the like is used. In this embodiment, an aluminum substrate is used. Although not shown, an aluminum oxide film is formed on the surface of the aluminum substrate. Note that there is no problem even if this oxide film is not formed. On one main surface of the metal substrate (1), a clad material in which an epoxy resin or a polyimide resin and a copper foil are integrated is attached by using a pressing means such as a hot press. Then, the copper foil is etched into a desired shape to form a conductive path (3) having a desired shape. Although the conductive path (3) formed in this embodiment is not apparent from FIG. 1, the inverter circuit shown in FIG. 2 is formed.
【００１２】ところで、このインバータ回路は、インバ
ータ回路の負荷となるモータＭの回転速度、回転方向等
のデータＤIN並びに後述する過電流検出回路の信号を入
力してインバータ制御信号を生成する制御回路（１１）
と、この制御回路（１１）の信号出力および過電流検出
回路の信号入力のためのバッファ（１２）と、インバー
タ回路を形成するスイッチング素子Ｑ11〜Ｑ16と、この
スイッチング素子Ｑ11〜Ｑ16をオン・オフ制御するドラ
イバ（１３）と、慣流ダイオードＤ11〜Ｄ16と、電流検
出抵抗Ｒ0と、その抵抗Ｒ0の両端に接続された過電流検
出回路（１４）とから構成される。Incidentally, this inverter circuit receives a data D IN such as a rotation speed and a rotation direction of a motor M which is a load of the inverter circuit and a signal of an overcurrent detection circuit to be described later to generate an inverter control signal. (11)
When a buffer (12) for the signal input of a signal output and the overcurrent detection circuit of the control circuit (11), the switching element Q 11 to Q 16 to form an inverter circuit, the switching element Q 11 to Q 16 the oN-oFF control driver (13), and慣流diode D 11 to D 16, a current detecting resistor R 0, is constructed from the connected across the resistor R 0 the overcurrent detection circuit (14) You.
【００１３】その動作について簡単に説明すると、マイ
クロコンピュータあるいはＤＳＰにより構成される制御
回路（１１）はＤ INとして入力される回転速度設定信号
に応じた周波数であって、それぞれ１２０度の位相差を
有する３つのパルス幅化正弦波とこのパルス幅化正弦波
に対してそれぞれ１８０度位相が遅れた３つのパルスを
生成する。The operation will be briefly described.
Control by computer or DSP
Circuit (11) is D INSpeed setting signal input as
And a phase difference of 120 degrees each.
Three pulse width sine waves and this pulse width sine wave
Three pulses, each 180 degrees out of phase
Generate.
【００１４】それぞれ１２０度の位相差を有する３つの
パルス幅化正弦波はバッファ（１２）、ホトカプラＰＣ
11〜ＰＣinおよびドライバ（１３）を介してインバータ
回路を形成する上側アームのスイッチング素子Ｑ11，Ｑ
13，Ｑ15の制御電極に入力され、これらをオン・オフ制
御する。また、このパルス幅化正弦波に対してそれぞれ
１８０度位相が遅れたパルスは同様に下側アームのスイ
ッチング素子Ｑ12，Ｑ 14，Ｑ16をオン・オフ制御する。[0014] Three three phase shifters each having a phase difference of 120 degrees
Pulse width sine wave is buffer (12), photocoupler PC
11~ PCinAnd inverter via driver (13)
Switching element Q of upper arm forming circuit11, Q
13, Q15Input to the control electrodes of the
I will. Also, for each pulse width sine wave,
Pulses with a phase lag of 180 degrees are similarly switched on the lower arm.
Switching element Q12, Q 14, Q16On / off control.
【００１５】従って、それぞれ１２０度の位相差を有す
る３つのパルス幅化正弦波とこのパルス幅化正弦波に対
してそれぞれ１８０度位相が遅れた３つのパルスにより
オン・オフ制御されるインバータ回路の出力端子、即ち
スイッチング素子Ｑ11とＱ12、スイッチング素子Ｑ13と
Ｑ14、スイッチング素子Ｑ15、Ｑ16の接続点には３相の
パルス幅化正弦波電圧が得られ、モータＭに流れる負荷
電流は正弦波に近似したものとなる。Therefore, an inverter circuit which is turned on / off by three pulse width sine waves each having a phase difference of 120 degrees and three pulses each 180 degrees out of phase with respect to this pulse width sine wave. output terminal, i.e. the switching element Q 11 and Q 12, the switching elements Q 13 and Q 14, the connection point of the switching elements Q 15, Q 16 obtained pulse width converted sinusoidal wave voltage three-phase load flowing through the motor M The current is similar to a sine wave.
【００１６】モータの過負荷、直列スイッチング素子の
同時導通、その他に起因する過電流は抵抗Ｒ0および過
電流検出回路（１４）により検出され、ホトカプラＰＣ
10、バッファ（１２）を介して制御回路（１１）に入力
される。制御回路（１１）はこの過電流検出信号に基づ
いて一定期間パルス出力を停止する等の保護動作を行
う。An overcurrent caused by overload of the motor, simultaneous conduction of the series switching elements, etc. is detected by the resistor R 0 and the overcurrent detection circuit (14).
10 is input to the control circuit (11) via the buffer (12). The control circuit (11) performs a protection operation such as stopping the pulse output for a certain period based on the overcurrent detection signal.
【００１７】上記インバータ回路のスイッチング素子と
しては、例えばパワートランジスタ、パワーＭＯＳある
いはＩＧＢＴ等の半導体素子（４）が用いられる。その
半導体素子（４）は銅等のヒートシンク材（６）を介し
て導電路（３）上に半田等のろう材により固着され、そ
の周辺に延在された導電路（３）と半導体素子（４）と
がワイヤー線によって接続される。そして、その周辺に
は制御回路（１１）、ドライバ（１３）および過電流検
出回路（１４）等を構成するためにトランジスタ、チッ
プ抵抗等の複数の回路素子（７）が搭載され、図２に示
すインバータ回路が構成される。As the switching element of the inverter circuit, for example, a semiconductor element (4) such as a power transistor, a power MOS or an IGBT is used. The semiconductor element (4) is fixed on the conductive path (3) with a brazing material such as solder via a heat sink material (6) such as copper, and the conductive path (3) extending around the periphery and the semiconductor element (4). 4) are connected by a wire line. A plurality of circuit elements (7) such as a transistor and a chip resistor are mounted on the periphery thereof to constitute a control circuit (11), a driver (13), an overcurrent detection circuit (14), and the like. The inverter circuit shown is configured.
【００１８】この発明の特徴とするところは、例えば上
記インバータ回路を構成するスイッチング素子に流れる
過電流を検出するための電流検出抵抗素子（５）にあ
る。即ち、電流検出用抵抗素子（５）を従来の如く、銅
箔又はＮｉメッキ、Ａｇペースト等の金属箔あるいはメ
ッキでなく個別単体部品の抵抗体部品を用いるところに
ある。更に、述べると、この抵抗体部品（５）は銅等の
金属片の一主面上に所望の抵抗パターン（５Ａ）が形成
される。具体的に述べると、金属片（５Ｂ）はその厚み
が約０．５〜２ｍｍ厚で、長さが約１０〜１５ｍｍサイ
ズの銅材が用いられ、その表面は銅の酸化を防止するた
めにニッケルメッキ処理が施されている。そして、その
一主面上には接着剤付きのポリイミド樹脂層（５Ｃ）を
介して所望形状の抵抗パターン（５Ａ）が形成される。A feature of the present invention is, for example, a current detection resistor element (5) for detecting an overcurrent flowing in a switching element constituting the inverter circuit. In other words, the current detecting resistance element (5) is different from the conventional one in that a copper foil, a Ni plating, a metal foil such as an Ag paste or a plating is used instead of a single resistor element. Furthermore, as described above, the resistor component (5) has a desired resistance pattern (5A) formed on one main surface of a metal piece such as copper. More specifically, the metal piece (5B) is made of a copper material having a thickness of about 0.5 to 2 mm and a length of about 10 to 15 mm, and its surface is formed to prevent oxidation of copper. Nickel plating is applied. Then, a resistance pattern (5A) having a desired shape is formed on one main surface thereof via a polyimide resin layer (5C) with an adhesive.
【００１９】この抵抗パターン（５Ａ）を構成する導電
材料は過電流検出を温度変化に関係することなく安定し
た状態で行うために、温度係数が極めて低い金属材料が
用いられている。温度変化に関係することなく安定した
電流検出を行うためには、抵抗パターン（５Ａ）の抵抗
温度係数を少なくとも１ｐｐｍ〜５００ｐｐｍの範囲内
の金属材料を用いることが好ましい。例えば、銅−ニッ
ケル合金でＣｕ５５％、Ｎｉ４５％の合金の抵抗温度係
数は１５ｐｐｍとなり、Ｃｕ５８％、Ｎｉ４２％の合金
の抵抗温度係数は略ゼロである。又、銅−マンガン合金
でＣｕ５０〜８５％、Ｍｎ１２〜３０％、Ｎｉ２〜１６
％の合金では抵抗温度係数は１ｐｐｍである。その他、
抵抗温度係数の低い合金としてはニッケル−クロム合金
がある。本実施例では、抵抗パターン（５Ａ）の材料と
して、上記した銅−マンガン合金が用いられている。As the conductive material constituting the resistance pattern (5A), a metal material having an extremely low temperature coefficient is used in order to perform overcurrent detection in a stable state regardless of a temperature change. In order to perform stable current detection irrespective of temperature change, it is preferable to use a metal material having a resistance temperature coefficient of the resistance pattern (5A) in a range of at least 1 ppm to 500 ppm. For example, the temperature coefficient of resistance of a copper-nickel alloy of 55% Cu and 45% Ni is 15 ppm, and the temperature coefficient of resistance of an alloy of 58% Cu and 42% Ni is substantially zero. In addition, a copper-manganese alloy is composed of Cu 50 to 85%, Mn 12 to 30%, Ni 2 to 16
% Alloy has a temperature coefficient of resistance of 1 ppm. Others
An alloy having a low temperature coefficient of resistance is a nickel-chromium alloy. In this embodiment, the above-described copper-manganese alloy is used as the material of the resistance pattern (5A).
【００２０】金属片（５Ｂ）上に形成される抵抗パター
ン（５Ａ）の抵抗値はパターン形状およびその膜厚によ
って所定の値に設定することができ、金属片（５Ｂ）の
サイズが５〜１０ｍｍ×０．５〜２ｍｍ×１０〜１５ｍ
ｍでは約１ｍΩ〜５０ｍΩの抵抗値を有する抵抗パター
ン（５Ａ）を金属片（５Ｂ）上に形成することができ
る。金属片（５Ｂ）の一主面全面には、ポリイミド樹脂
層を介して、所定の膜厚の上記した銅−マンガン合金が
貼着されており、その銅−マンガン合金を所望の形状に
エッチングすることで上記した抵抗値を有した抵抗パタ
ーン（５Ａ）を形成することができる。The resistance value of the resistance pattern (5A) formed on the metal piece (5B) can be set to a predetermined value according to the pattern shape and its film thickness, and the size of the metal piece (5B) is 5 to 10 mm. × 0.5-2mm × 10-15m
With m, a resistance pattern (5A) having a resistance value of about 1 mΩ to 50 mΩ can be formed on the metal piece (5B). The above-described copper-manganese alloy having a predetermined thickness is adhered to the entire surface of one main surface of the metal piece (5B) via a polyimide resin layer, and the copper-manganese alloy is etched into a desired shape. Thereby, the resistance pattern (5A) having the above-described resistance value can be formed.
【００２１】抵抗パターン（５Ａ）が延在される金属片
（５Ｂ）のコーナ部分には電流用ボンディングパッド
（５Ｄ）と電圧検出用ボンディングパッド（５Ｅ）がそ
れぞれ２個づつ形成される。本実施例では、両ボンディ
ングパッド（５Ｄ）（５Ｅ）が金属片（５Ｂ）のコーナ
部に設けられているが、電圧検出レベルを変更する場合
には金属片（５Ｂ）の中間部に設けられる場合もある。Two current bonding pads (5D) and two voltage detection bonding pads (5E) are formed at the corners of the metal piece (5B) where the resistance pattern (5A) extends. In this embodiment, both the bonding pads (5D) and (5E) are provided at the corners of the metal piece (5B). However, when changing the voltage detection level, they are provided at the middle part of the metal piece (5B). In some cases.
【００２２】このようにして形成された個別部品である
抵抗体（５）は導電路（３）の所望位置に半田等のろう
材を用いて固着搭載される。そして、抵抗体部品（５）
の近傍に形成された導電路（３）とワイヤー線によりボ
ンディング接続される。即ち、電流用ボンディングパッ
ド（５Ｄ）は約２００〜４００μｍ径のＡｌ線を用いて
パワー用の導電路（３Ａ）と接続され、電圧検出用ボン
ディングパッド（５Ｅ）は約４０〜６０μｍ径のＡｌ線
を用いて小信号用の導電路（３Ｂ）と接続される。両ボ
ンディングパッド（５Ｄ）（５Ｅ）上にはＡｌワイヤ線
のボンディング接続強度を向上させるためにＮｉメッキ
膜が設けられている。かかる小信号用の導電路（３Ｂ）
は図１からでは明らかにされないが過電流検出回路の一
部に延在接続され、スイッチング素子に過電流が流れた
場合に過電流検出回路に所定の電圧信号が印加され、ス
イッチング素子が破壊されるのを防止することができ
る。The resistor (5), which is an individual component formed in this manner, is fixedly mounted at a desired position of the conductive path (3) using a brazing material such as solder. And the resistor part (5)
Is connected by bonding to a conductive path (3) formed in the vicinity of. That is, the current bonding pad (5D) is connected to the power conductive path (3A) using an Al wire having a diameter of about 200 to 400 μm, and the voltage detection bonding pad (5E) is connected to an Al wire having a diameter of about 40 to 60 μm. Is connected to the small signal conductive path (3B). A Ni plating film is provided on both bonding pads (5D) and (5E) in order to improve the bonding connection strength of the Al wire. Conduction path for such small signal (3B)
Although it is not clear from FIG. 1, it is extended and connected to a part of the overcurrent detection circuit, and when an overcurrent flows through the switching element, a predetermined voltage signal is applied to the overcurrent detection circuit to destroy the switching element. Can be prevented.
【００２３】[0023]
【発明の効果】以上に詳述した如く、本発明に依れば、
抵抗体部品に形成される抵抗パターンの抵抗温度係数が
１ｐｐｍ〜５００ｐｐｍの範囲内の合金を用いているこ
とにより、温度変化が発生した場合であっても抵抗パタ
ーンの被抵抗値が温度変化にあまり影響されないために
極めて安定した電流検出を行うことが可能となる。その
結果、極めて信頼性のある混成集積回路装置を提供する
ことができ、そのメリットは大である。As described in detail above, according to the present invention,
By using an alloy whose resistance temperature coefficient of the resistance pattern formed on the resistor component is in the range of 1 ppm to 500 ppm, even if a temperature change occurs, the resistance value of the resistance pattern does not easily change with the temperature change. Since it is not affected, it is possible to perform extremely stable current detection. As a result, an extremely reliable hybrid integrated circuit device can be provided, and the merit thereof is great.
【００２４】また、本発明に依れば、電流検出を行う抵
抗体が個別部品であるために、同一サイズの抵抗体部品
であっても抵抗パターン形状で種々の抵抗値を得ること
ができることにより、導電路のパターン変更を行うこと
なく電流検出レベルの異なった混成集積回路装置を容易
に提供することができる。さらに、本発明に依れば、温
度補正回路が不要であるために温度に関係なく安定に制
御することができる。Further, according to the present invention, since the resistor for detecting the current is an individual component, various resistance values can be obtained in a resistance pattern shape even if the resistor component has the same size. A hybrid integrated circuit device having a different current detection level can be easily provided without changing the pattern of the conductive path. Further, according to the present invention, since a temperature correction circuit is not required, stable control can be performed regardless of the temperature.
【図１】本発明の混成集積回路装置を示す斜視拡大図で
ある。FIG. 1 is an enlarged perspective view showing a hybrid integrated circuit device of the present invention.
【図２】本実施例で用いられるインバータ回路図であ
る。FIG. 2 is an inverter circuit diagram used in the present embodiment.
【図３】電流検出用ブリッジ回路図である。FIG. 3 is a diagram of a current detection bridge circuit.
（１） 金属基板 （２） 絶縁樹脂層 （３） 導電路 （４） パワー素子 （５） 電流検出用抵抗体 (1) Metal substrate (2) Insulating resin layer (3) Conductive path (4) Power element (5) Current detection resistor
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.6，ＤＢ名) H01C 1/14,13/00 H05K 1/18 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 6 , DB name) H01C 1 / 14,13 / 00 H05K 1/18
Claims (3)
より形成された所望形状の導電路に抵抗素子を含む複数
の回路素子が接続された混成集積回路装置において、 前記抵抗素子は、金属片の一主面上に絶縁樹脂膜を介し
て所望形状の抵抗パターンが形成され、その抵抗パター
ンの延長線上に少なくとも２以上のボンディング用パッ
ドを有した抵抗体部品であって、前記抵抗体部品を前記
基板上に搭載し、前記抵抗体部品の近傍に延在された前
記導電路と前記抵抗体部品のボンディングパッドをワイ
ヤーボンディング接続したことを特徴とする混成集積回
路装置。1. A hybrid integrated circuit device in which a plurality of circuit elements including a resistive element are connected to a conductive path of a desired shape formed of copper foil on a metal substrate via an insulating resin layer, wherein the resistive element is A resistor component having a resistance pattern of a desired shape formed on one main surface of a metal piece via an insulating resin film, and having at least two or more bonding pads on an extension of the resistance pattern, A hybrid integrated circuit device comprising: a component mounted on the substrate; and a wire bonding connection between the conductive path extending near the resistor component and a bonding pad of the resistor component.
より形成された所望形状の導電路に電流検出用抵抗素子
を含む複数の回路素子が接続された混成集積回路装置に
おいて、 前記電流検出用抵抗素子は、金属片の一主面上に絶縁樹
脂膜を介して抵抗温度係数が約１ｐｐｍ〜５００ｐｐｍ
の合金材により所望形状の抵抗パターンが形成され、そ
の抵抗パターンの延長線上に少なくとも２以上の電流用
および電圧検出用のボンディングパッドを有した抵抗体
部品であって、前記抵抗体部品を前記基板上に搭載し、
前記抵抗体部品の近傍に延在された前記導電路と前記抵
抗体部品のボンディング用パッドをワイヤーボンディン
グ接続したことを特徴とする混成集積回路装置。2. A hybrid integrated circuit device in which a plurality of circuit elements including a current detection resistance element are connected to a conductive path having a desired shape formed of copper foil on a metal substrate via an insulating resin layer via an insulating resin layer, The resistance element for detection has a temperature coefficient of resistance of about 1 ppm to 500 ppm on one main surface of a metal piece via an insulating resin film.
A resistor pattern having a desired shape formed by the alloy material of claim 1 and having at least two or more current and voltage detection bonding pads on an extension of the resistance pattern, wherein Mounted on the
A hybrid integrated circuit device, wherein the conductive path extending near the resistor component and a bonding pad of the resistor component are connected by wire bonding.
より形成された所望形状の導電路に電流検出用抵抗素子
を含む複数の回路素子が接続された混成集積回路装置に
おいて、 前記電流検出用抵抗素子は、金属片の一主面上に絶縁樹
脂膜を介して抵抗温度係数が約１ｐｐｍ〜５００ｐｐｍ
の合金材により所望形状の抵抗パターンが形成され、そ
の抵抗パターンの延長線上で且つ前記金属片のコーナ部
に少なくとも２以上の電流用および電圧検出用のボンデ
ィングパッドが離間した状態で設けられた抵抗体部品で
あって、前記抵抗体部品を前記基板上に搭載し、前記抵
抗体部品の近傍に延在された前記導電路と前記抵抗体部
品のボンディング用パッドをワイヤーボンディング接続
したことを特徴とする混成集積回路装置。3. A hybrid integrated circuit device in which a plurality of circuit elements including a resistance element for current detection are connected to a conductive path of a desired shape formed of copper foil on a metal substrate via an insulating resin layer, The resistance element for detection has a temperature coefficient of resistance of about 1 ppm to 500 ppm on one main surface of a metal piece via an insulating resin film.
A resistance pattern having a desired shape is formed by the alloy material of the above, and at least two or more current and voltage detection bonding pads are provided on the extension of the resistance pattern and at the corners of the metal piece in a separated state. Wherein the resistor component is mounted on the substrate, and the conductive path extending near the resistor component and a bonding pad of the resistor component are connected by wire bonding. Hybrid integrated circuit device.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4229960A JP2869261B2 (en) | 1992-08-28 | 1992-08-28 | Hybrid integrated circuit device |
| KR1019930016750A KR100223504B1 (en) | 1992-08-28 | 1993-08-27 | Hybrid integrated circuit device |
| US08/114,329 US5469131A (en) | 1992-08-28 | 1993-08-30 | Hybrid integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4229960A JP2869261B2 (en) | 1992-08-28 | 1992-08-28 | Hybrid integrated circuit device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0677017A JPH0677017A (en) | 1994-03-18 |
| JP2869261B2 true JP2869261B2 (en) | 1999-03-10 |
Family
ID=16900407
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4229960A Expired - Fee Related JP2869261B2 (en) | 1992-08-28 | 1992-08-28 | Hybrid integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2869261B2 (en) |
-
1992
- 1992-08-28 JP JP4229960A patent/JP2869261B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0677017A (en) | 1994-03-18 |
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