JP2962945B2 - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JP2962945B2
JP2962945B2 JP4258376A JP25837692A JP2962945B2 JP 2962945 B2 JP2962945 B2 JP 2962945B2 JP 4258376 A JP4258376 A JP 4258376A JP 25837692 A JP25837692 A JP 25837692A JP 2962945 B2 JP2962945 B2 JP 2962945B2
Authority
JP
Japan
Prior art keywords
current
resistor
integrated circuit
hybrid integrated
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP4258376A
Other languages
Japanese (ja)
Other versions
JPH06112015A (en
Inventor
優助 五十嵐
良一 高橋
克実 大川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Denki Co Ltd
Original Assignee
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Denki Co Ltd filed Critical Sanyo Denki Co Ltd
Priority to JP4258376A priority Critical patent/JP2962945B2/en
Priority to KR1019930016750A priority patent/KR100223504B1/en
Priority to US08/114,329 priority patent/US5469131A/en
Publication of JPH06112015A publication Critical patent/JPH06112015A/en
Application granted granted Critical
Publication of JP2962945B2 publication Critical patent/JP2962945B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]

Abstract

PURPOSE:To obtain a hybrid integrated circuit device with which a current can be detected in a very stable manner against variation of temperature when an excessive current is detected and also a detected resistance value can be adjusted in accordance with the change of reference voltage. CONSTITUTION:On the current-detecting resistor element of a hybrid integrated circuit device on which a plurality of circuit elements 4 and 7, containing a current-detecting resistor element, are connected to the conductive path 3 formed on a metal substrate 1 through the intermediary of an insulating resin layer 2, a resistor part, provided with a resistance pattern 5A split-formed by an alloy material having the temperature coefficient of about 1 to 500ppm on one main surface of the metal piece 5B through the intermediary of a resin film 5C, is used. A plurality of voltage detecting pads 5E are provided on the resistance pattern 5A of the current detecting resistor element, and the conductive paths 3A and 3B extended to the vicinity of the resistor part, and the resistor part are connected by a wire.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は混成集積回路装置に関
し、特に抵抗温度係数が極めて低い合金材よりなる抵抗
体部品をワイヤーボンディング接続で混成集積回路基板
上に接続する混成集積回路装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit device, and more particularly to a hybrid integrated circuit device in which a resistor component made of an alloy material having an extremely low temperature coefficient of resistance is connected to a hybrid integrated circuit board by wire bonding.

【0002】[0002]

【従来の技術】従来、電流検出を行う手段の1としてブ
リッジ回路がある。この電流検出用のブリッジ回路は周
知の如く、ブリッジの平衡条件を利用して電流検出を行
うものであり、その回路について簡単に説明すると(図
3参照)、電流検出用の抵抗R 0(21)にある電流I0
が流れているとする。この電流I0の最大値が抵抗R
0(21)に流れたときにブリッジが平衡となる様に各
抵抗R1(22),R2(23),R3(25),R4(2
4)を設定する。このブリッジ回路の抵抗R0(21)
に電流I0の最大値以下の電流が流れたとするとコンパ
レータ(26)から「L」レベルの信号が出力され、抵
抗R0(21)に電流I0の最大値以上の電流が流れたと
するとコンパレータ(26)への入力の電圧が逆転し
「H」レベルの信号が出力され電流I0を遮断し回路を
保護する。
2. Description of the Related Art Conventionally, as one of means for detecting a current, a block
There is a ridge circuit. This current detection bridge circuit
As we know, current detection is performed using the balance condition of the bridge.
The circuit can be briefly described (Fig.
3), a resistor R for current detection 0Current I in (21)0
Is flowing. This current I0Is the maximum value of the resistance R
0Each bridge is balanced so that it flows to (21).
Resistance R1(22), RTwo(23), RThree(25), RFour(2
4) Set. The resistance R of this bridge circuit0(21)
Current I0If a current less than the maximum value of
The signal at the “L” level is output from the
Anti-R0(21) Current I0If the current that exceeds the maximum value of
Then, the voltage of the input to the comparator (26) reverses.
An "H" level signal is output and the current I0Cut off the circuit
Protect.

【0003】この様なブリッジ回路は特開昭53−97
470号公報に記載されている。上述のブリッジ回路を
混成集積回路基板上に搭載形成した場合、電流I0を検
出する電流検出抵抗R0の抵抗体としては、Niメッキ
抵抗が主として用いられている。しかしながら、Niメ
ッキは溶断電流が小さいので小さい電流の検出は行える
が大電流の検出を行う際には溶断電流を大とするために
抵抗体面積を大きくするかあるいは厚みを厚くしなけれ
ばならないので、基板実装面積の縮小、メッキ処理時間
が長くなるという問題があり、例えば40Aという大電
流を検出するのは略不可能とされていた。
Such a bridge circuit is disclosed in Japanese Patent Application Laid-Open No. 53-97.
470. When the above-described bridge circuit is mounted and formed on a hybrid integrated circuit board, a Ni plating resistor is mainly used as a resistor of the current detection resistor R 0 for detecting the current I 0 . However, Ni plating has a small fusing current, so a small current can be detected.However, when a large current is detected, the resistor area or the thickness must be increased in order to increase the fusing current. However, there is a problem that the substrate mounting area is reduced and the plating process time is prolonged, and it has been almost impossible to detect a large current of, for example, 40 A.

【0004】斯上の問題を解消するために電流検出抵抗
0の抵抗体溶断電流の大きい銅箔あるいはAgペース
トを用いることにより解消することができる。
The above problem can be solved by using a copper foil or an Ag paste having a large resistance fusing current of the current detection resistor R 0 .

【0005】[0005]

【発明が解決しようとする課題】溶断電流の大きいAg
ペーストあるいは銅箔を用いることで大電流を検出する
ことは可能である。確かに銅箔の比抵抗が0.5mΩ,
Agペーストの比抵抗37mΩと小さいので大電流を流
すことができる。しかしながら、Agペーストはペース
ト材にAgの粉末を混入しスクリーン印刷等により形成
するために抵抗面積が大きくなる問題があり、更に銅箔
をプリント基板上に形成し大電流を流すと熱によりプリ
ント基板が変形する問題点があった。
SUMMARY OF THE INVENTION Ag having a large fusing current
It is possible to detect a large current by using a paste or a copper foil. Certainly, the specific resistance of copper foil is 0.5mΩ,
Since the specific resistance of the Ag paste is as small as 37 mΩ, a large current can flow. However, since the Ag paste is formed by screen printing or the like by mixing Ag powder into the paste material, there is a problem that the resistance area becomes large. Further, when a copper foil is formed on a printed circuit board and a large current is applied, the printed circuit board is heated by heat. However, there was a problem of deformation.

【0006】また銅箔はエッチング時のサイドエッチン
グ及び銅箔の圧延工程での厚みのバラツキにより一定し
た抵抗が得られないので検出抵抗として用いることがで
きない問題点がある。更に銅箔及びAgペーストのTC
R(抵抗温度係数)が3800±200ppm及び21
50±150ppmと非常に高いので基板温度の変化に
対して抵抗のバラツキが極めて大きいため電流を正確に
検出することが行えない問題がある。かかる問題を解決
するためには別途温度補正用の補正回路が必要となり、
電流検出回路が複雑となる新たな問題が発生する。
[0006] In addition, the copper foil cannot be used as a detection resistor because a constant resistance cannot be obtained due to side etching at the time of etching and variation in thickness in a rolling step of the copper foil. TC of copper foil and Ag paste
R (temperature coefficient of resistance) 3800 ± 200 ppm and 21
Since it is as high as 50 ± 150 ppm, there is a problem that the current cannot be detected accurately because the variation in resistance with respect to a change in the substrate temperature is extremely large. In order to solve such a problem, a correction circuit for temperature correction is separately required,
A new problem arises in that the current detection circuit becomes complicated.

【0007】更に、銅箔を検出抵抗として用いる場合に
は、トリミング調整が困難であり、精度の優れた検出抵
抗を提供することが困難である。この発明は、上述した
課題に鑑みて為されたもので、この発明の目的は、抵抗
トリミング調整が容易で且つ温度変化に対しても極めて
安定した電流検出が基準電圧の変化に伴って検出抵抗値
を調整することができる混成集積回路装置を提供するこ
とを目的とする。
Further, when a copper foil is used as the detection resistor, trimming adjustment is difficult, and it is difficult to provide a detection resistor with excellent accuracy. SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems, and it is an object of the present invention to provide a current detecting device that can easily perform resistance trimming adjustment and that is extremely stable with respect to a temperature change. It is an object to provide a hybrid integrated circuit device whose value can be adjusted.

【0008】[0008]

【課題を解決するための手段】上述した課題を解決し、
目的を達成するため、この発明に係わる混成集積回路装
置は、金属基板上に絶縁樹脂層を介して銅箔により形成
された所望形状の導電路に電流検出用抵抗素子を含む複
数の回路素子が接続された混成集積回路装置の電流検出
用抵抗素子は、金属片の一主面上に絶縁樹脂膜を介して
抵抗温度係数が約1ppm〜500ppmの合金材を用
いて所望形状の抵抗パターンが形成され、その抵抗パタ
ーンの延長線上に複数の電流用ボンディングパッドおよ
び抵抗パターンを同一形状のままで抵抗値を異ならしめ
る一対の複数の電圧検出用ボンディングパッドを有した
抵抗体部品であって、抵抗体部品が搭載されるその近傍
に延材配置されたパワー用および小信号用導電路と前記
電流用ボンディングパッドおよび電圧検出用ボンディン
グパッドをワイヤーボンディング接続したことを特徴と
している。
Means for Solving the Problems The above-mentioned problems are solved,
In order to achieve the object, a hybrid integrated circuit device according to the present invention includes a plurality of circuit elements including a current detection resistance element in a conductive path having a desired shape formed of copper foil via an insulating resin layer on a metal substrate. The resistance element for current detection of the connected hybrid integrated circuit device has a resistance pattern of a desired shape formed on one main surface of a metal piece through an insulating resin film using an alloy material having a temperature coefficient of resistance of about 1 ppm to 500 ppm. A resistor component having a pair of a plurality of voltage detection bonding pads on the extension of the resistance pattern, the plurality of current bonding pads and the resistance pattern having the same shape and different resistance values. A power and small-signal conductive path and a current bonding pad and a voltage detection bonding pad, which are disposed in the vicinity of the component mounting area, are wired. It is characterized in that the bonding connection.

【0009】[0009]

【作用】以上のように構成される混成集積回路装置にお
いては、電流検出用抵抗体が部品となっているために、
抵抗体のトリミング調整を精度よく調整することができ
る。また、抵抗体部品に形成される抵抗パターンは抵抗
温度係数が約1ppm〜500ppmという極めて低い
合金材により形成されるために、温度変化に対して抵抗
値の変動がなく安定した電流検出を行うことができる。
In the hybrid integrated circuit device configured as described above, since the current detecting resistor is a component,
The trimming adjustment of the resistor can be accurately adjusted. Further, since the resistance pattern formed on the resistor component is formed of an extremely low alloy material having a temperature coefficient of resistance of about 1 ppm to 500 ppm, it is necessary to perform stable current detection without a change in resistance value with respect to a temperature change. Can be.

【0010】さらに、抵抗体部品上に形成される抵抗パ
ターンをそのままで抵抗値を異ならしめる一対の複数の
電圧検出用パッドを有しているために、1つの抵抗体部
品で種々の抵抗値を選択することができる。
[0010] Further, since there is a pair of a plurality of voltage detecting pads for varying the resistance value while keeping the resistance pattern formed on the resistor component, various resistance values can be obtained with one resistor component. You can choose.

【0011】[0011]

【実施例】以下に、図1に示した実施例に基づいて、本
発明の混成集積回路装置について詳述する。本発明の混
成集積回路装置は、図1に示す如く、金属基板(1)
と、その基板(1)上に貼着された絶縁樹脂層(2)
と、その樹脂層(2)上に形成された所望形状の導電路
(3)と、その導電路(3)に接続されたパワー半導体
素子(4)と、そのパワー半導体素子(4)に流れる電
流を検出する電流検出抵抗素子(5)とから構成され
る。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A hybrid integrated circuit device according to the present invention will be described below in detail with reference to the embodiment shown in FIG. As shown in FIG. 1, the hybrid integrated circuit device of the present invention comprises a metal substrate (1).
And an insulating resin layer (2) adhered on the substrate (1)
And a conductive path (3) having a desired shape formed on the resin layer (2), a power semiconductor element (4) connected to the conductive path (3), and flowing through the power semiconductor element (4). A current detection resistor element (5) for detecting a current.

【0012】金属基板(1)はアルミニウム、銅等の基
板が用いられ、この実施例においては、アルミニウム基
板が用いられている。このアルミニウム基板の表面に
は、図示されないが、酸化アルミニウム膜が形成されて
いる。尚、この酸化膜は形成しなくとも別に支障はな
い。この金属基板(1)の一主面上にエポキシ樹脂ある
いはポリイミド樹脂と銅箔とが一体化されたクラッド材
をホットプレス等の加圧手段を用いて貼着する。そし
て、銅箔を所望形状にエッチングし所望形状の導電路
(3)が形成される。この実施例で形成される導電路
(3)は図1からでは明らかにされないが、図2に示す
インバータ回路が形成されている。
As the metal substrate (1), a substrate made of aluminum, copper or the like is used. In this embodiment, an aluminum substrate is used. Although not shown, an aluminum oxide film is formed on the surface of the aluminum substrate. Note that there is no problem even if this oxide film is not formed. On one main surface of the metal substrate (1), a clad material in which an epoxy resin or a polyimide resin and a copper foil are integrated is attached by using a pressing means such as a hot press. Then, the copper foil is etched into a desired shape to form a conductive path (3) having a desired shape. Although the conductive path (3) formed in this embodiment is not apparent from FIG. 1, the inverter circuit shown in FIG. 2 is formed.

【0013】ところで、このインバータ回路は、インバ
ータ回路の負荷となるモータMの回転速度、回転方向等
のデータDIN並びに後述する過電流検出回路の信号を入
力してインバータ制御信号を生成する制御回路(11)
と、この制御回路(11)の信号出力および過電流検出
回路の信号入力のためのバッファ(12)と、インバー
タ回路を形成するスイッチング素子Q11〜Q16と、この
スイッチング素子Q11〜Q16をオン・オフ制御するドラ
イバ(13)と、慣流ダイオードD11〜D16と、電流検
出抵抗R0と、その抵抗R0の両端に接続された過電流検
出回路(14)とから構成される。
The inverter circuit receives a data D IN such as a rotation speed and a rotation direction of a motor M serving as a load of the inverter circuit and a signal of an overcurrent detection circuit described later to generate an inverter control signal. (11)
When a buffer (12) for the signal input of a signal output and the overcurrent detection circuit of the control circuit (11), the switching element Q 11 to Q 16 to form an inverter circuit, the switching element Q 11 to Q 16 the oN-oFF control driver (13), and慣流diode D 11 to D 16, a current detecting resistor R 0, is constructed from the connected across the resistor R 0 the overcurrent detection circuit (14) You.

【0014】その動作について簡単に説明する。マイク
ロコンピュータあるいはDSPにより構成される制御回
路(11)はD INとして入力される回転速度設定信号に
応じた周波数であって、それぞれ120度の位相差を有
する3つのパルス幅化正弦波とこのパルス幅化正弦波に
対してそれぞれ180度位相が遅れた3つのパルスを生
成する。
The operation will be briefly described. Microphone
Control circuit composed of a computer or DSP
Road (11) is D INThe rotation speed setting signal input as
Corresponding frequencies, each having a phase difference of 120 degrees.
Three pulse width sine waves and this pulse width sine wave
On the other hand, three pulses with a phase delay of 180 degrees are generated.
To achieve.

【0015】それぞれ120度の位相差を有する3つの
パルス幅化正弦波はバッファ(12)、ホトカプラPC
11〜PCinおよびドライバ(13)を介してインバータ
回路を形成する上側アームのスイッチング素子Q11,Q
13,Q15の制御電極に入力され、これらをオン・オフ制
御する。また、このパルス幅化正弦波に対してそれぞれ
180度位相が遅れたパルスは同様に下側アームのスイ
ッチング素子Q12,Q 14,Q16をオン・オフ制御する。
[0015] There are three types, each having a phase difference of 120 degrees.
Pulse width sine wave is buffer (12), photocoupler PC
11~ PCinAnd inverter via driver (13)
Switching element Q of upper arm forming circuit11, Q
13, QFifteenInput to the control electrodes of the
I will. Also, for each pulse width sine wave,
Pulses with a phase lag of 180 degrees are similarly switched on the lower arm.
Switching element Q12, Q 14, Q16On / off control.

【0016】従って、それぞれ120度の位相差を有す
る3つのパルス幅化正弦波とこのパルス幅化正弦波に対
してそれぞれ180度位相が遅れた3つのパルスにより
オン・オフ制御されるインバータ回路の出力端子、即ち
スイッチング素子Q11とQ12、スイッチング素子Q13
14、スイッチング素子Q15、Q16の接続点には3相の
パルス幅化正弦波電圧が得られ、モータMに流れる負荷
電流は正弦波に近似したものとなる。
Accordingly, an inverter circuit which is turned on / off by three pulse width sine waves each having a phase difference of 120 degrees and three pulses each 180 degrees out of phase with respect to this pulse width sine wave. output terminal, i.e. the switching element Q 11 and Q 12, the switching elements Q 13 and Q 14, the connection point of the switching elements Q 15, Q 16 obtained pulse width converted sinusoidal wave voltage three-phase load flowing through the motor M The current is similar to a sine wave.

【0017】モータの過負荷、直列スイッチング素子の
同時導通、その他に起因する過電流は抵抗R0および過
電流検出回路(14)により検出され、ホトカプラPC
10、バッファ(12)を介して制御回路(11)に入力
される。制御回路(11)はこの過電流検出信号に基づ
いて一定期間パルス出力を停止する等の保護動作を行
う。
An overcurrent caused by overload of the motor, simultaneous conduction of the series switching elements, and the like is detected by the resistor R0 and the overcurrent detection circuit (14), and the photocoupler PC
10 is input to the control circuit (11) via the buffer (12). The control circuit (11) performs a protection operation such as stopping the pulse output for a certain period based on the overcurrent detection signal.

【0018】上記インバータ回路のスイッチング素子と
しては、例えばパワートランジスタ、パワーMOSある
いはIGBT等の半導体素子(4)が用いられる。その
半導体素子(4)は銅等のヒートシンク材(6)を介し
て導電路(3)上に半田等のろう材により固着され、そ
の周辺に延在された導電路(3)と半導体素子(4)と
がワイヤー線によって接続される。そして、その周辺に
は制御回路(11)、ドライバ(13)および過電流検
出回路(14)等を構成するためにトランジスタ、チッ
プ抵抗等の複数の回路素子(7)が搭載され、図2に示
すインバータ回路が構成される。
As a switching element of the inverter circuit, for example, a semiconductor element (4) such as a power transistor, a power MOS or an IGBT is used. The semiconductor element (4) is fixed on the conductive path (3) with a brazing material such as solder via a heat sink material (6) such as copper, and the conductive path (3) extending around the periphery and the semiconductor element (4). 4) are connected by a wire line. A plurality of circuit elements (7) such as a transistor and a chip resistor are mounted on the periphery thereof to constitute a control circuit (11), a driver (13), an overcurrent detection circuit (14), and the like. The inverter circuit shown is configured.

【0019】この発明の特徴とするところは、例えば上
記インバータ回路を構成するスイッチング素子に流れる
過電流を検出するための電流検出抵抗素子(5)にあ
る。即ち、電流検出用抵抗素子(5)を従来の如く、銅
箔又はNiメッキ、Agペースト等の金属箔あるいはメ
ッキでなく個別単体部品の抵抗体部品を用いるところに
ある。更に、述べると、この抵抗体部品(5)は銅等の
金属片の一主面上に所望の抵抗パターン(5A)が形成
される。具体的に述べると、金属片(5B)はその厚み
が約0.5〜2mm厚で、長さが約10〜15mmサイ
ズの銅材が用いられ、その表面は銅の酸化を防止するた
めにニッケルメッキ処理が施されている。そして、その
一主面上には接着剤付きのポリイミド樹脂層(5C)を
介して所望形状の抵抗パターン(5A)が形成される。
A feature of the present invention is, for example, a current detection resistor element (5) for detecting an overcurrent flowing through a switching element constituting the inverter circuit. In other words, the current detecting resistance element (5) is different from the conventional one in that a copper foil, a Ni plating, a metal foil such as an Ag paste or a plating is used instead of a single resistor element. Furthermore, as described above, the resistor component (5) has a desired resistance pattern (5A) formed on one main surface of a metal piece such as copper. More specifically, the metal piece (5B) is made of a copper material having a thickness of about 0.5 to 2 mm and a length of about 10 to 15 mm, and its surface is formed to prevent oxidation of copper. Nickel plating is applied. Then, a resistance pattern (5A) having a desired shape is formed on one main surface thereof via a polyimide resin layer (5C) with an adhesive.

【0020】この抵抗パターン(5A)を構成する導電
材料は過電流検出を温度変化に関係することなく安定し
た状態で行うために、温度係数が極めて低い金属材料が
用いられている。温度変化に関係することなく安定した
電流検出を行うためには、抵抗パターン(5A)の抵抗
温度係数を少なくとも1ppm〜500ppmの範囲内
の金属材料を用いることが好ましい。例えば、銅−ニッ
ケル合金でCu55%、Ni45%の合金の抵抗温度係
数は15ppmとなり、Cu58%、Ni42%の合金
の抵抗温度係数は略ゼロである。又、銅−マンガン合金
でCu50〜85%、Mn12〜30%、Ni2〜16
%の合金では抵抗温度係数は1ppmである。その他、
抵抗温度係数の低い合金としてはニッケル−クロム合金
がある。本実施例では、抵抗パターン(5A)の材料と
して、上記した銅−マンガン合金が用いられている。
As the conductive material constituting the resistance pattern (5A), a metal material having an extremely low temperature coefficient is used in order to detect overcurrent in a stable state regardless of a temperature change. In order to perform stable current detection irrespective of temperature change, it is preferable to use a metal material having a resistance temperature coefficient of the resistance pattern (5A) in a range of at least 1 ppm to 500 ppm. For example, the temperature coefficient of resistance of a copper-nickel alloy of 55% Cu and 45% Ni is 15 ppm, and the temperature coefficient of resistance of an alloy of 58% Cu and 42% Ni is substantially zero. In addition, a copper-manganese alloy is composed of Cu 50 to 85%, Mn 12 to 30%, Ni 2 to 16
% Alloy has a temperature coefficient of resistance of 1 ppm. Others
An alloy having a low temperature coefficient of resistance is a nickel-chromium alloy. In this embodiment, the above-described copper-manganese alloy is used as the material of the resistance pattern (5A).

【0021】金属片(5B)上に形成される抵抗パター
ン(5A)の抵抗値はパターン形状およびその膜厚によ
って所定の値に設定することができ、金属片(5B)の
サイズが5〜10mm×0.5〜2mm×10〜15m
mでは約1mΩ〜50mΩの抵抗値を有する抵抗パター
ン(5A)を金属片(5B)上に形成することができ
る。金属片(5B)の一主面全面には、ポリイミド樹脂
層を介して、所定の膜厚の上記した銅−マンガン合金が
貼着されており、その銅−マンガン合金を所望の形状に
エッチングすることで上記した抵抗値を有した抵抗パタ
ーン(5A)を形成することができる。
The resistance value of the resistance pattern (5A) formed on the metal piece (5B) can be set to a predetermined value depending on the pattern shape and its film thickness, and the size of the metal piece (5B) is 5 to 10 mm. × 0.5-2mm × 10-15m
With m, a resistance pattern (5A) having a resistance value of about 1 mΩ to 50 mΩ can be formed on the metal piece (5B). The above-described copper-manganese alloy having a predetermined thickness is adhered to the entire surface of one main surface of the metal piece (5B) via a polyimide resin layer, and the copper-manganese alloy is etched into a desired shape. Thereby, the resistance pattern (5A) having the above-described resistance value can be formed.

【0022】抵抗パターン(5A)が延在される所定位
置には、電流用ボンディングパッド(5D)と電圧検出
用ボンディングパッド(5E)が形成される。電流用ボ
ンディングパッド(5D)は、抵抗パターン(5A)の
両端部に形成され、電圧検出用ボンディングパッド(5
E)は電流用ボンディングパッド(5D)が設けられた
中間部に複数個設けられる。即ち、電圧検出用ボンディ
ングパッド(5E)は抵抗パターン(5A)の検出抵抗
値を複数に異ならしめるように設けられている。更に述
べると、電圧検出用ボンディングパッド(5E)は抵抗
パターン(5A)上に所定の間隔で複数個設けられる。
その結果、抵抗体部品(5)上に形成される抵抗パター
ン(5A)を同一形状のままで、複数の検出抵抗値を備
えた抵抗体部品(5)となる。
A current bonding pad (5D) and a voltage detection bonding pad (5E) are formed at predetermined positions where the resistance pattern (5A) extends. The current bonding pads (5D) are formed at both ends of the resistance pattern (5A), and are connected to the voltage detection bonding pads (5D).
E) are provided in a plurality at the intermediate portion where the current bonding pads (5D) are provided. That is, the voltage detection bonding pad (5E) is provided so as to make the detection resistance value of the resistance pattern (5A) different from one another. More specifically, a plurality of voltage detection bonding pads (5E) are provided at predetermined intervals on the resistance pattern (5A).
As a result, the resistor component (5) having a plurality of detection resistance values is obtained while keeping the resistance pattern (5A) formed on the resistor component (5) in the same shape.

【0023】このようにして形成された個別部品である
抵抗体(5)は導電路(3)の所望位置に半田等のろう
材を用いて固着搭載される。そして、抵抗体部品(5)
の近傍に形成された導電路(3)とワイヤー線によりボ
ンディング接続される。即ち、電流用ボンディングパッ
ド(5D)は約200〜400μm径のAl線を用いて
パワー用の導電路(3A)と接続され、電圧検出用ボン
ディングパッド(5E)は約100〜300μm径のA
l線を用いて小信号用の導電路(3B)と接続される。
両ボンディングパッド(5D)(5E)上にはAlワイ
ヤ線のボンディング接続強度を向上させるためにNiメ
ッキ膜が設けられている。かかる小信号用の導電路(3
B)は図1からでは明らかにされないが過電流検出回路
の一部に延在接続され、スイッチング素子に過電流が流
れた場合に過電流検出回路に所定の電圧信号が印加さ
れ、スイッチング素子破壊を防止することができる。
The resistor (5), which is an individual component formed in this manner, is fixedly mounted at a desired position of the conductive path (3) using a brazing material such as solder. And the resistor part (5)
Is connected by bonding to a conductive path (3) formed in the vicinity of. That is, the current bonding pad (5D) is connected to the power conductive path (3A) using an Al wire having a diameter of about 200 to 400 μm, and the voltage detection bonding pad (5E) is connected to an A wire having a diameter of about 100 to 300 μm.
It is connected to the small signal conductive path (3B) using the l line.
A Ni plating film is provided on both bonding pads (5D) and (5E) in order to improve the bonding connection strength of the Al wire. Such a small signal conductive path (3)
B) is extended from and connected to a part of the overcurrent detection circuit, which is not evident from FIG. 1. When an overcurrent flows through the switching element, a predetermined voltage signal is applied to the overcurrent detection circuit, and the switching element is destroyed. Can be prevented.

【0024】本発明の抵抗体部品(5)では、上述した
ように1つの部品(5)上に同一の抵抗パターン(5
A)で複数の検出抵抗値を備えているために、1つの抵
抗体部品(5)で異種の検出抵抗値を選択することがで
き、抵抗体部品(5)を共通化して使用することができ
るメリットを有する。また、この抵抗体部品(5)を用
いることにより、検出回路で微小な誤差が生じた時に抵
抗体部品(5)へ電圧検出用ボンディングパッド(5
E)のボンディング位置を変化させて検出回路の基準電
圧に検出抵抗値を適合させて検出値を調整することがで
きる。例えば、電流が10Aで検出抵抗値が10mΩの
位置の電圧検出用ボンディングパッドで導電路と接続さ
れる抵抗体部品(5)がある場合、その検出抵抗から検
出される検出信号は0.1Vである。検出回路の一部で
基準電圧を0.1Vに回路構成をしなければならない場
合、その回路構成に用いられる個別部品の個有のバラツ
キから、基準電圧が0.11Vとなる場合がある。その
際に抵抗パターン(5A)に形成された他の電圧検出ボ
ンディング(5E)を用いてボンディング接続を行い検
出抵抗値を10mΩから11mΩに設定調整することに
より、10Aの電位を精度よく検出することができる。
In the resistor part (5) of the present invention, as described above, the same resistance pattern (5) is formed on one part (5).
Since a plurality of detection resistance values are provided in A), different detection resistance values can be selected with one resistor component (5), and the resistor component (5) can be used in common. It has the merit that can be done. Also, by using this resistor component (5), when a small error occurs in the detection circuit, the voltage detection bonding pad (5) is connected to the resistor component (5).
The detection value can be adjusted by changing the bonding position of E) to adapt the detection resistance value to the reference voltage of the detection circuit. For example, when there is a resistor component (5) connected to a conductive path at a voltage detection bonding pad at a position where the current is 10 A and the detection resistance value is 10 mΩ, the detection signal detected from the detection resistance is 0.1 V. is there. When a circuit configuration is required to set the reference voltage to 0.1 V in a part of the detection circuit, the reference voltage may be 0.11 V due to the individual variation of the individual components used in the circuit configuration. At that time, the potential of 10A is detected accurately by performing bonding connection using another voltage detection bonding (5E) formed on the resistance pattern (5A) and setting and adjusting the detection resistance value from 10 mΩ to 11 mΩ. Can be.

【0025】[0025]

【発明の効果】以上に詳述した如く、本発明に依れば、
抵抗体部品に形成される抵抗パターンの抵抗温度係数が
1ppm〜500ppmの範囲内の合金を用いているこ
とにより、温度変化が発生した場合であっても抵抗パタ
ーンの被抵抗値が温度変化にあまり影響されないために
極めて安定した電流検出を行うことが可能となる。その
結果、極めて信頼性のある混成集積回路装置を提供する
ことができ、そのメリットは大である。
As described in detail above, according to the present invention,
By using an alloy whose resistance temperature coefficient of the resistance pattern formed on the resistor component is in the range of 1 ppm to 500 ppm, even if a temperature change occurs, the resistance value of the resistance pattern does not easily change with the temperature change. Since it is not affected, it is possible to perform extremely stable current detection. As a result, an extremely reliable hybrid integrated circuit device can be provided, and the merit thereof is great.

【0026】また、本発明に依れば、電流検出を行う抵
抗体が個別部品であり且つ、抵抗パターンに複数の電圧
検出用パッドが設けられているために同一サイズの1つ
の抵抗体部品であっても種々の検出抵抗値を選択するこ
とができる。その結果、導電路のパターン変更を行うこ
となく電流検出レベルの異なった混成集積回路装置を容
易に提供することができる。
Further, according to the present invention, since the resistor for detecting the current is an individual component, and a plurality of voltage detecting pads are provided on the resistor pattern, the resistor is a single resistor of the same size. Even so, various detection resistance values can be selected. As a result, it is possible to easily provide a hybrid integrated circuit device having a different current detection level without changing the pattern of the conductive path.

【0027】さらに、本発明に依れば、温度補正回路が
不要であるために温度に関係なく安定に制御することが
できる。さらに本発明に依れば、上述したように抵抗体
部品に複数の電圧検出用パッドが設けられていることに
より、基準電圧値が微小に変化したとしても検出抵抗値
を調整することができる。その結果、極めて精度の優れ
た電流検出が可能な混成集積回路装置を提供することが
できる。
Further, according to the present invention, since a temperature correction circuit is not required, stable control can be performed regardless of the temperature. Further, according to the present invention, since a plurality of voltage detection pads are provided on the resistor component as described above, the detection resistance value can be adjusted even if the reference voltage value slightly changes. As a result, it is possible to provide a hybrid integrated circuit device capable of extremely accurate current detection.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の混成集積回路装置を示す斜視拡大図で
ある。
FIG. 1 is an enlarged perspective view showing a hybrid integrated circuit device of the present invention.

【図2】本実施例で用いられるインバータ回路を示す図
である。
FIG. 2 is a diagram showing an inverter circuit used in the embodiment.

【図3】電流検出用ブリッジ回路図である。FIG. 3 is a diagram of a current detection bridge circuit.

【符号の説明】[Explanation of symbols]

(1) 金属基板 (2) 絶縁樹脂層 (3) 導電路 (4) パワー素子 (5) 電流検出用抵抗体 (1) Metal substrate (2) Insulating resin layer (3) Conductive path (4) Power element (5) Current detection resistor

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H01C 1/14,13/00 H05K 1/05,1/18 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 6 , DB name) H01C 1 / 14,13 / 00 H05K 1 / 05,1 / 18

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 混成集積回路基板上の第1の絶縁樹脂層
を介して銅箔により形成された所望形状の導電路と、前
記導電路に電流検出抵抗素子を含む複数の回路素子が接
続された混成集積回路装置に於いて、 前記電流検出抵抗素子は、 金属片と、 前記金属片の一主面上に形成された第2の絶縁樹脂層
と、 前記第2の絶縁樹脂層上に形成され 所望形状の抵抗体
パターンに設けられた一対の電流用ボンディングパッド
と少なくとも2つの電圧検出用ボンディングパッドとを
有した抵抗体とにより構成され、 前記電流検出用抵抗素子が搭載されるその近傍には、一
対の第1の導電路と一対の第2の導電路が設けられ、 前記一対の第1の導電路と前記一対の電流用ボンディン
グパッドが金属細線にて接続され、 前記一対の第2の導電路と前記2つの電圧検出用ボンデ
ィングパッドが金属細線にて接続される事を特徴とした
混成集積回路装置。
1. A first insulating resin layer on a hybrid integrated circuit substrate
A conductive path of a desired shape formed by copper foil through
A plurality of circuit elements including a current detection resistance element are connected to the conductive path.
In the continuous hybrid integrated circuit device, the current detection resistance element includes a metal piece and a second insulating resin layer formed on one main surface of the metal piece.
And a resistor formed on the second insulating resin layer and having a desired shape.
A pair of current bonding pads provided on the pattern
And at least two voltage detection bonding pads
And a resistor near the mounting of the current detecting resistance element.
A pair of first conductive paths and a pair of second conductive paths are provided, and the pair of first conductive paths and the pair of current bondings are provided.
A pair of second conductive paths and the two voltage detecting bonds.
It is characterized in that the padding is connected by a thin metal wire
Hybrid integrated circuit device.
【請求項2】 前記抵抗体の温度係数は、約1〜500
ppmの合金材料より成る請求項1に記載の混成集積回
路装置。
2. The temperature coefficient of the resistor is about 1 to 500.
2. The hybrid integrated circuit as claimed in claim 1, wherein the hybrid integrated circuit is made of a ppm alloy material.
Road equipment.
JP4258376A 1992-08-28 1992-09-28 Hybrid integrated circuit device Expired - Fee Related JP2962945B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP4258376A JP2962945B2 (en) 1992-09-28 1992-09-28 Hybrid integrated circuit device
KR1019930016750A KR100223504B1 (en) 1992-08-28 1993-08-27 Hybrid integrated circuit device
US08/114,329 US5469131A (en) 1992-08-28 1993-08-30 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4258376A JP2962945B2 (en) 1992-09-28 1992-09-28 Hybrid integrated circuit device

Publications (2)

Publication Number Publication Date
JPH06112015A JPH06112015A (en) 1994-04-22
JP2962945B2 true JP2962945B2 (en) 1999-10-12

Family

ID=17319390

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4258376A Expired - Fee Related JP2962945B2 (en) 1992-08-28 1992-09-28 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JP2962945B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5523541B2 (en) * 2012-11-27 2014-06-18 三菱電機株式会社 Servo motor control device

Also Published As

Publication number Publication date
JPH06112015A (en) 1994-04-22

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