JPS63127559A - Hybrid integrated circuit - Google Patents

Hybrid integrated circuit

Info

Publication number
JPS63127559A
JPS63127559A JP61273213A JP27321386A JPS63127559A JP S63127559 A JPS63127559 A JP S63127559A JP 61273213 A JP61273213 A JP 61273213A JP 27321386 A JP27321386 A JP 27321386A JP S63127559 A JPS63127559 A JP S63127559A
Authority
JP
Japan
Prior art keywords
resistor
current
detection resistor
semiconductor element
power semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61273213A
Other languages
Japanese (ja)
Other versions
JPH0752764B2 (en
Inventor
Hisashi Shimizu
清水 永
Katsumi Okawa
克実 大川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP61273213A priority Critical patent/JPH0752764B2/en
Publication of JPS63127559A publication Critical patent/JPS63127559A/en
Publication of JPH0752764B2 publication Critical patent/JPH0752764B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612Auxiliary members for layer connectors, e.g. spacers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Abstract

PURPOSE:To detect large currents while directly detecting large currents flowing through a power semiconductor element, and to prevent the breakdown of the power semiconductor element by using one part of a conduction path formed to a metallic substrate as a current detecting resistor. CONSTITUTION:A conduction path 2 is shaped onto an insulating thin-layer formed onto a metallic substrate 1, and a low resistor section is shaped by utilizing one part of the conduction path 2 near a power semiconductor element 3 fixed onto the conduction path 2 and employed as a detecting resistor 4 for detecting large currents. Accordingly, large currents can be caused to flow through the detecting resistor 4 having low resistance, and heat is dissipated sufficiently even when the detecting resistor 4 generates heat by large currents while the deformation of the substrate 1 can he prevented.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明は混成集積回路に関し、特に低抵抗値の検出抵抗
を用いて電流検出を行う混成集積回路の改良に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Industrial Application Field The present invention relates to a hybrid integrated circuit, and more particularly to an improvement in a hybrid integrated circuit that detects current using a detection resistor with a low resistance value.

(ロ)従来の技術 従来、電流検出を行う手段の1としてブリッジ回路があ
る。この電流検出用のブリッジ回路は周知の如く、ブリ
ッジの平衡条件を利用して電流検出を行うものであり、
その回路について簡単に説明すると(第10図参照)、
電流検出用の抵抗R0(21)にある電流1.が流れて
いるとする。この電流1.の最大値が抵抗R,(21)
に流れたときにブリッジが平衡となる様に各抵抗RI(
22) 、 R1(23) 、 R、(25) 、 R
、(24)を設定する。このブリッジ回路の抵抗R6(
21)に電流I0の最大値以下の電流が流れたとすると
コンパレータ(26)からr L 、レベルの信号が出
力きれ、抵抗R,(21)に電流■。の最大値以上の電
流が流れたとするとフンパレータ(26)への入力の電
圧が逆転し「Hjレベルの信号が出力され電流1.を遮
断し回路を保護する。
(B) Prior Art Conventionally, a bridge circuit has been used as a means for detecting current. As is well known, this current detection bridge circuit detects current by utilizing the balance condition of the bridge.
To briefly explain the circuit (see Figure 10),
The current 1 in the current detection resistor R0 (21). Suppose that is flowing. This current 1. The maximum value of is the resistance R, (21)
Each resistor RI (
22), R1(23), R, (25), R
, (24) are set. Resistor R6 of this bridge circuit (
21), if a current less than the maximum value of the current I0 flows through the comparator (26), a signal at the level r L is no longer output, and a current ■ flows through the resistor R, (21). If a current exceeding the maximum value of is flowing, the voltage input to the humparator (26) is reversed, and a signal of Hj level is output, cutting off current 1 and protecting the circuit.

この様なブリッジ回路は特開昭53−97470号公報
に記載されている。
Such a bridge circuit is described in Japanese Patent Laid-Open No. 53-97470.

上述のブリッジ回路を厚膜ICに用いた場合、電流1.
を検出する抵抗R0の抵抗体にNiメッキが主として用
いられた。しかしながら、Niメツキは溶断電流が小さ
いので小さい電流の検出は行えるが大電流の検出を行う
際には溶断電流を犬とするために抵抗体面積を大きくす
るかあるいは厚みを厚くしなければならないので、基板
実装面積の縮小、メッキ処理時間が長くなるという問題
があり、例えば40Aという大電流を検出するのは略不
可能とされていた。
When the above-mentioned bridge circuit is used in a thick film IC, the current is 1.
Ni plating was mainly used for the resistor of the resistor R0 that detects the . However, since Ni plating has a small fusing current, it is possible to detect small currents, but when detecting large currents, the area or thickness of the resistor must be increased to minimize the fusing current. However, there are problems such as a reduction in the board mounting area and an increase in plating processing time, and it has been considered almost impossible to detect a large current of, for example, 40A.

斯上の問題を解消するために電流検出抵抗R0の抵抗体
溶断電流の大きい銅箔あるいはAgペーストを用いるこ
とにより解消することができる。
In order to solve this problem, it is possible to solve the problem by using copper foil or Ag paste, which has a large resistor fusing current of the current detection resistor R0.

(ハ)発明が解決しようとする問題点 溶断電流の大きいAgペーストあるいは銅箔を用いるこ
とで大電流を検出することは可能である。
(c) Problems to be Solved by the Invention It is possible to detect large currents by using Ag paste or copper foil, which has a large fusing current.

確かに銅箔の比抵抗が0.5mΩ、Agペーストの比抵
抗37mΩと小さいので大電流を流すことができる。し
かしながら、Agペーストはペースト材にAgの粉末を
混入しスクリーン印刷等により形成するために抵抗面積
が大きくなる問題があり、更に銅箔をプリント基板上に
形成し大電流を流すと熱によりプリント基板が変形する
問題点があった。
It is true that the copper foil has a small resistivity of 0.5 mΩ and the Ag paste has a small resistivity of 37 mΩ, so a large current can flow through it. However, since Ag paste is formed by mixing Ag powder into the paste material and forming it by screen printing, etc., there is a problem that the resistance area becomes large.Furthermore, if copper foil is formed on a printed circuit board and a large current is passed through it, the printed circuit board will be heated due to heat. There was a problem in that it deformed.

また銅箔はエツチング時のサイドエツチング及び銅箔の
圧延工程での厚みのバラツキにより一定した抵抗が得ら
れないので検出抵抗として用いることができない問題点
があった。更に銅箔及びAgペーストのTCR(抵抗温
度係数)が3800±200 ppm及び2150±1
50ppmと非常に高いので温度の変化に対して抵抗の
バラツキが大きいので電流を正確に検出することが行え
ない問題点があった。
Further, copper foil has the problem that it cannot be used as a detection resistor because a constant resistance cannot be obtained due to side etching during etching and variations in thickness during the rolling process of the copper foil. Furthermore, the TCR (temperature coefficient of resistance) of copper foil and Ag paste is 3800±200 ppm and 2150±1
Since the resistance is extremely high at 50 ppm, there is a large variation in resistance with respect to temperature changes, which poses a problem in that the current cannot be detected accurately.

(ニ)問題点を解決するための手段 本発明は上述した問題点に鑑みて成されたものであり、
第1図に示す如く、金属基板(1)上に形成された絶縁
薄層上に導電路(2)を形成し、その導電路(2)上に
固着されたパワー半導体素子(3)の近傍の導電路(2
)の一部を電流検出用の検出抵抗(4)として用いて電
流を検出する混成集積回路を提供するものである。
(d) Means for solving the problems The present invention has been made in view of the above-mentioned problems.
As shown in FIG. 1, a conductive path (2) is formed on a thin insulating layer formed on a metal substrate (1), and the vicinity of a power semiconductor element (3) fixed on the conductive path (2). conductive path (2
) is used as a detection resistor (4) for current detection to provide a hybrid integrated circuit that detects current.

(*)作用 本発明に依れば、金属基板(1)上の絶縁薄層上に形成
された導電路(2)の一部を電流検出用の検出抵抗(4
)として用いるので、低抵抗の検出抵抗(4)に大電流
を流すことができ、検出抵抗(4)が大電流により発熱
したとしても十分な放熱が行えると共に基板(1)の変
形を防止することができる。
(*) Function According to the present invention, a part of the conductive path (2) formed on the insulating thin layer on the metal substrate (1) is connected to the detection resistor (4) for current detection.
), a large current can be passed through the low-resistance detection resistor (4), and even if the detection resistor (4) generates heat due to the large current, sufficient heat dissipation can be achieved and deformation of the board (1) can be prevented. be able to.

(へ)実施例 以下に第1図乃至第3図に基づいて本発明の一実施例を
詳細に説明する。
(F) Embodiment An embodiment of the present invention will be described below in detail with reference to FIGS. 1 to 3.

第1図及び第2図に示す如く、本発明の混成集積回路は
金属基板(1)と、金属基板(1)上に形成された絶縁
薄層(5)と、絶縁薄層(5)上に形成された導電路(
2)と、導電路(2)上に固着されたパワー半導体素子
(3)と、パワー半導体素子(3)の近傍に形成された
導電路(2)の一部分を用いた検出抵抗R0(4)とか
ら構成される。
As shown in FIGS. 1 and 2, the hybrid integrated circuit of the present invention includes a metal substrate (1), an insulating thin layer (5) formed on the metal substrate (1), and an insulating thin layer (5) formed on the insulating thin layer (5). A conductive path formed in (
2), a power semiconductor element (3) fixed on the conductive path (2), and a detection resistor R0 (4) using a part of the conductive path (2) formed near the power semiconductor element (3). It consists of

金属基板(1)はアルミニウム基板が用いられ、その表
面は陽極酸化により酸化アルミニウム膜が形成される。
An aluminum substrate is used as the metal substrate (1), and an aluminum oxide film is formed on its surface by anodizing.

酸化アルミニウム膜が形成された金属基板(1)の−主
面にはエポキシ樹脂あるいはポリイミド樹脂等の樹脂で
絶縁薄層(5)が形成される。ここでは酸化アルミニウ
ム膜を形成したが金属基板(1)上に直接ポリイミド樹
脂等の絶縁薄層(5)を形成することも可能である。
An insulating thin layer (5) of resin such as epoxy resin or polyimide resin is formed on the main surface of the metal substrate (1) on which the aluminum oxide film is formed. Although an aluminum oxide film was formed here, it is also possible to form an insulating thin layer (5) of polyimide resin or the like directly on the metal substrate (1).

導電路(2)は金属基板(1)上の絶縁薄層(5)を介
して厚さ35μの銅箔が貼着され、ブリッジ回路を組む
様な所定のパターンにエツチング形成された後、ボンデ
ィングを行う部分にNiメッキが施される。
The conductive path (2) is formed by pasting a 35 μm thick copper foil on the metal substrate (1) via the insulating thin layer (5), etching it into a predetermined pattern to form a bridge circuit, and then bonding. Ni plating is applied to the parts where this is to be done.

導電路(2)上にはパワー半導体素子(3)や他の回路
素子例えばチップ抵抗、チップコンデンサー、モノリシ
ックIC等が固着形成され、ブリッジ回路を構成する導
電路(2)上には抵抗R1(6)′、R。
A power semiconductor element (3) and other circuit elements such as chip resistors, chip capacitors, monolithic ICs, etc. are fixedly formed on the conductive path (2), and a resistor R1 ( 6)', R.

(7) 、 R5(s) 、 R4(9) 、ダイオー
ド(10)及び集積IC(コンパレータ) (11)が
固着形成される。抵抗R1Rt、Rs、R4は抵抗ペー
ストのスクリーン印刷で形成され、ダイオード(10)
はチップ部品が用いられ、ブリッジ回路を構成する如く
、近傍の導電路(2〉上に超音波ボンディング等でボン
ディング接続される。
(7), R5(s), R4(9), a diode (10), and an integrated IC (comparator) (11) are fixedly formed. Resistors R1Rt, Rs, R4 are formed by screen printing of resistor paste, and diodes (10)
A chip component is used and is bonded to a nearby conductive path (2) by ultrasonic bonding or the like to form a bridge circuit.

ここでブリッジ回路の構成を具体的に説明すると、第3
図の如く、検出抵抗R11(4)と、検出抵抗R11(
4)と直列に接続された第3の抵抗RS(S)と、第1
の抵抗R,(6)と、第2の抵抗Rt(7)と、第2の
抵抗Rt(7)と直列に接続されたダイオードD(10
)と、第4の抵抗R4(9)と、第1及び第2の抵抗R
、(6)、 Rt(7)の接続点と第3及び第4の抵抗
R1(s) 、 R4(9)の接続点とに接続されたコ
ンパレータ(11)とから構成され、コンパレータから
r L 。
To specifically explain the configuration of the bridge circuit, the third
As shown in the figure, the detection resistor R11 (4) and the detection resistor R11 (
4) and a third resistor RS(S) connected in series with the first resistor RS(S).
a resistor R, (6), a second resistor Rt (7), and a diode D (10) connected in series with the second resistor Rt (7).
), the fourth resistor R4 (9), and the first and second resistors R
, (6), and a comparator (11) connected to the connection point of Rt(7) and the connection point of the third and fourth resistors R1(s) and R4(9), and rL from the comparator. .

レベルの信号が出力されたとき、パワー半導体素子(3
)に検出抵抗R@(4)を介して流れる大電流を遮断制
御する制御回路が構成される。
When a level signal is output, the power semiconductor element (3
) is configured with a control circuit that controls to cut off the large current flowing through the detection resistor R@(4).

第4図は制御回路を示す等価回路図であり、抵抗R6は
ブリッジ回路に設けられた電流検出用の検出抵抗R6(
4)である。今、フンパレータ(11)からr L 、
レベルの信号が出力されたとすると、トランジスタ’r
rt(ta)及びTry(17)がオンし、トランジス
タTr、(18)のベースに入力される信号がトランジ
スタ’rrt(t7)のコレクタにバイパスされ、トラ
ンジスタT r * (18)はオフする。トランジス
タT r s (1B )がオフすることにより、トラ
ンジスタTr、(19)がオフし大電流が遮断されパワ
ー半導体素子(3)が保護される。
FIG. 4 is an equivalent circuit diagram showing the control circuit, and the resistor R6 is a detection resistor R6 (
4). Now, r L from Hunparator (11),
If a level signal is output, the transistor 'r
rt(ta) and Try(17) are turned on, the signal input to the base of transistor Tr, (18) is bypassed to the collector of transistor 'rrt(t7), and transistor T r *(18) is turned off. When the transistor T r s (1B) is turned off, the transistor T r s (19) is turned off, the large current is cut off, and the power semiconductor element (3) is protected.

本発明の1つの特徴は検出抵抗Ro(4)に低抵抗の導
電路(2)の一部分を利用するところにあり、ここでは
パワー半導体素子(3)の近傍の点a−b間を検出抵抗
Re(4)に用いる。検出、抵抗R,(4)の近傍には
ブリッジ回路が形成され、更に検出抵抗Rゆ(4)の端
部には検出抵抗R6(4)を調整するためのカギ状の突
出部り12)が形成される。この突出部(12)は点a
−b間の検出抵抗R,(4)の抵抗の調整を行うもので
あり、以下その調整法について説明する。
One feature of the present invention is that a part of the low-resistance conductive path (2) is used as the detection resistor Ro (4). Used for Re(4). A bridge circuit is formed near the detection resistor R (4), and a key-shaped protrusion 12) is provided at the end of the detection resistor R (4) for adjusting the detection resistor R6 (4). is formed. This protrusion (12) is at point a
The resistance of the detection resistor R (4) between -b is adjusted, and the adjustment method will be described below.

突出部(12)と検出抵抗Re(4)とをNiメッキ等
の接続体(13)で接続する。ここで接続体(13)は
Niメッキが用いられるが、突出部(12)と検出抵抗
R@(4)とを接続するものであれば任意である。接続
体(12)で接続された部分の検出抵抗R,(4>の内
部抵抗は幅が広い為に略無視できる超低抵抗となり、検
出抵抗R@(4)全体の抵抗は接続体(13)で接続さ
れた距離、即ち、突出部(12)4!+の任意点Pいか
ら点aまでの内部抵抗と任意点f!1から点すまでの超
低抵抗値の内部抵抗の和である。
The protrusion (12) and the detection resistor Re (4) are connected by a connecting body (13) such as Ni plating. Here, Ni plating is used for the connecting body (13), but any type of connecting body can be used as long as it connects the protrusion (12) and the detection resistor R@(4). The internal resistance of the detection resistor R, (4>) in the part connected by the connection body (12) is very low and can be ignored due to its wide width, and the resistance of the entire detection resistance R@(4) is ), that is, the sum of the internal resistance of the protrusion (12) 4!+ from arbitrary point P to point a and the ultra-low internal resistance from arbitrary point f!1 to point a. be.

従って検出抵抗R#(4)の突出部oz)Lにおける任
意点!工を変化させることで検出抵抗R#(4)の抵抗
を調整することができる。即ち、接続体(12)のトリ
ミングスリット(14)距離で任意点2!が定まり、点
aから任意点!8までの距離の内部抵抗が検出抵抗Re
(4)の抵抗値となり微調整が容易に行える。
Therefore, any point on the protrusion oz)L of the detection resistor R#(4)! By changing the resistance, the resistance of the detection resistor R# (4) can be adjusted. That is, any point 2 at the trimming slit (14) distance of the connecting body (12)! is determined, any point from point a! The internal resistance of the distance up to 8 is the detection resistance Re.
The resistance value is as shown in (4), and fine adjustment can be easily made.

他の検出抵抗(4)の調整として第9図に示す如く、絶
縁体(13)にワイヤ(15)を用いて突出部(12)
の所定の位置と検出抵抗R@(4)とをボンディング接
続し任意点18を変化させて検出抵抗R6(4)の抵抗
を調整することができる。
To adjust the other detection resistor (4), as shown in FIG.
The resistance of the detection resistor R6(4) can be adjusted by bonding a predetermined position of the detection resistor R@(4) and changing the arbitrary point 18.

第5図は金属基板(アルミニウム)とプリント基板上に
導体を形成した際の導体幅と溶断電流との関係を表わす
特性図であり、今、厚さ35μ、導体幅llT11のと
きの溶断電流について見てみると金属基板の溶断電流が
約47Aに対しプリント基板の溶断電流は約12Aであ
る。プリント基板は放熱性が悪<3OA以上の大電流を
流す導体を形成す条には厚みと幅を大きく形成しなけれ
ばならずたとえ形成したとしたも大電流を流すことによ
り、その熱によって基板が変形する。それに対して本発
明は放熱良好な金属基板(1)上に導電路(2)を形成
し、その導電路り2)の一部分を検出抵抗R0(4)に
用いるため約4OAの大電流を流し発熱したとしても即
座に熱が放出される。
Fig. 5 is a characteristic diagram showing the relationship between conductor width and fusing current when a conductor is formed on a metal substrate (aluminum) and a printed circuit board. Looking at it, the fusing current for the metal substrate is about 47A, while the fusing current for the printed circuit board is about 12A. Printed circuit boards have poor heat dissipation properties.<Thickness and width must be large for the conductors that flow large currents of 3 OA or more. is deformed. In contrast, in the present invention, a conductive path (2) is formed on a metal substrate (1) with good heat dissipation, and a large current of about 4 OA is passed through a portion of the conductive path 2) for use as the detection resistor R0 (4). Even if it generates heat, it is immediately released.

また本発明は第1図に示す如く、金属基板(1)上にパ
ワー半導体素子(3)、検出抵抗RO(4)及びダイオ
ード<10)が形成されるので検出抵抗R,(4)とダ
イオード(10)との基板温度が同じになり、検出抵抗
R,(4)の温度変化に対する抵抗のバラツキを補正す
ることができる。
Furthermore, as shown in FIG. 1, the present invention has a power semiconductor element (3), a detection resistor RO (4), and a diode <10) formed on a metal substrate (1). The substrate temperature becomes the same as that of (10), and it is possible to correct variations in resistance of the detection resistor R and (4) due to temperature changes.

即ち、本発明のもう1つの特徴はブリッジ回路における
ダイオード(10)で検出抵抗R6(4)の温度変化に
対する抵抗のバラツキを補正することにある。ブリッジ
回路は上記で述べた如く形成される。
That is, another feature of the present invention is that the diode (10) in the bridge circuit corrects the variation in resistance of the detection resistor R6 (4) due to temperature changes. The bridge circuit is formed as described above.

以下にダイオードによる温度補正法の動作原理を説明す
る。
The operating principle of the temperature correction method using diodes will be explained below.

第2図においてツェナーダイオードでツェナー電圧v2
を一定にする(このときOvはツェナー電圧v2のアノ
ード側)。電流1.が検出抵抗R0に流れているときの
ブリッジ回路の中点電圧VllV、は以下の式で与えら
れる。
In Figure 2, the Zener voltage v2 at the Zener diode
(at this time, Ov is the anode side of the Zener voltage v2). Current 1. The midpoint voltage VllV of the bridge circuit when is flowing through the detection resistor R0 is given by the following equation.

上記(2)式はIE流I0の依存性があり、?!!流1
.が大のとき中点電圧V、は低い電圧となる。電流I0
が小さいときの中点電圧V、、V、はV I< V *
となり、電流■。が犬となりI o<&IAx>に到達
したとき中点電圧V、、V、はV、=V、と等しくなり
、このときコンパレータの出力は反転し電流工。が遮断
される。
The above equation (2) has a dependency on IE style I0, ? ! ! Style 1
.. When is large, the midpoint voltage V becomes a low voltage. Current I0
The midpoint voltage V, , V, when is small is V I < V *
Therefore, the current ■. When becomes a dog and reaches Io<&IAx>, the midpoint voltage V,,V, becomes equal to V,=V, and at this time, the output of the comparator is inverted and the current flow increases. is blocked.

検出抵抗R6の温度変化は第6図の如く、温度25℃の
とき抵抗値はr、。であり、これを式で表わすと下記の
如く与えられる。
The temperature change of the detection resistor R6 is as shown in FIG. 6, and when the temperature is 25° C., the resistance value is r. , and this can be expressed as the following formula.

Ro−roe(1+α(T−25))     ・−・
−・−・(3)ここでro。は25℃のCuパターン抵
抗値、αはCuのTCRである。上記(3)式を(2)
式に代入するとVよの温度変化が下記の如く与えられる
Ro-roe (1+α(T-25)) ・-・
-・-・(3) Ro here. is the Cu pattern resistance value at 25° C., and α is the TCR of Cu. Expression (3) above is converted to (2)
By substituting into the equation, the temperature change by V is given as follows.

・・・・・・(4) ダイオードの温度変化は第7図の如く、温度25°Cの
とき電圧■、はVDOであり、これを式で表わすと下記
の如く与えられる。
(4) The temperature change of the diode is as shown in FIG. 7. When the temperature is 25° C., the voltage (2) is VDO, which is expressed as the following equation.

Vb=Voo  d(T−25)       ・・・
−=(5)ここでβはP−N接合V、の温度変化量であ
り1つあたり約−2m’!//”Cである。上記(5)
式を(1)に代入するとV、の温度変化が下記の如く与
えられる。
Vb=Vood(T-25)...
-=(5) Here, β is the amount of temperature change of the P-N junction V, which is about -2 m' per one! //”C. Above (5)
By substituting equation (1) into equation (1), the temperature change of V is given as follows.

温度25°Cではl6=I@(MAX)における中点’
71: EE V 1゜■、はv1寓V、と等しいので
、中点電圧V l、 V *の温度変化量が等しければ
温度が変化しても1゜=Is<MAx>における中点電
圧V I= V *は成立する。
At a temperature of 25°C, l6 = midpoint at I@(MAX)'
71: EE V 1゜■ is equal to v1 V, so if the temperature change amount of the midpoint voltage V l, V * is the same, even if the temperature changes, the midpoint voltage V at 1° = Is<MAX> I=V* holds true.

先ず(4)式を温度Tで微分すると 次に(6)式を温度で微分すると 温度25℃における中点′WL圧V 、−V !を表わ
すと下記の如く与えられる。
First, if we differentiate equation (4) with respect to temperature T, then if we differentiate equation (6) with temperature, we get the midpoint 'WL pressure V, -V!' at a temperature of 25°C. can be expressed as follows.

比で並べかえると下記の如く2元連立方程式が与えられ
る。
When rearranged by ratio, a two-dimensional simultaneous equation is given as shown below.

上記(11)(12)式の方程式を解くと下記の如く与
えられる。
Solving the equations (11) and (12) above gives the following equations.

となる。(13)(14)式は初期定数であるからRA
IR8も定数でただひとつ決まることになる。従って(
13)(14)式の如く、RA、R11を定めれば中点
電圧V + ”” V tは温度変化に関係なく常に等
しくなり、第8図の如く、温度変化に関係すること無く
一定した電流を検出することができる。
becomes. Since equations (13) and (14) are initial constants, RA
IR8 is also determined by only one constant. Therefore (
13) As shown in equation (14), if RA and R11 are determined, the midpoint voltage V + "" V t will always be equal regardless of temperature changes, and as shown in Figure 8, it will remain constant regardless of temperature changes. Current can be detected.

(ト)発明の効果 以上に詳述した如く本発明に依れば金属基板に形成され
た導電路の一部分を電流検出抵抗として用いることによ
り、大電流の検出を行うことができる。またパワー半導
体素子に流れる大電流を直接検出することができパワー
半導体素子の破壊を助士することができる。
(G) Effects of the Invention As detailed above, according to the present invention, a large current can be detected by using a portion of the conductive path formed on the metal substrate as a current detection resistor. Furthermore, it is possible to directly detect a large current flowing through a power semiconductor element, thereby helping to destroy the power semiconductor element.

更に本発明は大電流を流したとしても金属基板によって
十分熱が放熱され基板の変形は全く生じ無い。
Furthermore, in the present invention, even when a large current is applied, heat is sufficiently dissipated by the metal substrate, so that no deformation of the substrate occurs.

更に本発明は銅箔より成る検出抵抗の端部に突出部を設
けることで検出抵抗の抵抗の微調整が行え保護回路を容
易に形成することができる。
Further, according to the present invention, by providing a protrusion at the end of the detection resistor made of copper foil, the resistance of the detection resistor can be finely adjusted and a protection circuit can be easily formed.

更に本発明では金属基板上に温度(TCR)補正用のダ
イオードを設けることにより、完全な温度補正が行えT
CRの大きい銅箔を検出抵抗として十分利用することが
できる。
Furthermore, in the present invention, complete temperature correction can be performed by providing a temperature (TCR) correction diode on the metal substrate.
Copper foil with a large CR can be fully utilized as a detection resistor.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例を示す平面図、第2図は第1図
のI−II断面図、第3図は本発明に用いるブリッジ回
路図、第4図は本発明に用いられる制御回路図、第5図
は導体幅と溶断電流に関する特性図、第6図は抵抗の温
度特性図、第7図は電圧の温度特性図、第8図は本発明
によって補正された検出電流の温度特性図、第9図は本
発明の他の実施例を示す平面図、第10図は従来のブリ
ッジ回路図である。 (1)・・・金属基板、 (2)・・・導電路、 (3
)・・・パワー半導体素子、 (4)・・・検出抵抗、
 (5)・・・絶縁薄層、 (6)(7)(8)(9)
・・・抵抗R,、R1、R1、R1(10)・・・ダイ
オード、(11)・・・コンパレータ、(12)・・・
突出部、 (13)・・・接続体、 (14)・・・ス
リット、(15)・・・ワイヤ、  (16)(17)
(18)(19)・・・トランジスタ。 出願人 三洋電機株式会社外1名 代理人 弁理士 西野卓嗣 外1名 第2図 第、3図 第5図 再イブトー寸噛しくmm ノ 第6図 第8図 r。 沫          0 第10図
FIG. 1 is a plan view showing an embodiment of the present invention, FIG. 2 is a sectional view taken along line I-II in FIG. 1, FIG. 3 is a bridge circuit diagram used in the present invention, and FIG. 4 is a control diagram used in the present invention. Circuit diagram, Fig. 5 is a characteristic diagram regarding conductor width and fusing current, Fig. 6 is a temperature characteristic diagram of resistance, Fig. 7 is a temperature characteristic diagram of voltage, and Fig. 8 is a temperature characteristic diagram of detected current corrected by the present invention. FIG. 9 is a plan view showing another embodiment of the present invention, and FIG. 10 is a conventional bridge circuit diagram. (1)... Metal substrate, (2)... Conductive path, (3
)...power semiconductor element, (4)...detection resistor,
(5)...Insulating thin layer, (6)(7)(8)(9)
...Resistance R,, R1, R1, R1 (10)...Diode, (11)...Comparator, (12)...
Projection, (13)... Connection body, (14)... Slit, (15)... Wire, (16) (17)
(18) (19)...Transistor. Applicant: SANYO Electric Co., Ltd. and one other agent Patent attorney: Takuji Nishino Water 0 Figure 10

Claims (1)

【特許請求の範囲】[Claims] (1)良熱伝導性の金属基板と、前記金属基板上に設け
られた絶縁薄層と、前記絶縁薄層上に銅箔より形成され
た所望形状の導電路と、前記導電路上に固着され負荷へ
の電源の供給を制御するためのパワー半導体素子と、前
記導電路のうち前記パワー半導体素子の近傍に延在され
た前記導電路の一部を用いて形成した低抵抗値の検出抵
抗とを具備し、前記検出抵抗を用いて前記パワー半導体
素子を流れる電流を検出することを特徴とする混成集積
回路。
(1) A metal substrate with good thermal conductivity, a thin insulating layer provided on the metal substrate, a conductive path of a desired shape formed of copper foil on the thin insulating layer, and a conductive path fixed on the conductive path. a power semiconductor element for controlling the supply of power to a load; a low resistance detection resistor formed using a part of the conductive path extending near the power semiconductor element; A hybrid integrated circuit, comprising: detecting a current flowing through the power semiconductor element using the detection resistor.
JP61273213A 1986-11-17 1986-11-17 Hybrid integrated circuit Expired - Lifetime JPH0752764B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61273213A JPH0752764B2 (en) 1986-11-17 1986-11-17 Hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61273213A JPH0752764B2 (en) 1986-11-17 1986-11-17 Hybrid integrated circuit

Publications (2)

Publication Number Publication Date
JPS63127559A true JPS63127559A (en) 1988-05-31
JPH0752764B2 JPH0752764B2 (en) 1995-06-05

Family

ID=17524674

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61273213A Expired - Lifetime JPH0752764B2 (en) 1986-11-17 1986-11-17 Hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPH0752764B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS517014U (en) * 1974-06-28 1976-01-19
JPS5875306A (en) * 1981-10-29 1983-05-07 Nec Corp Integrated circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS517014U (en) * 1974-06-28 1976-01-19
JPS5875306A (en) * 1981-10-29 1983-05-07 Nec Corp Integrated circuit

Also Published As

Publication number Publication date
JPH0752764B2 (en) 1995-06-05

Similar Documents

Publication Publication Date Title
US5399905A (en) Resin sealed semiconductor device including multiple current detecting resistors
JP2000353778A (en) Power semiconductor module
US5469131A (en) Hybrid integrated circuit device
JPH09210802A (en) Surface mount temperature-detecting element
JP2562652B2 (en) Inverter power IC protection circuit and hybrid integrated circuit in which the protection circuit is integrated
JPS63127559A (en) Hybrid integrated circuit
JPS63128656A (en) Hybrid integrated circuit
JP2680684B2 (en) Hybrid integrated circuit
JP6569693B2 (en) Electronic circuit and overheat detection method
JP2963944B2 (en) Shunt resistor for current detection
JP2006156913A (en) Printed wiring board
JP3114966B2 (en) DC stabilized power supply
JPS63128267A (en) Bridge circuit for current detection
JP2989390B2 (en) Hybrid integrated circuit device
JPS63128657A (en) Hybrid integrated circuit
JP2846776B2 (en) Hybrid integrated circuit device
JP2975778B2 (en) Hybrid integrated circuit device
JP2869261B2 (en) Hybrid integrated circuit device
JP2962945B2 (en) Hybrid integrated circuit device
JP3670593B2 (en) Electronic component using resistor and method of using the same
JPH06260730A (en) Printed wiring board
JPH0755502Y2 (en) Power transistor protector
JP3203157B2 (en) Hybrid integrated circuit device
JP2914679B2 (en) Hybrid integrated circuit device
JP2902871B2 (en) Hybrid integrated circuit device

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term