JPH033326A - Formation of polycrystalline silicon film in semiconductor device - Google Patents

Abstract

PURPOSE:To increase the efficiency of a wafer treatment ranging from a polycrystalline silicon film formation process to an impurity introduction process and to make it possible to lessen the variability of the sheet resistivity of a polycrystalline silicon film by a method wherein an amorphous silicon film is formed thinly and after the amorphous silicon film is formed into a polycrystal, the polycrystalline silicon film is formed up to a target film thickness and the like. CONSTITUTION:An amorphous silicon film of a thickness, which is set as a target, is formed on a substrate using a thermo-CVD method. Then, the amorphous silicon film is heated at a low temperature and is crystallized, whereby a polycrystalline silicon film of a large particle diameter is formed. In the formation method of such a polycrystalline silicon film in a semiconductor device, the above amorphous silicon film 3 is formed thinner than the above target thickness and after the amorphous silicon film is formed into a polycrystal, a silicon film 5 is further formed up to the film thickness which is set as the above target under the condition that the polycrystalline silicon film can be formed and as a result, an impurity is introduced in a large-particle diameter polycrystalline silicon film 6 of the obtained target thickness. For example, an amorphous silicon film 3 is formed on an insulating film 2, is heated at 600 to 700 deg.C and a polycrystalline silicon film 4 having a particle diameter of 0.1 to 5mum or thereabouts is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for forming a polycrystalline silicon film in a semiconductor device, and particularly relates to an improvement in a method for forming a large-grain polycrystalline silicon film.

(Prior art) Polycrystalline silicon, which contains impurities, can withstand high heat treatment temperatures compared to metal wiring materials such as aluminum, and can easily form an insulating film on its surface through heat treatment, so it can be used for various semiconductors. Electrodes of the device, e.g. MOS
It is used as a gate electrode of FET or as a wiring material.

The formation of the polycrystalline silicon film in a semiconductor device involves forming a polycrystalline silicon film on an insulating film formed on a substrate, transporting the substrate into a horizontal furnace in which multiple wafers are placed vertically, and removing impurities. This is carried out by introducing a gas into the furnace to form a compound containing impurities on the wafer surface, and solid-phase diffusion of the impurities into the polycrystalline silicon film.

For example, when attempting to diffuse phosphorus as an impurity into a polycrystalline silicon film, oxygen and phosphorus oxychloride gases are introduced into a horizontal furnace to form a glass film of phosphorus pentoxide on the polycrystalline silicon film. -Phosphorus was diffused in the same phase from this phosphorus pentoxide film into the polycrystalline silicon film.

At this time, the reaction of phosphorus oxychloride and oxygen to form phosphorus pentoxide on the surface of the polycrystalline silicon film is the rate-limiting supply of phosphorus oxychloride and oxygen, so this reaction does not occur uniformly on the silicon wafer. It turns out. For this reason, the amount of phosphorus diffused is large where the thickness of phosphorus pentoxide is large (,
On the other hand, the amount of phosphorus diffused is small where the thickness of phosphorus pentoxide is small, so phosphorus does not diffuse uniformly into the polycrystalline silicon film, resulting in uneven sheet resistance of the phosphorus-doped polycrystalline silicon film. This caused variations in device characteristics. For example, it is known that when 100 6-inch diameter silicon wafers are phosphorus-doped using a horizontal furnace, the variation in sheet resistance within the wafer plane reaches ±30%.

Therefore, as conventional examples for uniformly diffusing impurities into a polycrystalline silicon film to reduce the above-mentioned variation to about ±10%, for example, Utility Model Application No. 62-170628 and Utility Model Application No. 63-90829 are available. is proposed. This conventional
Improving variations in sheet resistance of polycrystalline silicon films by uniformly supplying impurity gas and carrier gas to a horizontal furnace that holds multiple wafers, or by creating a temperature difference in the longitudinal direction of the horizontal furnace. It is characterized by

However, even with these conventional examples, the effect of improving the variation in sheet resistance is small, and as a result of intensive study by the present inventors as described later, it was found that when the crystal grain size in the polycrystalline silicon film is large, impurities are absorbed by the polycrystalline silicon. It has been found that it is uniformly diffused into the film, reducing variations in sheet resistance.

By the way, as a method for forming a polycrystalline silicon film with large crystal grains, for example, Japanese Patent Laid-Open No. 63-42112 has been proposed.

In this conventional example, in order to obtain a polycrystalline silicon film with large crystal grains, a silicon film is first formed in an amorphous state, and then this amorphous silicon film is crystallized by a low-temperature heat treatment. As a result, a polycrystalline silicon film with large crystal grains is formed.

[Problem to be solved by the invention]

The conventional example of JP-A No. 63-42112 discloses various methods for forming an amorphous silicon film, but in order to avoid adverse effects on the device, the amorphous silicon film is It is desirable to form a silicon film. For example, when attempting to form an amorphous film using ionized St using the cluster ion beam method, for example, MO
It damages the oxide film of S FET, and it is difficult to control the silicon film when trying to form an amorphous film by vacuum evaporation, so thermal CV does not have these problems.
It is desirable to use method D.

However, when attempting to form an amorphous silicon film by thermal CVD, the film formation rate is significantly lowered to about 115 compared to the case of forming a polycrystalline silicon film, and a long film formation time is required.

Therefore, in order to obtain a polycrystalline silicon film with low sheet resistance, a series of steps are required to form an amorphous silicon film, turn it into a large-grain polycrystalline silicon film, and then introduce impurities into this polycrystalline silicon film. There is a problem in that the required time increases, and the wafer processing efficiency in the polycrystalline silicon film forming process and the impurity introduction process decreases significantly.

Therefore, in order to solve the above-mentioned problems, the present invention can increase the processing efficiency of wafers from the polycrystalline silicon film forming process to the impurity introduction process, and can reduce the variation in sheet resistance of the polycrystalline silicon film. . An object of the present invention is to provide a method for forming a polycrystalline silicon film in a semiconductor device.

(Means for Solving the Problems) In order to achieve the above object, the present invention forms an amorphous silicon film with a target thickness on a substrate using a thermal CVD method, and then In a method for forming a polycrystalline silicon film in a semiconductor device, the amorphous silicon film is heated to a low temperature and crystallized to form a polycrystalline silicon film with a large grain size. After polycrystallizing the amorphous silicon, a silicon film is further formed to the target thickness under conditions that allow formation of a polycrystalline silicon film, and as a result,
This method is characterized in that impurities are introduced into the obtained polycrystalline silicon film having a target thickness.

[Effect]

The deposition rate of polycrystalline silicon is significantly higher than that of amorphous silicon. By the way, when a polycrystalline silicon film is formed on a large-grain polycrystalline silicon film in the lower layer, even if the film is formed under the same conditions, no new crystal grains are generated, and the large-grain silicon in the lower layer is further removed. Silicon crystal grains grow as the silicon crystal grains grow.

Therefore, by forming an amorphous silicon film thinner than the target film thickness, polycrystallizing it to a large grain size, and forming a silicon film under conditions that form a polycrystalline silicon film on top of the amorphous silicon film, an amorphous silicon film can be formed. Since the film is thinner, the time required for film formation can be shortened.

In addition, even if impurities are solid-phase diffused into a large-grain polycrystalline silicon film, if the crystal grains are large, the sensitivity to changes in the amount of impurity diffusion will decrease, and the impurity will differ between areas where the amount of impurity diffusion is large and areas where the amount of impurity diffusion is small. The concentration becomes uniform. Therefore, it is possible to reduce variations in sheet resistance of the polycrystalline silicon film. Furthermore, even if impurities are introduced into the polycrystalline silicon film by ion implantation, if the silicon crystal grains become large, the impurities will be uniformly implanted into the polycrystalline silicon film. It is possible to reduce variations in sheet resistance.

Therefore, it is possible to increase the wafer processing efficiency from the polycrystalline silicon film forming process to the impurity introduction process, and to reduce the variation in sheet resistance of the polycrystalline silicon film.

〔Example〕

Next, examples of the present invention will be described.

FIG. 1 is a cross-sectional configuration diagram of a semiconductor device showing the steps of an embodiment of the present invention.

In the process shown in FIG. 1 (1), a 6-inch p-type or n-type silicon wafer 1 is carried into a thermal oxidation furnace, and S
ing insulating film 2 is formed.

Next, the process moves to step (2), and (1
The wafer from step ) is carried in, and an amorphous silicon film 3 is formed on the insulating film.

In this reduced pressure CVD apparatus, a plurality of the above wafers are placed in a quartz boat inside a quartz tube, exhaust is exhausted from one end of the quartz tube, and the pressure inside the quartz tube is reduced to around ITo r r.
The electric furnace that heats the quartz tube feeds silane, a reaction gas, from the opposite inlet, and the temperature inside the quartz tube reaches 60°C.
The wafer is heated to below 0°C.

Here, when forming the amorphous silicon film 3, it is desirable that the heating temperature be 600°C or less. When this temperature is exceeded, there is a strong tendency for a polycrystalline silicon film to be formed on the insulating film 2. Considering the deposition rate of the amorphous silicon film, it is particularly preferable to form the amorphous silicon film at a temperature in the range of 550 to 580°C.

By the way, the deposition rate of this amorphous silicon film 3 is 5~
14 people/min, which is much smaller than the deposition rate of 70 people/min when forming a polycrystalline silicon film by setting the heating temperature in the low-pressure CVD equipment above 600°C, for example about 620°C. It has become.

Therefore, the thickness of this amorphous silicon film should be less than the final target film thickness. However, if the amorphous silicon film thickness is less than 500, the crystal grains after recrystallization will Since the thickness of the amorphous silicon film becomes smaller (<0.17 zm) and it is difficult to form large-grain silicon crystals, it is preferable to set the amorphous silicon film thickness to the above value or more.

Next, move on to step (3), in which 600~
The wafer on which the amorphous silicon film 3 is formed is heated in a range of 700°C. At this time, silicon crystal grains grow using the microcrystals present in the amorphous silicon film 3 as nuclei, and become polycrystalline silicon with a large grain size. As a result, 0.1 to 5
A polycrystalline silicon film 4 having a grain size on the order of μm can be formed.

Here, if the heating temperature during polycrystallization is less than 600°C, the growth rate of crystal grains is slow, so the lower limit of the heating temperature during crystallization is preferably 600°C. On the other hand, when the temperature exceeds 700°C, new nuclei of silicon crystal grain growth are generated one after another in the amorphous silicon film, so the crystal grain density increases and the grain size of each crystal grain decreases. . Therefore, the upper limit of the heating temperature during crystallization is preferably 700"C. In particular, 600"C is preferable.
It is preferable that the temperature is ~650°C.

Next, proceeding to step (4), the silicon film 3 is formed on the polycrystalline silicon film 4 at a temperature exceeding 600° C. using the above CVD apparatus. At this time, since the film-forming temperature is higher than that when forming an amorphous silicon film, the film-forming rate increases.

By the way, in step (4), the polycrystalline silicon film 4
Even if a silicon film 5 is formed on top at a high film-forming temperature, this silicon film 5 does not separate from the underlying silicon film and form a new polycrystalline silicon film with fine grain size; A silicon film is formed so as to further grow the crystal grains of film 4, and becomes integrated with the underlying silicon film. Therefore, even in the step (4), a silicon film 5 with a large grain size is formed as is. In this case, even if the thickness of the amorphous silicon film is small, as in the case where the target film thickness (total of 40 films and 5 films) is all formed from amorphous silicon and then polycrystallized. Since a large-grain polycrystalline silicon film 6 having a target film thickness can be obtained, the time required for film formation can be significantly shortened.

Next, the wafer that has undergone step (4) is carried into a horizontal furnace,
Impurities were solid-phase diffused into the finally formed large-grain polycrystalline silicon film.

In this step, phosphorus oxychloride and oxygen, which are source gases, and nitrogen, which is chiaria gas, were used as impurity gases. And the temperature inside the horizontal furnace is 600-1000°
Heating was performed to a temperature of about C. By this heating, phosphorus, which is an impurity, can be diffused in a solid phase into the large-grain polycrystalline silicon film 6. The inventor of the present invention has conducted extensive studies on the variation in silicon crystal grain size and sheet resistance, and has found the following relationship between polycrystalline silicon grain size and sheet resistance variation, as shown in Figure 2. I understand.

According to FIG. 2, it can be seen that the larger the crystal grain size, the smaller the variation in sheet resistance. In particular, when the crystal grain size is 0.5 μm, the variation in sheet resistance is ±1
%.

Therefore, if a polycrystalline silicon film is formed from the beginning on an insulating film, the size of the crystal grains will be about 101 m, so the sheet resistance will vary widely. However, in the above example, the sheet resistance will vary because the crystal grains are large. Variations can be greatly reduced.

Next, specific examples will be described.

A polycrystalline silicon film 6 was formed according to the conditions shown in Table 1, the spacing between wafers in a horizontal furnace was varied, and the sheet resistance was measured after solid-phase diffusion of phosphorus. It was measured. The crystal grain size of the finally obtained polycrystalline silicon film was also measured. The conditions for phosphorus doping are that the wafer heating temperature is 850° C., the impurity gas flow rate is 200 cc/min of N2 gas containing POCl at 25° C., and 22/min of 02 gas. .

When measuring the sheet resistance, measurements were taken at 121 points at equal intervals in a portion 10 mm removed from the edge of a 6-inch wafer, and the average value of these measurements was taken as the sheet resistance value. Further, the variation in sheet resistance was calculated based on the following formula from the maximum and minimum values of the sheet resistance measured above.

±[(maximum value - minimum value)/2 x average value) x 100 (%) The above results are shown in Table 1.

(Left below) In Example 1, after forming amorphous silicon W43 on an insulating film and converting it into polycrystalline silicon, a silicon film 4 was further formed under conditions for forming a polycrystalline silicon film. There is. As a result, the final result was 4024 polycrystalline silicon films6
To obtain this, it only takes about 3 hours, including the time to polycrystallize the amorphous silicon. Furthermore, when the grain size of the polycrystalline silicon film finally obtained was measured, silicon crystals with a large grain size of as much as 0.85 μm were formed. As a result of the large particle size, the variation in sheet resistance was also extremely small, about ±3%.

Example 2.3 also obtained similar results.

On the other hand, in Comparative Example 1, the silicon film is entirely formed in an amorphous state from the beginning, and this is polycrystalized to form the final polycrystalline silicon film 6. In this example, it takes 295 minutes to form the amorphous silicon film, and it takes 1 hour at 700°C to polycrystallize the amorphous silicon film. As a result, even if the variation in sheet resistance is small, 400
A total of 355 minutes is required to obtain six polycrystalline silicon films. Comparing this time with the case of Example 1,
It is approximately twice as large. Therefore, it is demonstrated that the time required to form a silicon film can be significantly reduced by forming a thin amorphous silicon film, polycrystalizing it, and then further forming the film as in Examples 1 to 3.

Furthermore, even if Comparative Example 1 is compared with Examples 1 to 3, since large grain polycrystalline silicon can be obtained in Example as in Comparative Example 1, the degree of variation in sheet resistance is lower than that of Comparative Example. It's comparable.

Furthermore, in Comparative Example 2, after forming the amorphous silicon film 3, the polycrystalline silicon film 5 is formed without crystallizing it. In this example, since the amorphous silicon film 3 is not crystallized, the grain size of the polycrystalline silicon film 5 that is subsequently formed is small, and the variation in sheet resistance after phosphorus doping is ±
It has increased to 9%.

Furthermore, in Comparative Examples 3 to 5, the polycrystalline silicon film 6 is formed from the beginning without passing through the amorphous silicon film.
In this case, since the grain size of the polycrystalline silicon film formed similarly to Comparative Example 2 is small, the sheet resistance varies greatly. Therefore, in Comparative Example 4゜5, the wafer spacing during phosphorus doping is made larger than in Comparative Example 3 to improve the circulation of impurity gas to the wafers and to make the diffusion of impurities into the wafers as uniform as possible. However, even with this, it is impossible to improve the variation in sheet resistance. This fact proves that increasing the grain size of the polycrystalline silicon film is more important than uniformly supplying impurity gas to the wafer in order to improve sheet resistance variations.

In the above embodiment, the amorphous silicon film was formed by thermal CVD.
This is done using the D method, but when attempting to form an amorphous silicon film by generating Si ions, as in the cluster ion beam method or plasma CVD method, it damages the insulating film of the semiconductor element. By trying to avoid this. Furthermore, since it is difficult to control the thickness of the amorphous silicon film using the vacuum evaporation method, a thermal CVD method that does not have these problems is used.

In the above embodiment, the amorphous silicon film is formed by low pressure CVD, but the present invention is not limited thereto.

It is also possible to use the normal pressure CVD method, which is also a thermal CVD method.

Further, in the above embodiment, the in-phase diffusion of impurities into the polycrystalline silicon film is performed in a horizontal furnace, but the present invention is not limited to this, and the impurity gas may be introduced by arranging a plurality of wafers horizontally and vertically. It is also possible to carry out in a vertical furnace.

Furthermore, in the above embodiments, SiO□ is used as the insulating film formed on the substrate, but the invention is not limited to this; silicon nitride can also be used.

Further, in the above embodiment, phosphorus is used as an impurity to be diffused into the polycrystalline silicon film, but the impurity is not limited to this, and other impurities such as arsenic, antimony, boron, and indium can be used.

Further, in the embodiment, impurities are introduced by solid-phase diffusion, but the present invention is not limited to this, and even when the impurities are ion-implanted into a polycrystalline silicon film,
A polycrystalline silicon film with small variations in sheet resistance can be formed in a short time.

As a semiconductor device to which the present invention can be applied, MOS
In addition to FETs, there are many other types such as bipolar transistors.

Moreover, all the numerical values listed in the examples are examples, and other numerical values can also be selected without being limited thereto. By applying the present invention to such a semiconductor device and forming a polycrystalline silicon film, its sheet resistance becomes uniform, and as a result, variations in characteristics from element to element can be reduced.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to increase the processing efficiency of wafers from the polycrystalline silicon film forming process to the impurity introduction process, and to reduce the variation in sheet resistance of the polycrystalline silicon film.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional configuration diagram of a semiconductor device showing the steps of an embodiment of the present invention, and FIG. 2 is a characteristic diagram showing variations in crystal grain size and sheet resistance of a polycrystalline silicon film. In the figure, l is a silicon wafer, 2 is an insulating film, 3 is an amorphous silicon film, 4 is a polycrystalline silicon film obtained by crystallizing the amorphous silicon film in 3, and 5 is a polycrystalline silicon film formed on the polycrystalline silicon film 4. The polycrystalline silicon film 6 is a large-grain polycrystalline silicon film formed by combining films 4 and 5.

Claims (1)

[Claims] (1) Using thermal CVD, an amorphous silicon film with a target thickness is formed on a substrate, and then the amorphous silicon film is crystallized by heating at a low temperature to form large grains. In a method for forming a polycrystalline silicon film in a semiconductor device, the amorphous silicon film is formed to be thinner than the target thickness, and the amorphous silicon is polycrystallized; A silicon film is further formed to the target thickness under conditions that allow formation of a polycrystalline silicon film, and as a result, impurities are introduced into the polycrystalline silicon film having the target thickness. A method for forming a polycrystalline silicon film in a semiconductor device.