JPH033325A - Formation of polycrystalline silicon film in semiconductor device - Google Patents

Abstract

PURPOSE:To make it possible to attain a reduction in the sheet resistivity of a polycrystalline silicon film at the little amount of an impurity and in a short injection and treatment time by a method wherein an amorphous silicon film is formed on a substrate and the amorphous silicon film is heated in such a way that the heat-up speed of the film becomes a heat up speed of a specified value or higher at a silicon crystal grain growth starting temperature or higher. CONSTITUTION:As the formation method for a polycrystalline silicon film in a semiconductor device, in which the polycrystalline silicon film is formed on a substrate, an amorphous silicon film 3 is formed on the substrate and thereafter, the film 3 is heated in such a way that the heat-up speed of the film 3 becomes a heat-up speed of 90 deg.C/second or more at a silicon crystal grain growth starting temperature or higher. For example, an insulating film 2 consisting of SiO2 is formed on the surface of a silicon wafer 1, then, an amorphous silicon film 3 is formed on the film 2 in a thickness of 4000Angstrom at a substrate heating temperature of 600 deg.C or lower using a reduced CVD device. Then, the wafer 1 is carried in a heating device capable of heating rapidly, the film 3 is heated in such a way that the mean heat-up speed of the film 3 at a temperature of 500 to 1000 deg.C or thereabouts becomes a heat-up speed of 90 deg.C/second or more and the end point temperature of the heating is maintained for 10 seconds or more.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for forming a polycrystalline silicon film in a semiconductor device, and in particular, the present invention relates to a method for forming a polycrystalline silicon film in a semiconductor device. The present invention relates to a method for forming large-grain silicon.

[Conventional technology]

Conventionally, polycrystalline silicon containing impurities can withstand high heat treatment temperatures compared to metal wiring materials such as aluminum, and can easily form a tlA film on its surface through heat treatment, so it has been used as an electrode for various semiconductor devices. For example, MOS
It is used as a gate electrode of FET or as a wiring material.

The polycrystalline silicon film is conventionally often formed by the following method. That is, a silicon film in a polycrystalline state is formed on a substrate, and then a glass film containing impurities is formed on the surface of the polycrystalline silicon film. By solid-phase diffusion of impurities from this glass film into the polycrystalline silicon film, the sheet resistance of the polycrystalline silicon film is reduced, and then etching or the like is performed to complete the formation of electrodes, wiring, etc.

By the way, in recent years, due to the demand for higher integration of semiconductor devices, semiconductor elements are formed finely to control the impurity profile in the substrate.
(threshold voltage) needs to be controlled.

However, in the conventional method of solid-phase diffusion of impurities into a polycrystalline silicon film as described above, processing at high temperatures and for a long time is required, making it difficult to control the impurity profile.

Therefore, when introducing impurities into the polycrystalline silicon film,
Ion implantation is used because it requires heat treatment at low temperatures and in a short time.

This ion implantation method involves forming a polycrystalline silicon film on a semiconductor substrate, and then implanting impurity ions into the polycrystalline silicon film. Heat treatment is performed to electrically activate impurity atoms that are inactive in the first place so that they occupy regular lattice positions.

According to such an ion implantation method, the impurity atoms enter into the silicon crystal and become the acceptor atoms or donor atoms, which is what is called impurity activation. As a result, by reducing the sheet resistance of the polycrystalline silicon film, the gate electrode or wiring of the MOS FET is completed.

[Problem to be solved by the invention]

However, Journal of Applied
Physics.

(Journal Saipu 7 Bright Physics)
Vol, 46. No, 12. December 197
5 pp., 5247-5254, in the conventional method of ion-implanting impurities into polycrystalline silicon films, impurities segregate between the silicon crystal grains of polycrystalline silicon, and the At impurity concentrations up to This will require high-temperature heat treatment.

As a result, in order to activate the impurities and obtain the desired sheet resistance, it is necessary to implant more impurities than are segregated. For example, since this indicates that it is necessary to do so, there is a problem that, for example, the time required for impurity implantation processing becomes longer.

Therefore, in this invention, due to the high activation rate of impurities,
It is an object of the present invention to provide a method for forming a polycrystalline silicon film in a semiconductor device, which can achieve low sheet resistance of the polycrystalline silicon film with a small amount of impurities and a short implantation processing time.

[Means to solve the problem]

In order to solve the above object, the present invention provides a method for forming a polycrystalline silicon film in a semiconductor device in which a polycrystalline silicon film is formed on a substrate, in which a first step of forming an amorphous silicon film on the substrate is provided. and a second step of heating the amorphous silicon film at a temperature equal to or higher than the silicon grain growth start temperature at a temperature increase rate of 90° C./sec or higher,
The method is characterized in that the amorphous silicon is crystallized.

[Effect]

According to the first step, an amorphous silicon film containing microcrystals is formed on the substrate. Then, in the second step,
When this amorphous silicon film is heated to a temperature higher than the silicon crystal grain growth start temperature and at a heating rate of 90°C/second or higher, nuclei for silicon crystal grain growth are generated, which grow to form silicon crystal grains. As a result, silicon crystal grains grow until they collide with adjacent crystal grains. As a result, the amorphous silicon film becomes a large-grain polycrystalline silicon film.

At this time, if the temperature increase rate is extremely high at 90°C/second or more,
When comparing the generation rate of silicon grain growth nuclei with the growth rate of silicon crystal grains, the latter is significantly superior, so in such a heating environment, it is difficult to generate many nuclei one after another. , silicon grains grow rapidly based on a small number of nuclei. As a result, since the density of the crystal grains becomes smaller, the time it takes for the crystals to collide with adjacent crystals becomes longer, and since this long crystal growth time can be secured, each crystal grain becomes larger. As a result, a polycrystalline silicon film with large crystal grains having a grain size ranging from 1 μm to 511 m can be formed.

As the crystal grains in the polycrystalline silicon film become larger, the volume occupied by the voids existing between the crystal grains becomes smaller compared to the case of a polycrystalline silicon film with small crystals. When this volume becomes smaller, the amount of impurities that are segregated between crystal grains and are not activated becomes smaller. Therefore, according to the invention:
By reducing the amount of inactive impurities, the activation rate of impurities can be improved as a result.

As a result, even if the amount of impurity implanted is reduced, the sheet resistance can be lowered, and the processing time for impurity implantation can be reduced.

The reason why the temperature increase rate above the silicon crystal grain growth starting temperature when crystallizing an amorphous silicon film is set to 90°C/sec or more is because if it is less than this value, the growth rate of silicon crystal grains will be lower than the However, the speed at which new nuclei are generated becomes superior, and new nuclei for silicon crystal growth are generated one after another, so each crystal grain becomes smaller due to the presence of many nuclei. As a result, the volume occupied by the voids between grains increases, and the amount of impurities segregated in these voids also increases. Therefore, in order to reduce the amount of segregated impurities and improve the activation rate of impurities, the temperature increase rate was limited as described above.

〔Example] Next, examples of the present invention will be described.

FIG. 1 is a cross-sectional configuration diagram of a semiconductor device showing the steps of the embodiment of the present invention.

In the process shown in FIG. 1(1), a 6-inch p-type or n-type silicon wafer 1 is carried into a thermal oxidation furnace, and an insulating film 2 of SiO□ is formed on the wafer surface.

Next, in step (2), an amorphous silicon film 3 having a thickness of 4,000 wafers was formed on the insulating film 2 using a low pressure CVD apparatus.

When forming this amorphous silicon film 3, the silicon wafer 1 on which the insulating film 2 has been formed is carried into an electric furnace at 500° C., the pressure inside the furnace is reduced to around 1 Torr, and silane gas is introduced from the inlet hole. (SiH,) was supplied into the furnace.

Through this treatment, amorphous silicon l! without a crystal structure is formed on the insulating film 2! ! 3 can be formed.

By the way, the substrate heating temperature in the low pressure CVD method is 600℃.
When the temperature exceeds °C, the silicon film formed on the insulating film becomes polycrystalline with fine crystals, so the substrate heating temperature is 600 °C.
It is preferable that it is C or less.

Desirably, the temperature is preferably within the range of 500 to 580°C.

Next, after the step shown in FIG. 1 (2), the silicon wafer is
The amorphous silicon film 3 is transferred to a heating device capable of rapid heating, and heated so that the average temperature increase rate from 500°C to around 1000°C is 90°C/sec or more, and the heating end point temperature is 10°C. It lasted for more than a second.

Note that heating below 500°C does not generate nuclei for silicon grain growth in the non-silicon film, so the heating rate up to 500°C is not particularly limited in forming a large-grain polycrystalline silicon film.

Figure 2 shows a 4,000-layer amorphous silicon film 3 formed on an insulating film 2 up to 1,000'C at a heating rate of 10
The average crystal grain size of crystallized silicon is shown after heating at a temperature varying from °C/sec to 200 °C/sec, holding this temperature for 10 seconds, and cooling.

As understood from FIG. 2, it can be seen that when the temperature increase rate is 90'C/sec or more, the crystal grain size increases rapidly. In particular, it is understood that the average crystal grain size becomes significantly larger at 100°C/sec or more, so the heating rate should be 100°C/sec or more.
/second or more is preferable.

Therefore, by heating at a rate exceeding 90°C/sec, the volume occupied by the voids between the grains can be reduced compared to when a polycrystalline silicon film is formed from the beginning due to the large crystal grain size. I can do it. Therefore, the amount of impurities segregated between these grains can be reduced, and the activation efficiency of impurities can be improved.

However, heating at less than 90° C./second makes it difficult to form large silicon crystal grains.

This is because if the temperature increase rate is less than the above value, new nuclei for crystal grain growth will occur, and the crystal grain density will become thicker, causing each crystal grain to become thicker. (This is to restrict growth.

Figure 3 shows that after 4,000 silicon films were formed in an amorphous state by the process shown in Figure 1 (2) above, the heating rate was increased to 100°C.
/second constant, heating end temperature 800~1300''C
The graph shows the average grain size of the polycrystalline silicon film obtained by changing the temperature to 100 nm, holding it for 10 seconds after reaching this temperature, and cooling it.

As can be understood from this Figure 3, the heating end point temperature is 90
By setting the temperature to around 0''C, a polycrystalline silicon film having a large grain size of about 1.0 μm can be obtained. Therefore, it is preferable that the heating end point temperature is 900°C or higher.

In the above embodiment, various heating devices capable of rapid heating for converting an amorphous silicon film into a large-grain polycrystalline silicon film are not particularly limited, such as an electric furnace, a thermal heating furnace, and a light heating furnace. You can use the following. For example, it is possible to adopt a type in which a wafer on which an amorphous silicon film is formed is heated from above and below using high-output infrared lamps.

The amorphous silicon film 3 formed in the step (2) of FIG.
As shown in Table 1, the heating rate from 500°C and the heating end point temperature were varied to crystallize amorphous silicon to form a polycrystalline silicon film, and the accelerating voltage was increased to 100°C.
The key is to use a dose of 4XlO''/P ions, which are impurities.
Ions were implanted for d, and then heat treatment (annealing) was performed at 800° C. for 30 minutes to activate the impurities. According to this impurity ion implantation process, the impurity concentration in the polycrystalline silicon film becomes I x 1018/ci.

Next, the sheet resistance 07 value after impurity implantation was measured. The sheet resistance value is 10m from the edge of a 6 inch wafer.
Measurements were taken at 121 points at equal intervals in the area excluding m, and the values were averaged.

The measurement results are shown in Table 1. In addition, the crystal grain size is also the first
Shown in the table. Note that the smaller the value of the sheet resistance, the more impurity atoms occupy regular lattice positions in the silicon crystal and the greater the degree to which the impurities are activated.

Table 1 shows, for reference, the sheet resistances of a comparative example in which the heating rate was outside the range of the present invention and a comparative example in which a polycrystalline silicon film was formed without passing through amorphous silicon.

(Hereinafter, blank spaces) In Table 1, in Examples 1 to 6, when crystallizing amorphous silicon to form large-grain polycrystalline silicon, the heating rate was 90°C/second or more, and the final The heating temperature is also 10
Since the temperature is 00° C. or higher, polycrystalline silicon having a large grain size of 1.0 μm or more can be formed. and,
When the sheet resistance was measured for each of Examples 1 to 6, the sheet resistance in all cases was smaller than that of the comparative example described below. This is because the crystal grains of the silicon film are large, so the volume occupied between the crystal grains is also reduced.
When impurity ions are implanted, the amount of impurities segregated between crystal grains is small, indicating that the impurity activation efficiency is high even at a low impurity concentration of I x 10 ''/cd.

On the other hand, in Example 7, the temperature increase rate was 90°C/
Even for values of seconds or more, it is shown that the lower the heating end point temperature, the higher the sheet resistance value. This is because when the final heating temperature is about 850°C, the crystal grain size becomes smaller compared to when the heating end point temperature is about 900°C, so the occupied volume between crystal grains increases and activation occurs. This is because the proportion of impurities that are removed is reduced.

On the other hand, in Comparative Example 1, the heating end point temperature was 1100.
Although the temperature is as high as °C, the heating rate is as low as 80"C/sec, so new silicon grain growth nuclei are generated one after another in the amorphous silicon during heating, increasing the crystal density. Thus, the silicon crystal grains become smaller.As a result, the occupied volume between the crystal grains becomes larger, and the impurity activation rate also becomes a lower value compared to the above embodiment.

In addition, in Comparative Example 2, the heating end point temperature is low, so the degree of crystal grain growth is not sufficient, so the crystal grain size is inevitably small as in Comparative Example 1, and as a result, the sheet resistance is also small. value.

In Comparative Example 3, polycrystalline silicon is formed on the insulating film 2 instead of amorphous silicon. At this time, the temperature increase rate was set to 110°C/sec as fast as in the example,
Even if the heating end point temperature is as high as 1100°C, in order to increase the silicon grain size by heating a polycrystalline silicon film, it is necessary to diffuse silicon atoms across the barriers that exist between crystal grains. Therefore, the crystal grain growth ability is significantly smaller than when amorphous silicon is made to have a large grain size. the result,
Since the number of crystal grains remains large, the crystal grain size decreases, and the volume occupied between grains is large, the activation rate of impurities is low and the sheet resistance is also a small value.

Note that when producing amorphous silicon, since such a barrier does not exist, crystal grains can be grown by heating.

In Comparative Example 4, a polycrystalline silicon film is formed in the same manner as Comparative Example 3, but heat treatment for crystal grain growth is not performed.
There are many crystal grains with small grain sizes, and the amount of impurities segregated between the crystal grains increases.

As a result, the sheet resistance becomes the largest value.

According to the above example, since the temperature increase rate is extremely high, when forming a large-grain polycrystalline silicon film, the non-silicon film is heated at a low temperature (500 to 650°C) for a long time (more than ten hours). Amorphous silicon can be crystallized in an extremely short time compared to the case where silicon crystals are grown by heating over a long period of time.

In the above embodiment, the amorphous silicon film 3 is formed on the insulating film 2 by low pressure CVD, but the method is not limited to this, and ordinary CVD or plasma CVD can be used.

It is also possible to form an amorphous silicon film by a vacuum evaporation method, a cluster ion beam method, or the like.

Furthermore, although Stow is used as the insulating film 2, Si
3N can also be formed on the substrate to serve as an insulating film.

Further, although the amorphous silicon film is formed with a thickness of 4000 layers, the present invention is not limited to this, and a non-silicon film may be formed with a thickness in the range of 2000 to 5000 layers.

In addition, in the example, phosphorus is used as an impurity to be implanted into a polycrystalline silicon film, but it is not limited to this, and it is also possible to ion-implant other impurities such as arsenic, antimony, boron, and indium. It is.

As a semiconductor device to which the present invention can be applied, MOS F
In addition to ET, there are various semiconductor devices such as bipolar transistors.

Moreover, all the numerical values listed in the examples are examples, and other numerical values can also be selected without being limited thereto.

〔Effect of the invention〕

As explained above, according to the present invention, by forming a large-grain polycrystalline silicon film, it is possible to improve the activation efficiency of impurities. This has the effect of reducing the sheet resistance of the film.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional configuration diagram of a semiconductor device showing the steps of an embodiment of the present invention, FIG. 2 is a characteristic diagram showing the relationship between temperature increase rate and silicon crystal grain size, and FIG. 3 is a heating FIG. 3 is a characteristic diagram showing the relationship between end point temperature and silicon crystal grains. In the figure, 1 is a substrate, 2 is an insulating film, 3 is an amorphous silicon film,
Not shown. +1': 148 Shinaki 1 flea (JJm) No. 41 hot Detomera, Shi 1 Masculinity

Claims (1)

[Claims] (1) A method for forming a polycrystalline silicon film in a semiconductor device in which a polycrystalline silicon film is formed on a substrate, comprising: a first step of forming an amorphous silicon film on the substrate; and the amorphous silicon film. of a polycrystalline silicon film in a semiconductor device, comprising: a second step of heating the polycrystalline silicon film at a heating rate of 90° C./sec or higher at a silicon grain growth starting temperature or higher; Formation method.