JPH0332754B2 - - Google Patents

Info

Publication number
JPH0332754B2
JPH0332754B2 JP4855082A JP4855082A JPH0332754B2 JP H0332754 B2 JPH0332754 B2 JP H0332754B2 JP 4855082 A JP4855082 A JP 4855082A JP 4855082 A JP4855082 A JP 4855082A JP H0332754 B2 JPH0332754 B2 JP H0332754B2
Authority
JP
Japan
Prior art keywords
phototransistor
light emitting
output
led
responsiveness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP4855082A
Other languages
Japanese (ja)
Other versions
JPS58166273A (en
Inventor
Masato Matsumoto
Hiroaki Takasago
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP57048550A priority Critical patent/JPS58166273A/en
Publication of JPS58166273A publication Critical patent/JPS58166273A/en
Publication of JPH0332754B2 publication Critical patent/JPH0332754B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • G01R31/2607Circuits therefor
    • G01R31/2608Circuits therefor for testing bipolar transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Light Receiving Elements (AREA)
  • Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Photometry And Measurement Of Optical Pulse Characteristics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

〔発明の技術分野〕 本発明はフオトトランジスタの応答性管理装置
に関する。 〔発明の技術的背景とその問題点〕 通常フオトトランジスタの応答性はその構造
上、一般の小信号トランジスタに比べてかなり遅
い。光による非接触高速物体または高速回転検出
等ではこの応答性が重要となり、その対策を考え
なければならない。従来の応答性管理方法を第1
図に示す。矩形パルス源PGによりLED(発光ダ
イオード)1に、第2図のCH1に示すようなパ
ルス電流を流す。その時LED1に流れるピーク
電流IFPは、 IFP=VP1/RE ……(1) で示される。ここでVP1はシンクロスコープで観
測されるCH1のピーク電圧、REはLED1と接地
間抵抗である。発光源となるLEDの応答性は非
常に早いので、LEDの電流をオン/オフさせる
ことは、光遮蔽物体がLED−フオトトランジス
タ間に出入するのと同一モードとなる。 次に光の入射と同時に、フオトトランジスタ2
の光電流ICが流れ、エミツタの電位はVP2(R=L
×IC)まで上り、光が消える(IF=0)と雰Vま
で落ちる。CH1とCH2をシンクロスコープに
入れると、第2図a,bのような波形が得られ、
波形が“VP2×0.9”に上昇するまでの時間tON
波形が“VP2×0.1”に下降するまでの時間tOFF
目視により読みとられる。 しかしながらこのような測定では、目視誤差が
大きい欠点がある。他の測定方法としては、前記
CH1,CH2の波形を精密な測定器に入力して
測定しているが、この場合非常に高価となる欠点
がある。 〔発明の目的〕 そこで本発明の目的とするところは、構成の簡
単化をはかることにより、比較的精密にしかも簡
易にフオトトランジスタの応答性が測定できるフ
オトトランジスタの応答性管理装置を提供しよう
とするものである。 〔発明の概要〕 上記本発明の目的を達成するために、単安定素
子で応答性の基準となる時間を定め、比較手段で
その基準値と応答波形を比較し、その結果に応じ
て双安定素子をいずれか一方に安定させて、フオ
トトランジスタの応答性を管理しようとするもの
である。 〔発明の実施例〕 以下図面を参照して本発明の一実施例を説明す
る。第3図は同実施例の回路構成図であるが、第
1図と対応する個所には同一符号を付して説明を
省略し、特徴とする点の説明を行なう。スタート
信号が供給される端子11は単安定マルチバイブ
レータ12の入力端に接続され、この単安定マル
チ12の出力端はLED1のアノードに接続され
る。LED1と抵抗RE間のノード13はスイツチ
14の共通端子側に接続され、tON側端子141
単安定マルチ15の入力端に接続され、スイツチ
14のtOFF側端子142はインバータ16を介して
単安定マルチ15の入力端に接続される。単安定
マルチ15の出力端22はインバータ17を介し
てその出力端25は双安定素子としてのフリツプ
フロツプ18のクロツク入力端CPに接続される。 フオトトランジスタ2のエミツタと抵抗RL
のノード19はコンパレータ20の一入力端とな
り、このコンパレータ20の他の入力端には、基
準電圧Vrefを与える電圧源21が接続される。コ
ンパレータ20の出力端23はフリツプフロツプ
18のデータ入力端Dに接続され、フリツプフロ
ツプ18のデータQの出力端24にデータを得
る。 第4図、第5図は第3図の動作を示すタイミン
グ波形図であり、以下この図をも適宜参照して第
3図の動作説明を行なう。まず端子11へのスタ
ート信号の立ち上がりの時間t=t1で、単安定マ
ルチ12がパルス幅PW1(=t2−t1)の単一矩形パ
ルスを出力し、これをLED1のアノードに印加
する。LED1のカソードは抵抗REを介して接地
されているため、LED1のカソードには、第4
図の端子13で示される矩形パルスが得られる。
この時LED1には、前記(1)式で示される矩形パ
ルス電流が流れ、該LED1が発光する。 tONの測定管理 LED1のカソードは、スイツチ14のtON測定
側端子141を介してもう一つの単安定マルチ1
5に接続されており、これはLED出力の立ち上
がりt=t1で動作し、単安定マルチ15の出力
は、第4図で端子22の波形として示されるよう
にパルス幅PW2(=t3−t1)の単一矩形波となる。
これをインバータ17を通してフリツプフロツプ
18のCP端子に入れる。 一方、フオトトランジスタ2のエミツタは抵抗
RLを介して接地されており、光入力時間t=t1
ら少し遅れて電流ICが流れ、エミツタ電位は第4
図の端子19の波形で示される如く、VP2まで上
昇する。そしてフオトトランジスタのエミツタ電
位は、光の消失(t=t2)後ゆつくり接地レベル
(雰ボルト)まで下がる。今コンパレータ20の
比較基準電位Vrefを Vref=VP2×0.9 ……(2) と設定しておくと、t=t4でコンパレータ20の
出力は反転して“H”(高)レベル状態となる。
コンパレータ20の出力端23はフリツプフロツ
プ18のD端子に接続されており、t≧t4では
“H”状態である。
[Technical Field of the Invention] The present invention relates to a phototransistor response management device. [Technical background of the invention and its problems] Due to its structure, the response of a phototransistor is usually much slower than that of a general small-signal transistor. This responsiveness is important in non-contact detection of high-speed objects or high-speed rotation using light, and countermeasures must be considered. Traditional responsiveness management method is the first
As shown in the figure. A pulse current as shown at CH1 in FIG. 2 is applied to the LED (light emitting diode) 1 by a rectangular pulse source PG. The peak current I FP flowing through the LED 1 at that time is expressed as I FP =V P1 /R E (1). Here, V P1 is the peak voltage of CH1 observed with a synchroscope, and R E is the resistance between LED1 and ground. The response of the LED, which is the light source, is very fast, so turning the LED current on and off is the same mode as when a light shielding object moves in and out between the LED and the phototransistor. Next, at the same time as the light enters, the phototransistor 2
A photocurrent I C flows, and the potential of the emitter is V P2 (R= L
×I C ), and when the light disappears ( IF = 0), it falls to the atmosphere V. When CH1 and CH2 are put into a synchroscope, waveforms like those shown in Figure 2 a and b are obtained.
Time t ON until the waveform rises to “V P2 ×0.9”,
The time tOFF until the waveform drops to "V P2 × 0.1" is visually read. However, such measurements have the disadvantage of large visual errors. Other measurement methods include
The waveforms of CH1 and CH2 are measured by inputting them into a precision measuring instrument, but this method has the drawback of being very expensive. [Object of the Invention] Therefore, an object of the present invention is to provide a phototransistor responsiveness management device that can relatively precisely and easily measure the responsiveness of a phototransistor by simplifying the configuration. It is something to do. [Summary of the Invention] In order to achieve the above object of the present invention, a time serving as a reference for responsiveness is determined in a monostable element, a comparison means compares the reference value and the response waveform, and a bistable element is determined according to the result. This attempts to manage the responsiveness of the phototransistor by stabilizing the element in one direction or the other. [Embodiment of the Invention] An embodiment of the present invention will be described below with reference to the drawings. FIG. 3 is a circuit configuration diagram of the same embodiment, and parts corresponding to those in FIG. 1 are given the same reference numerals, explanations thereof are omitted, and characteristic points will be explained. The terminal 11 to which the start signal is supplied is connected to the input end of a monostable multivibrator 12, and the output end of this monostable multivibrator 12 is connected to the anode of the LED 1. The node 13 between the LED 1 and the resistor R E is connected to the common terminal side of the switch 14, the t ON side terminal 14 1 is connected to the input terminal of the monostable multi 15, and the t OFF side terminal 14 2 of the switch 14 is connected to the inverter 16 It is connected to the input end of the monostable multi 15 via. The output terminal 22 of the monostable multiplier 15 is connected via an inverter 17 to the clock input terminal CP of a flip-flop 18 as a bistable element. A node 19 between the emitter of the phototransistor 2 and the resistor R L becomes one input terminal of a comparator 20, and the other input terminal of the comparator 20 is connected to a voltage source 21 that provides a reference voltage V ref . The output terminal 23 of the comparator 20 is connected to the data input terminal D of the flip-flop 18 and obtains data at the data output terminal 24 of the flip-flop 18. 4 and 5 are timing waveform diagrams showing the operation of FIG. 3, and the operation of FIG. 3 will be explained below with reference to these figures as appropriate. First, at time t = t 1 of the rise of the start signal to terminal 11, monostable multi 12 outputs a single rectangular pulse with pulse width P W 1 (= t 2 − t 1 ), and this is applied to the anode of LED 1. do. Since the cathode of LED1 is grounded through the resistor R E , the cathode of LED1 has a fourth
A rectangular pulse is obtained, indicated by terminal 13 in the figure.
At this time, a rectangular pulse current expressed by the above equation (1) flows through the LED 1, and the LED 1 emits light. t ON measurement management The cathode of LED 1 is connected to another monostable multi 1 via the t ON measurement side terminal 14 1 of the switch 14.
5, which operates at the rising edge of the LED output t=t 1 , and the output of the monostable multi 15 has a pulse width P W2 (=t 3 −t 1 ) becomes a single square wave.
This is input to the CP terminal of flip-flop 18 through inverter 17. On the other hand, the emitter of phototransistor 2 is a resistor.
It is grounded through R L , and a current I C flows a little later than the optical input time t=t 1 , and the emitter potential is the fourth
As shown by the waveform at terminal 19 in the figure, it rises to V P2 . After the light disappears (t=t 2 ), the emitter potential of the phototransistor slowly drops to the ground level (voltage). Now, if the comparison reference potential V ref of the comparator 20 is set as V ref =V P2 ×0.9 (2), the output of the comparator 20 will be inverted at t= t4 and will be in the “H” (high) level state. becomes.
The output terminal 23 of the comparator 20 is connected to the D terminal of the flip-flop 18, and is in the "H" state when t≧ t4 .

〔発明の効果〕〔Effect of the invention〕

以上説明した如く本発明によれば、単安定マル
チバイブレータ、コンパレータ、フリツプフロツ
プで構成できるから、従来の目視方法に頼らず比
較的精密に、しかも簡易かつ迅速にフオトトラン
ジスタの応答性の測定管理が行なえる。また本発
明によれば、立上り応答tONの測定管理と、立下
り応答tOFFの両測定管理が、切換手段(スイツチ
14、インバータ16の部分に相当)を使用する
だけで、ともに共通の装置を用いて行なえる等の
利点を有したフオトトランジスタの応答性管理装
置が提供できるものである。
As explained above, since the present invention can be configured with a monostable multivibrator, a comparator, and a flip-flop, it is possible to measure and manage phototransistor responsivity relatively precisely, easily and quickly without relying on conventional visual inspection methods. Ru. Furthermore, according to the present invention, both the measurement management of the rising response t ON and the measurement management of the falling response t OFF can be performed using a common device by simply using the switching means (corresponding to the switch 14 and the inverter 16). It is possible to provide a phototransistor responsiveness management device that has the advantage of being able to perform the same operation using the following methods.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のフオトトランジスタの応答性管
理装置を示す回路図、第2図は同回路の作用を示
す信号波形図、第3図は本発明の一実施例を示す
回路図、第4図、第5図は同回路の作用を示す信
号波形図である。 1……LED、2……フオトトランジスタ、1
2,15……単安定マルチバイブレータ、14…
…スイツチ、16,17……インバータ、18…
…フリツプフロツプ、20……コンパレータ、2
1……基準電圧源。
Fig. 1 is a circuit diagram showing a conventional phototransistor response management device, Fig. 2 is a signal waveform diagram showing the operation of the same circuit, Fig. 3 is a circuit diagram showing an embodiment of the present invention, and Fig. 4 , FIG. 5 is a signal waveform diagram showing the operation of the same circuit. 1...LED, 2...Phototransistor, 1
2,15...monostable multivibrator, 14...
...Switch, 16, 17...Inverter, 18...
...Flip-flop, 20...Comparator, 2
1...Reference voltage source.

Claims (1)

【特許請求の範囲】 1 第1の単安定素子と、該素子からの通電によ
り発光する発光手段と、該手段の発光を受けるフ
オトトランジスタと、前記第1の単安定素子から
前記発光手段への通電開始によりこの通電で得ら
れる出力信号の正転信号・反転信号の切換手段
と、この切換手段の信号出力側に設けられ、前記
発光手段に通電が開始されてその通電レベルが一
方の状態のとき設定時間一方の状態に安定する第
2の単安定素子と、前記フオトトランジスタの出
力電圧と基準電圧とを比較する比較手段と、前記
第2の単安定素子の出力レベル変化で設定時間経
過したことが検出されると前記比較手段の出力信
号レベルに応じて出力レベルがきまる双安定子と
具備したことを特徴とするフオトトランジスタの
応答性管理装置。 2 前記発光手段はLED(発光ダイオード)であ
る特許請求の範囲第1項に記載のフオトトランジ
スタの応答性管理装置。
[Scope of Claims] 1. A first monostable element, a light emitting means that emits light when energized from the element, a phototransistor that receives light emitted from the means, and a light emitting means from the first monostable element to the light emitting means. When the energization starts, the output signal obtained by the energization is switched between a normal signal and an inverted signal, and the switching means is provided on the signal output side. a second monostable element that is stabilized in one state for a set time; a comparison means for comparing the output voltage of the phototransistor with a reference voltage; 1. A phototransistor responsiveness management device, comprising: a bistable device whose output level is determined according to the output signal level of the comparing means when the above-mentioned comparison means detects that the output signal level is determined. 2. The phototransistor responsiveness management device according to claim 1, wherein the light emitting means is an LED (light emitting diode).
JP57048550A 1982-03-26 1982-03-26 Responding property control device of phototransistor Granted JPS58166273A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57048550A JPS58166273A (en) 1982-03-26 1982-03-26 Responding property control device of phototransistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57048550A JPS58166273A (en) 1982-03-26 1982-03-26 Responding property control device of phototransistor

Publications (2)

Publication Number Publication Date
JPS58166273A JPS58166273A (en) 1983-10-01
JPH0332754B2 true JPH0332754B2 (en) 1991-05-14

Family

ID=12806476

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57048550A Granted JPS58166273A (en) 1982-03-26 1982-03-26 Responding property control device of phototransistor

Country Status (1)

Country Link
JP (1) JPS58166273A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5396680A (en) * 1977-02-02 1978-08-24 Mitsubishi Electric Corp Photo element measuring instrument

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56153873U (en) * 1980-04-17 1981-11-17

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5396680A (en) * 1977-02-02 1978-08-24 Mitsubishi Electric Corp Photo element measuring instrument

Also Published As

Publication number Publication date
JPS58166273A (en) 1983-10-01

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