JPH03286649A - Exchange - Google Patents

Abstract

PURPOSE:To back up exchange of succeeding cells and to prevent deterioration in the throughput by informing a cell whose connection is given up to an input buffer and inputting a cell stored after the cell whose connection is given up to other unit switch network. CONSTITUTION:When an inputted cell is in contention with other cell in a unit switch 13, a contention detection notice block 16 detects it, one of two input lines is connected to an output line and a contention notice signal to other input line is informed to an input buffer 12 storing the cell while taking back a connection path of the cell. Then the input buffer 12 extracts a cell awaiting the transmission to the unit switch 13 and stored next to a cell being a defeated cell, outputs it to the unit switch 13 at a first stage of a unit switch network 14 of a 2nd layer and a succeeding cell is similarly outputted to the unit switch 13 of a 1st stage of the 2nd layer.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a switching device used for communication using packets, communication based on an asynchronous transfer mode, and the like.

Conventional technology Conventionally, this type of self-routing type exchange device has
Institute of Electronics, Information and Communication Engineers Journal Vol. J70-Bh7r space-divided space-divided self-footing switch network configuration A fixed-length information bit string (hereinafter referred to as a cell) is exchanged after adding an outgoing line address. Common.

FIG. 2 is a block diagram showing the schematic configuration of a conventional switching device.
FIG. 3 is an explanatory diagram showing a schematic configuration of a unit switch commonly used in the conventional exchange device and the present invention.

In FIG. 2, 1 is an input line into which cells to be exchanged by this device are input, and 2 is an input line through which cells waiting to be exchanged by this device are accumulated according to a first-in, first-out method (hereinafter referred to as the FIFO method). The buffer 3 has two input lines and two output lines as shown in FIG. 3, and is a unit switch that performs a connection switching operation between each input line and each output line. When the binary address information of the bit position corresponding to the current stage of the cell input from the main input line is rOJ, it is output to the upper output line in the figure, and when the address information is "1", the figure It outputs to the output line on the lower middle side.

A plurality of unit switches 3 are arranged in a grid in both the vertical and horizontal directions to form a unit switch network, and the arrangement of unit switches 3 in the vertical direction is called a stage, and the arrangement of unit switches 3 in the horizontal direction is called a column. .

4 is an internal link that connects the output line and input line of unit switches 3.3 in two adjacent stages across each column, and 5 is an internal link that connects the output line of each unit switch 3 in the final stage as it is. This is the outgoing line to be connected.

Next, the operation of the conventional example with the above configuration will be explained.

In FIG. 2, when a cell to be exchanged by this device arrives at the incoming line 1, this cell is stored and stored in the input line 2. The input lines of the unit switches 3 arranged in the first stage are respectively assigned to the output of each input buffer 2, and the input buffer 2 transfers the address information of the input cells one by one to the first stage according to the FIFO method. Output to the input line of unit switch 3.

A cell input to the first-stage unit switch 3 is output to one of two output lines according to the corresponding address information, and is input to the second-stage unit switch 3 via the internal link 4. Furthermore, in the second stage unit switch 3, the address information corresponding to the second stage of the cell is output to one of the two output lines, and is input to the third stage unit switch 3 via the internal link 4. Ru.

Thereafter, by sequentially repeating similar operations, the input cell can finally reach the unit switch 3 having the outgoing line 5 as its destination as an output line.

Here, the connection switching state of each unit switch 3 will be explained based on FIG. 4.

FIG. 4 is an explanatory diagram showing the connection switching state when two cells are input to the unit switch 3, and FIG.
4b) shows a normal connection state, and FIGS. 4(c) and 4(d) show a conflict occurrence state.

According to this, if each cell input from two input lines has different address information, a normal connection is made and the two lines are connected as shown in Figures 4(a) and (b). Each cell can be output from the output line of 4, but when each cell has the same address information, the 4th
Figure (C).

As shown in (d), 1=two cells request connection to the same output line, so connection is impossible. This condition is called a race condition.

Next, an example of a cell switching connection mode using a conventional switching device having the configuration shown in FIG. 2 will be described with reference to FIG. 5.

In addition, in FIG. 5, each incoming line 1 is numbered ○,
1st, . . . , 7th, and each output line 5 is numbered 01, 1st, . . . , 7th from the top in the figure.

For example, from the fifth person R1 through the input huff 72, the first
The cell input to the input line of the unit switch 3 in the third stage is expressed as rl in binary representation by the fourth outgoing line.

0) as the destination address, and the destination outgoing line address number in binary notation ``100'' is added to the beginning of this cell.

Here, since the first address bit of the cell input to the third unit switch 3 in the first stage is "1", the third unit switch 3 in the first stage selects the input line to which this cell is input. The cell is connected to the output line on the lower side of the figure, whereby this cell is inputted to the fourth unit switch 3 of the second stage via the internal link 4.

In the fourth unit switch 3 of the second stage, since the second address bit of the cell is "0", the fourth unit switch 3 of the second stage outputs the input line to which this cell is inputted. line, so that this cell is input to the third unit switch 3 of the third stage via the internal link 4.

Since the third address bit of the cell in the third unit switch 3 in the third stage is "○", the third unit switch 3 in the third stage connects the input line to which this cell is input to the upper output line in the figure. , which causes this cell to reach its destination, the fourth cell.
You can reach exit line 5.

When the cells addressed from the first incoming line 1 to the sixth outgoing line 5 and the cells addressed from the second incoming line 1 to the sixth outgoing line 5 are exchanged at the same time by the same procedure, In the third unit switch 3 of the second stage indicated by the symbol A in Figure 5, a competition state occurs because each cell input from both the upper and lower input lines requests connection to the lower output line in the figure. occurs and connection becomes impossible. This is called internal competition.

On the other hand, when cells destined for the third outgoing line 5 from the Oth incoming line 1 and the seventh incoming line 1 are exchanged at the same time, both cells are transferred to the final stage indicated by the symbol B in FIG. In the second unit switch 3, a competition condition occurs in the same manner as in the third unit switch 3 of the second stage indicated by the symbol A. This is called conflict on the outgoing line.

In this way, even with the above-mentioned conventional switching device, cells can be switched as long as a contention condition does not occur.

Problems to be Solved by the Invention However, the conventional switching device described above has the following problems.

(b) Depending on the address contents of multiple cells that are simultaneously input to the switching device and the positional relationship of the incoming line 1 to which each cell is input, the unit switch 3 on the switching connection path of each cell
A connection race condition may occur.

In this case, the contention that occurs in the intermediate stage unit switches 3 can be avoided by increasing the number of unit switches 3 in the switching device. However, connection conflicts on the output M5 of the switching device cannot be avoided or backed up for subsequent cell switching.

(b) If an unavoidable conflict occurs regarding the first stored cell in the input buffer 72 provided at the front stage of the unit switch network of the switching device, the second and subsequent cells will
Regardless of whether or not there is a possibility of contention, cells cannot be sent from the input buffer 72, and the exchange of unexchanged cells is delayed, resulting in a decrease in exchange efficiency (throughput).

The present invention solves the above-mentioned conventional problems, and provides an excellent switching system that can back up subsequent cell switching even in the case of connection contention on the outgoing line of the switching device, thereby suppressing a decrease in throughput. The purpose is to provide a device.

Means for Solving the Problems In order to achieve the above object, the present invention has a plurality of incoming lines and outgoing lines, and each autonomously connects the input terminal and the output terminal based on the address information of the cell inputted from the incoming line. A multi-layer unit switch network in which a plurality of unit switches that perform internal connection control are arranged in a lattice pattern and connected to each other by internal links to form a one-layer unit switch network, and a final stage of each unit switch network. A plurality of conflict detection and notification means are arranged to detect the occurrence of a connection conflict state from the input terminal to the output terminal inside the final stage unit switch and notify the loser of the conflict, and each input line and the first stage of each unit switch network. It temporarily stores and stores the cells input to each input line, takes them out at any time according to the first-in, first-out method, and sequentially outputs them to the unit switch network of a predetermined layer starting from the first cell, and also detects the loser of the competition from the competition detection notification means. A plurality of input huffers that sequentially output the cells stored after the loser cell of the competition to the unit switch networks of other layers when the notification is received, and output lines of the final stage of the unit switch networks of each layer are and a plurality of connection switching means for switching the connection to the outgoing line.

Effect of the Invention With the above configuration, the present invention connects one of the two competing cells to the outgoing line without giving up the connection when a connection conflict occurs in the final stage unit switch in a specific unit switch network of the switching device. In addition to being able to
In the input buffer that stores and stores cells that have given up on connection, the cells that have been stored since the cell that gave up on connection can be input to another unit switch network, so it can back up future cell replacement. Therefore, a decrease in throughput can be suppressed.

Example Embodiments of the present invention will be described below based on the drawings.

FIG. 1 is a block diagram showing a schematic configuration of a switching device according to an embodiment of the present invention.

In FIG. 1, 11 is an input line into which cells to be exchanged by this device are input, 12 is an input buffer in which cells waiting to be exchanged by this device are stored according to the FIFO method, and 13 is a conventional device. Similarly, as shown in Figure 3, 2
It is a unit switch that has one input line and two output lines, and performs connection switching operation between each input line and each output line. When the binary address information of the bit position corresponding to is rOJ, it is output to the upper output line in Figure 3, and when the address information is "1", it is output to the lower output line in Figure 3. It is something.

A plurality of unit switches 13 are arranged in a grid in both the vertical and horizontal directions to form a one-layer unit switch network 14. In this embodiment, two-layer unit switches 11814.
is provided.

Normally, the cells stored in each input buffer 712 are input to the first layer unit switch network 14 in order from the beginning, and the cells are input to the second layer unit switch H14 to the first layer unit switch network 14. When a cell that has been used for a long time causes a conflict on the outgoing line,
Cells stored after the cell that caused the conflict on the outgoing line of each input buffer 12 are input.

In each unit switch network 14, the arrangement of the unit switches 13 in the vertical direction is called a stage, and the arrangement of the unit switches 13 in the horizontal direction is called a stage.
A sequence of is called a column.

15 denotes each unit switch [in 14, an internal link connects the output line and input line of the unit switches 13.13 in two adjacent stages across each column; 16 denotes each unit switch network; This is a conflict detection notification block connected to each unit switch 13 located at the final stage of ↓4, and detects the occurrence of a conflict state in each unit switch 13 at the final stage of each layer, and also stores the loser cell of the conflict. This is provided as means for notifying the loser of the competition to the input buffer 12 that is storing the information.

1°7 is a connection switching block, which connects one output line of each of the unit switches 13 located at the final stage in the two-layer unit switch network ↓4.14 to either the first layer or the second layer. It is provided as means for selecting an output line from one unit switch network 14 and connecting and switching it to the outside.

18 is a unit switch #! of either the first layer or the second layer of the unit switches 13 located at the final stage of each unit switch network 14 via the connection switching block 17. 14
The output line is an outgoing line that is selectively connected, and the connection switching block 17 is in a state in which the first layer unit switch network 14 side is selected in the initial state.

Next, the operation of the present invention with the above configuration will be explained.

In FIG. 1, when a cell to be exchanged by the apparatus arrives at the incoming line 11, two cells are stored in the input buffer 12. The input lines of the unit switches 13 arranged in the first stage of the unit switch networks 14 of both the first and second layers are assigned to the output of each input buffer 12, and the input buffer 12 The address information of the cell is outputted to the input line of the unit switch 13 in the first stage of the first layer according to the FIFO method.

A cell input to the first-stage unit switch 13 of the first layer is output to one of two output lines according to the corresponding address information, and is input to the second-stage unit switch 13 via the internal link 15. . Next, the second stage unit switch 13
Also, it is output to one of the two output lines according to the address information corresponding to the second stage of the cell, and is input to the third stage unit switch 13 via the internal link 15.

Furthermore, in the unit switch 13 at the third stage, that is, the last stage, the output is output to one of the two output lines according to the address information corresponding to the third stage of the cell, but here, the other cell unit switch 1 in the final stage without causing any conflict with
When the cell reaches the output line 3, the input cell passes through the connection switching block 17 and finally reaches the output line 18, which is its destination.

In this case, the contention state that may occur in the unit switch 13 in the intermediate stage can be avoided by dispersing the input positions of the cells and negotiating in advance the possibility of blockage of the switching path. In the example, we will ignore this as not occurring.

On the other hand, if the input cell conflicts with another cell at the unit switch 13 at the final stage of the first layer, the conflict detection notification block 16 detects this and both cells requesting connection to the same output line Connect one of the two input lines to the output line, and connect the output line 1 through the connection switching block 17.
8 and outputs a competition notification signal to the other input line indicating that the cell has become the loser of the competition. 712.

The input buffer 12, which recognizes the occurrence of a conflict by the notification of the conflict notification signal, takes out the cell that has been stored next to the cell that lost the conflict and is waiting to be sent to the unit switch 13. The signal is output to the unit switch 13 at the first stage of the unit switch network 14, and the subsequent cells are similarly output to the unit switch 13 at the first stage of the second layer.

Cells input to the unit switch 13 at the first stage of the second layer are connected and exchanged within the unit switch network 14 according to a procedure similar to the cell connection procedure at the first layer, and reach the unit switch 13 at the final stage.

If there is no conflict on the output line, the connection switching block 17 switches the selection route from the first layer side to the second layer side, and connects the output line of the final stage unit switch 13 and the connection switching block 17. The cell is then sent out onto the outgoing line 18.

In addition, if contention on the outgoing line occurs again in the unit switch 13 at the final stage of the second layer, or a cell with the same destination as this cell in the first layer is output from the output line to the outgoing line 18 via the connection switching block 17. If the destination outgoing line 18 is currently occupied, the conflict detection notification block 17 will issue a conflict notification indicating that the user has become the loser of the conflict, as in the case of the conflict on the outgoing line in the first layer. The signal is sent back to the input buffer 12, which stores and stores this cell, tracing back the connection path that this cell has followed, and the input buffer 12 interrupts sending out the cell.

In this embodiment, the first layer unit switch network 14
The cells stored in each input buffer 712 are input in order from the beginning, and the cells input to the unit switch network 14 in the first layer are input to the unit switch network 14 in the second layer when they cause contention on the outgoing line. In this case, it is assumed that the second and subsequent cells of each input buffer 712 are input, but even when there is no contention on the outgoing line, in order to improve the throughput of this switching device, each input buffer The second and subsequent cells of 712 may be input to the first layer unit switch network 14 in a distributed manner.

Further, as described above, the cells are connected to the unit switch network 14 of the first layer.
and second unit switch network 14, among the cells waiting for exchange processing in the same input buffer 12, consecutive cells destined for the same outgoing line 18 will be stored later. Since the stored cells are exchanged via the second-layer unit switch network 14, they are sent to the outgoing line 18 before cells that are stored and stored and exchanged via the first-layer unit switch network 14. No reordering occurs between cells as they are transmitted.

Effects of the Invention As described above, according to the present invention, a plurality of incoming lines and outgoing lines, each of which autonomously controls internal connections between input terminals and output terminals based on address information of cells inputted from the incoming lines, is provided. A multi-layer unit switch network in which unit switches are arranged in a lattice pattern and interconnected by internal links to form a one-layer unit switch network, and a final stage unit switch network arranged at the final stage of each unit switch network. A plurality of conflict detection and notification means are arranged between each incoming line and each layer of the unit switch network to detect the occurrence of a conflict state between the input terminal and the output terminal inside the unit switch and notify the loser of the conflict. The cells input to each incoming line are temporarily stored and retrieved at any time according to the first-in, first-out method, and are sequentially output to a predetermined unit switch network starting from the first cell.When a notification of the loser of the competition is received from the competition detection notification means, the competition is detected. A plurality of input buffers 7 sequentially output the cells stored after the loser cell to other unit switch networks, and the output line of the final stage in the multi-layer unit switch network is selectively connected to each output line. The configuration includes a plurality of connection switching means.

For the second reason, if a connection conflict occurs at the final stage unit switch in a specific unit switch network of the switching equipment,
One of the two competing cells can be connected to the outgoing line without giving up the connection, and the input buffer that stores and stores the cell that gave up the connection can be stored after the cell that gave up the connection. It is possible to input a cell that is already in use to another unit switch network, thereby making it possible to back up subsequent cell replacement, and suppressing a decrease in sloop and node.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a switching device according to an embodiment of the present invention, FIG. 2 is a block diagram showing a schematic configuration of a conventional switching device, and FIG. 3 is common to both the conventional switching device and the switching device of the present invention. Figures 4 (a) and (b) are explanatory diagrams showing the schematic configuration of a general unit switch used as Explanatory diagrams, Figures 4(c) and (d) are explanatory diagrams showing the state of contention when two cells are input to the unit switch in Figure 3, and Figure 5 is the conventional exchange shown in Figure 2. FIG. 2 is an explanatory diagram illustrating an example of an exchange connection form by devices. 11... Incoming line, 12... Input buffer, ↓3...
Unit switch, 14...Unit switch network, 15...Internal link, 16...Conflict detection notification block, 17...
Connection switching block, 18...outgoing line.

Claims (1)

[Claims] A plurality of unit switches are arranged in a grid, each autonomously controlling internal connections between input terminals and output terminals based on a plurality of incoming lines and outgoing lines, and address information of cells inputted from the incoming lines. 1 by connecting with an internal link.
A multi-layer unit switch network that constitutes a layer unit switch network, and a device installed at the final stage of each unit switch network to detect the occurrence of a connection conflict state from an input terminal to an output terminal inside the final stage unit switch. A plurality of conflict detection and notification means for notifying the loser of a conflict are provided between each incoming line and the first stage of each unit switch network, and cells input to each incoming line are temporarily stored and retrieved at any time according to a first-in, first-out system. The first cell is sequentially outputted to the unit switch network of a predetermined layer, and when the notification of the loser of the competition is received from the competition detection notification means, the cells stored after the cell of the loser of the competition are output to the unit switch network of the other layer. A switching device comprising a plurality of input buffers for sequentially outputting data to a unit switch network, and a plurality of connection switching means for selectively switching the connection of a final stage output line in a unit switch network of each layer to an outgoing line.