JPH03284871A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPH03284871A
JPH03284871A JP8711590A JP8711590A JPH03284871A JP H03284871 A JPH03284871 A JP H03284871A JP 8711590 A JP8711590 A JP 8711590A JP 8711590 A JP8711590 A JP 8711590A JP H03284871 A JPH03284871 A JP H03284871A
Authority
JP
Japan
Prior art keywords
face
layer
substrate
acting
formation regions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8711590A
Other versions
JP3276146B2 (en
Inventor
Tetsuo Fujii
Yoshitaka Goto
Original Assignee
Nippondenso Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippondenso Co Ltd filed Critical Nippondenso Co Ltd
Priority to JP8711590A priority Critical patent/JP3276146B2/en
Publication of JPH03284871A publication Critical patent/JPH03284871A/en
Application granted granted Critical
Publication of JP3276146B2 publication Critical patent/JP3276146B2/en
Anticipated expiration legal-status Critical
Application status is Expired - Fee Related legal-status Critical

Links

Abstract

PURPOSE: To obtain a highly intelligent and integrated semiconductor device by arranging piezo-resistance layers on a high-device-characteristic single-crystal silicon substrate and arranging bipolar transistors on a high-device-characteristic epitaxial layer.
CONSTITUTION: A single-crystal silicon substrate 3 having a face 110 is joined to the smooth face of the single-crystal silicon substrate 2, which has a face 111, of a semiconductor pressure sensor with a part of the smooth face exposed, an epitaxial layer 8 is formed on the smooth face of the substrate 2, and the predetermined quantity of the layer 8 is removed to expose the layer 8 acting as bipolar transistor formation regions and the substrate 3 acting as piezo- resistance layer formation regions, with the surface smooth. As a result, a semiconductor pressure sensor which has the layer 8 exposed on the surface of the substrate, having the face 111, and acting as bipolar transistor formation regions and has the substrate 3 exposed on the surface of the substrate, having the face 110 with different face azimuth from the layer 8, and acting as piezo- resistance layer formation regions can be manufactured.
COPYRIGHT: (C)1991,JPO&Japio
JP8711590A 1990-03-30 1990-03-30 Semiconductor device and manufacturing method thereof Expired - Fee Related JP3276146B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8711590A JP3276146B2 (en) 1990-03-30 1990-03-30 Semiconductor device and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8711590A JP3276146B2 (en) 1990-03-30 1990-03-30 Semiconductor device and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JPH03284871A true JPH03284871A (en) 1991-12-16
JP3276146B2 JP3276146B2 (en) 2002-04-22

Family

ID=13905958

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8711590A Expired - Fee Related JP3276146B2 (en) 1990-03-30 1990-03-30 Semiconductor device and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JP3276146B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6615668B2 (en) 2000-10-27 2003-09-09 Denso Corporation Semiconductor pressure sensor having signal processor circuit
WO2006114999A1 (en) * 2005-04-18 2006-11-02 Kyoto University Compound semiconductor device and method for fabricating compound semiconductor device
JP4814304B2 (en) * 2005-03-07 2011-11-16 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッドAdvanced Micro Devices Incorporated Integrated circuit and its manufacturing method
US8928119B2 (en) 1997-04-04 2015-01-06 Glenn J. Leedy Three dimensional structure memory

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9401183B2 (en) 1997-04-04 2016-07-26 Glenn J. Leedy Stacked integrated memory device
US8928119B2 (en) 1997-04-04 2015-01-06 Glenn J. Leedy Three dimensional structure memory
US8933570B2 (en) 1997-04-04 2015-01-13 Elm Technology Corp. Three dimensional structure memory
DE10152882B4 (en) * 2000-10-27 2010-04-01 DENSO CORPORATION, Kariya-shi Semiconductor pressure sensor signal processor circuit
US6615668B2 (en) 2000-10-27 2003-09-09 Denso Corporation Semiconductor pressure sensor having signal processor circuit
JP4814304B2 (en) * 2005-03-07 2011-11-16 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッドAdvanced Micro Devices Incorporated Integrated circuit and its manufacturing method
WO2006114999A1 (en) * 2005-04-18 2006-11-02 Kyoto University Compound semiconductor device and method for fabricating compound semiconductor device

Also Published As

Publication number Publication date
JP3276146B2 (en) 2002-04-22

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