JPH03283466A - Thin film transistor - Google Patents

Abstract

PURPOSE:To solve a structural defect in a conventional technique where a thin film transistor is hardly improved in gate dielectric breakdown strength by a method wherein a gate insulating film is formed in a three-layered structure composed of a silicon oxide film, a silicon nitride film, and silicon oxide film. CONSTITUTION:An insulating film of three-layered structure composed of a silicon oxide film (500Angstrom thick) 4, a silicon nitride film (2000-3000Angstrom thick) 3, and a silicon oxide film (500Angstrom thick) 5 is formed on a glass board 1 on which a gate electrode 2 has been provided. That is, an inverse staggered type thin film transistor is constituted including a gate insulating film of three-layered structure composed of a silicon oxide film/silicon nitride film/a silicon oxide film formed on a glass board. Therefore, as a gate insulating film of this design is improved not only in quality but also in breakdown strength owing to lamination, a thin film transistor of this design can be sharply improved in breakdown strength as compared with a conventional one in which a silicon nitride of single layer formed directly on a glass is made to serve as a gate insulating film.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a thin film transistor (TPT) using glass as a substrate.
), particularly regarding the structure of the gate insulating film.

[Prior Art] Conventionally, a gate insulating film of a thin film transistor is formed of a single silicon nitride film.

FIGS. 3(a) to 3(e) are process order diagrams showing a conventional method for manufacturing an inverted staggered thin film transistor. First, a gate electrode 2 is formed on the upper surface of a glass substrate 1 by patterning a chromium (Crl) sputtered film. After [Figure 3(a)
], which shows a state in which a silicon nitride film 3 is formed as a gate insulating film [FIG. 3(b)]. Next, an amorphous silicon film 6 for forming a channel region and an amorphous silicon film 7 for ohmic contact doped with impurities such as phosphorus (P) are sequentially formed by patterning [FIG. 3 (cl, (di)], gate Silicon nitride film 3 on glass substrate 1 extending from the insulating film
The thin film transistor is completed by forming source and drain electrodes 8.9 on top by patterning a chromium (fcr) metal film [FIG. 3(e)].

[Problems to be Solved by the Invention] However, the thin film transistor having the conventional structure described above has a major problem in gate dielectric breakdown voltage. because,
Since it is originally a very difficult technique to deposit a silicon nitride film homogeneously on a glass substrate, the quality of the film on the gate electrode 2 used as the gate insulating film is indispensable.

This is because there is always a concern that the dielectric strength of the silicon nitride film 3 on the glass substrate l, which is used as an insulating film for the drain electrode 8.9, may decrease due to poor film quality. Therefore, the conventional structure has the disadvantage that a thin film transistor with high breakdown voltage cannot be obtained.

SUMMARY OF THE INVENTION In view of the above circumstances, an object of the present invention is to provide a thin film transistor that solves the structural drawbacks of the prior art in which it is difficult to improve the gate dielectric breakdown voltage.

Means for Solving Problem C] According to the present invention, a thin film transistor includes a glass substrate;
a gate electrode formed in a laminated structure on the glass substrate;
The gate insulating film includes a gate insulating film, a semiconductor thin layer for forming a channel, and source and drain electrodes, and the gate insulating film is formed into a three-layer structure of silicon oxide film/silicon nitride film/silicon oxide film. It consists of:

[Function] According to the present invention, a thin film transistor on a glass substrate has the following characteristics:
It is formed with a three-layer gate insulating film having a silicon oxide film as a base. Therefore, even when the gate insulating film extends over the glass substrate as in the case of an inverted staggered type, the gate insulating film can be formed with extremely good film quality. Furthermore, in the case of a three-layer structure, since the effect of improving voltage resistance due to lamination is added synergistically, the gate insulation voltage can be significantly improved. At this time, since the gate capacitance can be reduced by stacking three layers, it is possible to improve high frequency characteristics.

“Example 1 The present invention will be described in detail below with reference to the drawings.

Since the structure of the thin film transistor of the present invention can be easily understood by clarifying its manufacturing method, it will be explained below accordingly.

FIG. 1 fal to (e) are process flow diagrams showing one method of a manufacturing method for obtaining an embodiment of the present invention in an inverted staggered type thin film transistor. First, a glass substrate 1 is prepared, and a thickness of 1000 to 200 mm is placed on this surface.
The gate electrode 2 made of Cr1 metal is formed using the conventional patterning technique [FIG. 1fa]. , lf@], Next, as shown in FIG. 1 fbl, a silicon oxide film (500 mm thick) 4. An insulating film having a three-layer structure consisting of a silicon nitride film (2000 to 3000 thick) 3 and a silicon oxide film (500 thick) 5 is formed.

That is, an insulating film having a three-layer structure consisting of a silicon oxide film/silicon nitride film/silicon oxide film with a silicon oxide film 4 as a base is formed as a gate insulating film on the glass substrate 1 [FIG. 1(b)] ].

Below, as in the prior art, the thickness 3 constituting the channel region is
After sequentially patterning and forming an amorphous silicon film 7 with a thickness of 300 to 500 layers for ohmic contact and an amorphous silicon film 7 having a thickness of 300 to 5000 mm [see FIGS. The source and drain electrodes 8 and 9 are each formed using a chromium (Crl metal film (thickness: 1000 mm) on the extending three-layer insulating film.
The thin film transistor can be completed by patterning the thin film transistor by 2,000 people (Fig. 1 f).
e) Reference 1゜According to this embodiment, the inverted staggered thin film transistor according to the present invention is a silicon oxide film/silicon nitride film/silicon nitride film formed on a glass substrate with a silicon oxide film as a base.
It is configured to include a gate insulating film having a three-layer structure of silicon oxide films. Therefore, compared to conventional thin film transistors in which the gate insulating film is made of a single layer of silicon nitride film formed directly on a glass substrate, the gate dielectric breakdown voltage can be increased because the film quality is improved and the breakdown voltage is improved by stacking layers. can be significantly increased. That is, according to the experimental results, it has been confirmed that the dielectric strength voltage is dramatically improved from the conventional 3 MV/cm to IOMV/cm, for example, when the overall structural dimension is not changed. At this time, by forming the three-layer structure, the specific capacitance of the gate insulating film can be reduced, so it is possible to obtain a thin film transistor with improved gate dielectric breakdown voltage and high frequency characteristics.

Furthermore, these effects of improving dielectric strength and reducing capacitance also occur in the insulating film directly under the source and drain electrodes, so that the effect of improving reliability is also significant.

FIG. 2 fa) to fd) are process flow diagrams showing one method of a manufacturing method for obtaining an embodiment of the present invention in a staggered type thin film transistor. In the thin film transistor of this embodiment, as shown in FIG. 2, a source electrode 8 and a drain electrode 9 having a thickness of 1000 to 2000 mm are formed on a glass substrate 1 by patterning a chromium (Cr) metal film. It is made from the first step. Next, an amorphous silicon film 7 for ohmic contact is formed on these electrodes by patterning [second
Refer to FIG. fc)] and finally the gate electrode 2 is formed by patterning a chromium (Cr) metal film [see Fig. 2(d)].
)Reference 1゜According to this embodiment, the forward staggered thin film transistor according to the present invention is the same as the reverse staggered thin film transistor of the previous embodiment (consisting of a three-layer structure of silicon oxide film/silicon nitride film/silicon oxide film). The thin film transistor of this embodiment includes a gate insulating film.Therefore, the thin film transistor of this embodiment can also exhibit high gate dielectric breakdown voltage and excellent high frequency characteristics.

[Effects of the Invention] As described above in detail, according to the present invention, the gate insulating film of a thin film transistor is formed with a three-layer structure consisting of a silicon oxide film/silicon nitride film/silicon oxide film with good film quality. Therefore, it is possible to easily realize a thin film transistor having a gate dielectric strength higher than that of the conventional one and excellent high frequency characteristics, regardless of whether it is an inverted staggered type or a similar staggered type.

[Brief explanation of drawings]

Figure 1 (al~tel is a process sequence diagram showing one method of manufacturing method for obtaining an embodiment of the present invention in an inverted staggered thin film transistor; Figure 2 (a)~
fd) is a process sequence diagram showing a manufacturing method for obtaining an embodiment of the present invention in a similar staggered thin film transistor, and FIG. It is a process order diagram showing the manufacturing method. 1...Glass substrate, 2...-gate electrode, 3...
・Silicon nitride film, 4.5...-Silicon oxide film, 6... Amorphous silicon film constituting the channel region, 7... Amorphous silicon film for ohmic contact, 8... Sosumi pole, 9. -Drain electrode. Patent applicant NEC Corporation

Claims (1)

[Claims] It comprises a glass substrate, a gate electrode formed in a laminated structure on the glass substrate, a gate insulating film, a semiconductor thin layer for forming a channel, and source and drain electrodes, and the gate insulating film is silicon oxidized. A thin film transistor characterized in that it is formed in a three-layer structure of film/silicon nitride film/silicon oxide film.