JPH03280449A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make small an opening of a contact hole or a through-hole and to prevent a contact resistance from being increased by a method wherein an interlayer insulating film under the lower part of the bottom of a hole is etched wider than the diameter of the hole up to a lower conductive layer, the hole is penetrated and a conductive member is buried in the interior of the through-hole. CONSTITUTION:A silicon nitride film 4 and an interlayer insulating film 3 are etched by reactive ion etching using a photoresist 5 as a mask in such a way that a lower impurity diffused layer 2 is not exposed. After the photoresist 5 is removed, the film 4 is grown by a CVD method and a silicon nitride film sidewall 6 is formed on the sidewall of a hole by etching back the film 4. The film 3 is subjected to isotropic etching using the film 4 and the sidewall 6 as masks and the isotropic etching is stopped when the layer 2 is exposed. After the film 4 and the sidewall 6 are etched with a hot phosphoric acid, a high- melting point metal film 7, such as a tungsten film or the like, is grown only on the layer 2 and the interior of a contact hole is filled with the film 7.

Description

[Detailed description of the invention]

"Industrial Application Field J" The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a device having connection parts such as contact holes and through holes for multilayer wiring. A method of manufacturing a semiconductor device having the above structure will be explained with reference to FIG. 3. After forming an impurity diffusion layer 2 on a semiconductor substrate 1, PSG (
An interlayer insulating film 3 made of phosphosilicate glass or the like is deposited by CVD. After coating the photoresist 5, an opening is formed using reactive ion etching (RIE) as a mask pattern.
A hole is formed in the hole (FIG. 3 (bl)). Next, after removing the photoresist 5, it is covered with an aluminum film and patterned to form a wiring 8 (FIG. 3 (c)). [Problem to be Solved by the Invention J] Generally, when the wiring pitch is reduced in order to miniaturize elements, unless the opening size of the contact hole is also reduced, many problems will occur. In other words, if the contact hole is not reduced in proportion to the wiring pitch, the wiring width and the design margin between the contacts will become smaller, resulting in the contact hole becoming smaller when etching the wiring due to misalignment of the metal fittings and widening of the opening size. If exposed, the underlying semiconductor substrate may be etched, or in extreme cases, the contact hole may extend into adjacent wiring. By the way, when the opening size of the contact hole is made smaller using the conventional manufacturing method described above, the contact area between the aluminum wiring in the soil layer and the impurity diffusion layer in the lower layer becomes smaller, so that the contact resistance increases. Furthermore, with fine contacts, the vapor deposition method does not allow enough aluminum to enter the inside of the contact, resulting in wire breakage, and the silicon contained in the aluminum precipitates and blocks the contact pole, increasing contact resistance. The same applies to through holes in multilayer wiring. SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and provide a method for manufacturing a semiconductor device having a connection portion in which the contact resistance does not increase even if the contact holes and through holes are made smaller. . [Means for Solving the Problems] According to the present invention, the connection between the upper and lower conductive layers via the hole (contact hole or through hole) penetrating the interlayer insulating film connects the interlayer insulating film to the lower conductive layer. A process of drilling a hole at a depth that does not reach the lower conductive layer at the connection site with the layer, and after forming the hole, a corrosion-resistant insulating film is formed on the side wall of the hole,
A process of removing the bottom of the hole and completing the etching protection means for the interlayer insulating film by cooperating with the photoresist on the interlayer insulating film or a corrosion-resistant insulating film formed in advance, and isotropic etching to remove the bottom of the hole. A step of etching the interlayer insulating film to a lower conductive layer wider than the hole diameter to penetrate the hole, and a step of removing the etching protection means to expose the interlayer insulating film and embedding a conductive member inside the through hole. ,
This is done by forming an upper conductive layer in contact with the conductive member in the through hole. [Function] Since the hole penetrated into the interlayer insulating film is wider than the diameter of the hole in contact with the lower conductive layer, the contact area between the conductive member embedded in the through hole and the lower conductive layer is reduced. It can be made large enough. Therefore, the diameter of the through hole, that is, the area of the upper part of the through hole in contact with the upper conductive layer can be made correspondingly smaller.

【Example】

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a longitudinal sectional view showing the main steps of a first embodiment of the present invention. After forming the impurity diffusion layer 2 on the semiconductor substrate 1, 1) S G
An interlayer insulating U film 3 such as the above is grown by the CVD method, and a silicon nitride film 4 is grown thereon by the CVD method (FIG. 1(a)). Next, a photoresist 5 is applied and patterning is performed to open a contact hole (FIG. 1(b)). Next, using the photoresist 5 as a mask, the silicon nitride film 4 and the interlayer insulating film 3 are subjected to reactive ion etching (RI).
Etching with E). The etching time is set short so that the underlying impurity diffusion layer 2 is not exposed. Specifically, the etching time is as short as, for example, about 50% of the etching time required to expose the impurity diffusion layer 2, which is calculated from the thickness of the silicon nitride film 4 and the interlayer insulating film 3 and the etching rate of each film. , the etching is completed (FIG. 1(C)). Next, after removing the photoresist 5, a silicon nitride film is grown by the CVD method, and then reactive ion etching (R
By etching back the silicon nitride film using IE),
A side wall 6 of a silicon nitride film is formed on the side wall of the contact hole (FIG. 1(d)). Next, using the silicon nitride film 4 and the nitride film sidewall 6 as masks, the interlayer insulating film 3 is treated with, for example, hydrofluoric acid (
(b) Isotropic etching is performed using a solution, and the etching is stopped when the impurity diffusion layer 2 is exposed (FIG. 1(e)). Next, silicon nitride film 4 and nitride film sidewall 6
After etching with hot phosphoric acid, the high melting point metal 7, such as tungsten (W), is etched with, for example, silane (SiH).
-) Grow only on the impurity diffusion layer 2 and fill the inside of the contact hole by a selective CVD method using a reduction method. In addition, other methods for filling in the waste include growing polycrystalline silicon while selectively doping impurities only on the impurity diffusion layer 2, and growing polycrystalline silicon by CVD and then adding phosphorus (P) or There is a method of diffusing impurities such as boron (B) and further etching back by reactive ion etching (RIE). Next, an aluminum layer is sputter deposited and patterned to form an aluminum layer Iji1g. Next, a second embodiment of the present invention will be described with reference to FIG. FIG. 2 is a longitudinal sectional view showing the main steps. Using the photoresist 5 as a mask, the interlayer insulating film 3 is etched by reactive ion etching (RIE), and the etching is stopped when the impurity diffusion layer 2 is not exposed. 2 figure fa
Next, a silicon nitride film 4 is grown over the entire semiconductor device using a low-temperature process such as plasma CVD.
E) etches back the silicon nitride film 4 to form a silicon nitride film sidewall 6 on the side wall of the contact hole (FIG. 2 fdl). Next, using the photoresist 5 and the nitride film sidewall 6 as a mask, the interlayer insulating film 3 is isotropically etched with a hydrofluoric acid (F) (Fl) solution, stopping when the impurity diffusion layer 2 is exposed (Fig. 2). (e)).Next, in the same manner as in the first embodiment, a high melting point metal 7 such as tungsten (W) and polycrystalline silicon are buried inside the contact hole, and an aluminum interconnection I8 is further formed (FIG. 2(f)). )). [Effects of the Invention] As explained above, the present invention allows only the lower part of the contact hole to be made wider than the mask dimension by isotropic etching, thereby increasing the distance between the wiring of the interlayer insulating layer -F and the underlying impurity diffusion layer. The contact area increases and contact resistance can be lowered, and the opening size at the top of the contact can be made smaller, so the wiring pitch of the contact part can be reduced (which is effective in miniaturizing the element. Furthermore, the inside of the contact hole can be reduced). Filling with a high-melting point metal or polycrystalline silicon has the effect of preventing wire breakage due to a step difference in the contact hole opening, and an increase in contact resistance due to silicon precipitation when the wire is aluminum. Through-holes for wiring also have the same effect as contact holes.

[Brief explanation of the drawing]

FIG. 1 is a longitudinal sectional view showing the main steps of the first embodiment of the present invention, FIG. 2 is a longitudinal sectional view showing the main steps of the second embodiment, and FIG.
The figure is a longitudinal sectional view showing a conventional method. l... Semiconductor substrate, 2... Impurity diffusion layer. 3... Interlayer insulating film, 4... Silicon nitride film, 5
... Photoresist, 6... Silicon nitride film side wall, 7... Tungsten, 8... Aluminum wiring.

Claims (1)

[Scope of Claims] A method for manufacturing a semiconductor device in which a diffusion region of a semiconductor substrate or wiring on an insulating film is connected to an upper conductive layer by a contact hole or a through hole penetrating an interlayer insulating film, comprising: a. At the connection part of the interlayer insulating film with the lower conductive layer,
(b) After drilling, a corrosion-resistant insulating film is formed on the side wall of the hole, and a photoresist on the interlayer insulating film or a corrosion-resistant insulating film formed in advance is formed. c. By isotropic etching, the interlayer insulating film below the hole bottom is etched wider than the hole diameter to the lower conductive layer, and the hole is closed. (d) Next, removing the etching protection means to expose the interlayer insulating film, and embedding a conductive member inside the through hole; (e) Inserting the upper conductive layer in contact with the conductive member in the through hole. A method of manufacturing a semiconductor device, the method comprising: forming a semiconductor device.