JPH03270037A - Monolithic integrated circuit - Google Patents

Abstract

PURPOSE:To obtain an integrated circuit, which can be monitored sufficiently and form which an enough analytical result is acquired regarding the dispersion of manufacture, by forming a plurality of patterns formed by proportionally contracting and proportionally extending the shape of an element included in an internal circuit to a characteristic monitor element. CONSTITUTION:1 represents a check pad for an internal probe and 2-5 Al wirings having different width respectively, and a TEG, in which the width of the A wirings 3-5 are not accurate or are accurate to the width of conventional Al wirings when the width of the Al wiring 2 is equalized to the width of Al wirings mounted to a conventional TEG is acquired. When the Al wirings are disconnected due to the dispersion of manufactured, the Al wiring 5 having smallest width is most prone to discontinuity, the Al wiring 4 is disconnected next and the Al wiring 3 is most difficult to be disconnected by installing several kinds of the Al wirings 2-5 having different width, thus deciding the dispersion of manufacture regarding the Al wirings of the whole diffusion lot when the no-disconnection of the Al wiring 5 is checked during a manufacturing process.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a monolithic integrated circuit (hereinafter referred to as an integrated circuit).
In particular, the present invention relates to an integrated circuit having a pattern of elements or wiring (hereinafter referred to as TEG) on a chip arranged independently apart from internal circuits.

[Conventional technology]

In recent years, there has been remarkable progress in increasing the scale, density, and performance of integrated circuits, including miniaturization of elements,
This is largely due to the reduction in wiring width and pitch.

Variations in manufacturing parameters have recently become a focus of attention as one of the problems that arise with the miniaturization of devices, and in particular, how to reduce the variations from the perspective of production technology is an issue. Also, one of the means of cost reduction
As a result, wafer diameters are rapidly increasing, and 8-inch wafers are about to be mass-produced.

As the diameter of wafers becomes larger, it is becoming more difficult to make the characteristics of chips within the wafer uniform, and together with the miniaturization of elements, it is becoming increasingly difficult to suppress manufacturing variations. In reality, reinforcement of the monitor is sometimes checked during the manufacturing process by checking the characteristics of the standard pattern elements on the wafer.

[Problem to be solved by the invention]

In conventional integrated circuits, monitoring is only strengthened by checking the characteristics of standard pattern elements on the wafer from time to time during the manufacturing process; Since this is a representative characteristic of each wafer, there is a problem that it is not sufficient as a monitoring method in today's increasingly complex processes.

Furthermore, there is a problem in that only checking the standard pattern as a means of analyzing defects at the manufacturing stage and product complaints from users does not provide sufficient analysis results regarding manufacturing variations.

SUMMARY OF THE INVENTION An object of the present invention is to provide an integrated circuit that can be adequately monitored and that can provide sufficient analysis results regarding manufacturing variations.

[Means to solve the problem]

The present invention provides a monolithic integrated circuit in which a characteristic monitor element having the same shape as an element included in an internal circuit is arranged independently from the internal circuit, wherein the characteristic monitor element is included in the internal circuit. It has a plurality of patterns formed by proportionally reducing and proportionally enlarging the shape of the element.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a plan view of a TEG of an integrated circuit according to a first embodiment of the present invention.

In Fig. 1, 1 is a check pad for the internal probe; 2 is a check pad for the internal probe;
. . . 5 indicate A1 wirings having different widths.

As shown in Fig. 1, if the width of the A1 wiring 2 is the width of the AI wiring installed in the conventional TEG, then the width of the AN wiring 3 to 5 installed in this example is the width of the conventional AJ wiring. The TEG is loose or strict relative to the width.

By installing these several types of AJ wirings 2 to 5 with different widths, A! When two wires are disconnected, the smallest width wire A and wire 5 are the most noticeable.
Next is AJ wiring @4, and AJ wiring is the least likely to cause disconnection.
Since it becomes ffi wiring 3, for example, Affl wiring 5
By checking during the manufacturing process that there is no disconnection in the AJ wiring, it is possible to determine manufacturing variations in the AJ wiring of the entire diffusion lot.

FIG. 2 is a plan view of a TEG of an integrated circuit according to a second embodiment of the present invention.

In FIG. 2, l is a check pad for the internal end needle, 7
is AJ2. on the collector region of the bipolar transistor.
6 is Ajl connecting Aη on the collector region of 7 and the check pad of 1, &□~g4 indicates the distance between the collector regions of 7, and indicates the TEG of the existence of distances between the four types of collector regions. ing.

In the second embodiment, as shown in FIG. 2, when the distance J3 is the distance installed in the conventional TEG, the distance 1. ．． 12
, 14 is the conventional distance II! installed in this embodiment! 13
In contrast, the TEG is lenient or strict.

By installing TEGs with different distances between these several types of collector regions, if an abnormality in characteristics between the collector regions occurs due to manufacturing variations, the distance ffl.

The TEG at distance g2 appears most prominently, followed by the TEG at distance g2.
Therefore, since the TEG with a distance of 14 is the least likely to cause an abnormality, for example, if it is checked during the manufacturing process that there are no abnormalities in the TEG with a distance of M 1 l, the difference between the collector regions of the entire diffusion lot can be This means that it is possible to determine manufacturing variations related to the distance.

In analysis at the manufacturing stage, analysis is possible by checking the dependence of the distance Nβ1 to (4) and comparing it with the characteristics collected in advance.The same thing can be done when analyzing products complained by users. This makes analysis possible.

〔Effect of the invention〕

As explained above, the present invention provides the TEG of an integrated circuit with a standard pattern and several types of patterns with manufacturing margins that are loose or strict with respect to the standard pattern. By checking this, it is possible to monitor manufacturing variations, and also to check manufacturing variations at the manufacturing stage, which has the effect of providing integrated circuits of good quality and is also effective in analyzing products complained of by users.

[Brief explanation of drawings]

FIG. 1 is a plan view of the TEG according to the first embodiment of the present invention, and FIG.
The figure is a plan view of a TEG according to a second embodiment of the present invention. 1...Check pad for internal probe, 2-5...A
, ff wiring, 6... A°C connecting A1 on the collector region and the check pad, 7... A1 on the collector region
, (!~(4... Distance between collector areas.

Claims (1)

[Claims] In a monolithic integrated circuit in which a characteristic monitor element having the same shape as an element included in the internal circuit is arranged independently from the internal circuit, the characteristic monitor element proportionally reduces the shape of the element included in the internal circuit. and a monolithic integrated circuit characterized by having a plurality of patterns formed by proportionally expanding.