JPH03266430A - Carrier - Google Patents

Abstract

PURPOSE:To enhance the processing precision during the lapping process of semiconductor wafers by a method wherein holes in circular shape having flat parts corresponding to orientation flats are formed. CONSTITUTION:Orientation flats 5 to point the crystal direction are formed on semiconductor wafers. Next, in order to set the works (semiconductor wafers) having the orientation flats 5 in a carrier 1 to process both surfaces of the wafers, the wafers are respectively inserted into circular holes 4 having flat parts 5 corresponding to the orientation flats 5. Accordingly, the works will not be rotated in the holes 4 of the carrier 1 during the lappinq process. Through these procedures, the processing can be stabilized to enhance the processing precision.

Description

[Detailed Description of the Invention] [Summary] Regarding a carrier used for double-sided lapping or polishing of semiconductor wafers, the purpose of this invention is to improve the processing accuracy of lapping or polishing semiconductor wafers. A carrier for inserting a workpiece into a predetermined number of holes and processing both sides of the workpiece, wherein the hole is configured to have a circular shape having a flat portion corresponding to the orientation flat. .

[Industrial application field]

The present invention relates to a carrier used for double-sided lapping or double-sided polishing of conductor wafers.

Semiconductor wafers are currently DRAM (Dynamic
A semiconductor wafer is a substrate for a semiconductor device such as a random access memory (Random Access Memory), etc., and as the density of semiconductor devices increases, high processing precision of the semiconductor wafer is required. For this reason, it is necessary to improve the accuracy of each machining process of the semiconductor device.

[Conventional technology]

Conventionally, semiconductor wafers are created by processing such as slicing, lapping, etching, and polishing.

Among these processing steps, in the lapping and polishing steps, the semiconductor wafer may be set in a carrier and both surfaces thereof may be lapped and polished. Here, lapping is a processing method in which the surface is made smooth by rolling the powder using a mixed liquid of powder and processing liquid.

FIG. 5 shows a plan view of a conventional carrier. In FIG. 5, in the carrier 30, a gear 32 is formed around a disk 31, and a predetermined number (4) of holes 331 to 334 are formed on the disk 31. This hall 331~
334 is a circle into which a semiconductor wafer to be processed can be inserted. Further, the thickness of the carrier 30 is approximately 300 to 600 μ-, depending on the thickness of the semiconductor wafer to be processed. and,
A semiconductor wafer is inserted into each of the holes 331 to 334 of the carrier 30, and both or one side is lapped or polished. In this case, lapping or polishing is performed by rotating the carrier 30 together with the rotation of the lapping plate or polishing plate.

FIG. 6 shows a graph of an example of the thickness variation of the lapped or polished semiconductor wafer in this case. As is clear from Figure 6, the difference between the maximum and minimum thickness (TTV
Total Th1ckness Variation
) is 2.53 μm.

[Problem to be solved by the invention]

By the way, since the semiconductor wafer is only fitted into the circular hole 33 of the carrier 30 as described above, the semiconductor wafer itself may rotate irregularly within the hole 33 during lapping or polishing. many. For this reason,
The plane of the processed semiconductor wafer has a tapered shape (the above 2μ
l) in many cases.

However, the performance of semiconductor devices, for example, 4M, 1
As the technology advances to 6M and 64M bits, it is necessary to reduce the processing accuracy of semiconductor wafers to 1μ or less in terms of TTV, and with conventional carriers, there is a problem in that it is difficult to achieve a TTV of 1μ or less.

Therefore, the present invention was made in view of the above problems, and an object of the present invention is to provide a carrier that improves the processing precision of lapping or polishing semiconductor wafers.

[Means to solve the problem]

The above problem involves inserting a disk-shaped workpiece with an orientation flat into a predetermined number of holes,
In a carrier that processes both sides of the workpiece,
The problem is solved by forming the hole in a circular shape with a flat part corresponding to the orientation flat.

A ntation flat is a part of the circumference of a semiconductor wafer that is flattened by cutting perpendicular to the radial direction of a predetermined crystal orientation to indicate the crystal orientation.

When a workpiece (semiconductor wafer) having such an orientation flat is set in a carrier and processed on both sides, each hole is inserted into a circular hole having a flat part corresponding to a predetermined number of orientation flats, as described above. It is embedded. This prevents the workpiece from rotating within the hole of the carrier during processing such as lapping or polishing. Therefore, since the workpiece is forcibly moved within the surface plate during machining due to the rotation and revolution of the carrier, stable machining can be performed and machining accuracy can be improved.

[Effect]

In general, semiconductor wafers made of silicon, gallium arsenide, or the like are generally formed with an orientation flat to indicate the orientation of the crystal. This Orie [Embodiment] FIG. 1 shows a configuration diagram of an embodiment of the present invention. In FIG. 1, in the carrier 1, a gear 3 is formed around a disk 2, and four holes 41 to 44 are symmetrically formed in the disk 2. The holes 41 to 44 are circular in shape, and flat portions 51 to 54 corresponding to the aforementioned orientation flats are formed around the disk 2.

A semiconductor wafer (not shown), which is a workpiece having an orientation flat, is inserted into these holes 41 to 44. Therefore, the size of the holes 41 to 44 is such that the semiconductor wafer can be inserted therein. It is something.

Here, for example, if the thickness of the semiconductor wafer is 625 μm, the thickness of the carrier 1 is set to 400 to 500 μm.

Next, FIG. 2 shows a conceptual diagram of a wrapping apparatus to which the carrier 1 is applied. In the lapping device i10 shown in FIG. 2, a sun gear 12 is provided at the center of the lower lapping surface plate 11, and an internal gear such as an internal gear is provided on the outer periphery of the sun gear 12.

This sun gear 12 and internal gear 13 have a plurality of (
In FIG. 2, three carriers 1 mesh with each other.

Semiconductor wafers 141 to 144 having orientation flats having the same shape are fitted into the respective holes 41 to 44 of the carrier 1 and placed on the lower lapping platen 11. Although not shown, an upper lap surface plate is located above the semiconductor wafers 141 to 144.

Such a wrapping device 10 is, for example, a sun gear 12.
As the carrier 1 rotates, the carrier 1 rotates (rotates around itself) along the internal gear 13.

Thereby, both the lower and upper lapping plates are used to lap both sides of the semiconductor wafers 141 to 144.

In this way, the semiconductor wafers 141 to 141 are placed inside the holes 41 to 44.
Since the carrier 144 does not rotate and is forcibly moved within the surface plate by the rotation and revolution of the carrier 1, semiconductor wafers with high processing accuracy can be produced.

In this case, each carrier 1 needs to have small variations in thickness. This is due to variations in the thickness of the carrier 1, which causes the semiconductor wafer 1 to fit into the holes 41 to 44.
This is because the pressure acting on the semiconductor wafers 141 to 144 changes, and this pressure change appears as variations in the thickness of the semiconductor wafers 141 to 144.

Next, FIG. 3 shows an experimental example and results in comparison with the conventional method. FIG. 3(A) shows a carrier 20 in which holes 4+ and 42 according to the present invention and conventional holes 33+ and 332 are formed, a semiconductor wafer is inserted, and both sides are lapped as shown in FIG. The results of thickness measurement in this case are shown in FIG. 3(B). In FIG. 3(B), the thickness variation of the semiconductor wafer in the conventional holes 33+ and 332 is shown by graph A, and the thickness variation in the holes 4+ and 4 of the present invention is shown by graph A.
The thickness variations of the semiconductor wafers within 2 are plotted in graph B. As is clear from the graph, TTV in graph A
is 1.97μ garden, and TTV in graph B is 0.87
μ−.

Therefore, according to the present invention, the hole 4+ in the present invention,
TTV in carrier 1 with 42 (41-44)
A machining accuracy of 1μ or less can be obtained.

Next, FIG. 4 shows a configuration diagram of another embodiment of the present invention. In FIGS. 4A and 4B, the positions of the flat portions 51 to 54 of the holes 41 to 44 are changed. That is, in FIG. 4(A), the flat portions 51 to 54 are formed so as to be positioned toward the center of the disk 2, and in FIG. 4(B), each of the flat portions 51 to 54 is formed in the radial direction of the disk 2. It is formed point-symmetrically. That is, Fig. 1 and Fig. 4 (A) (
The positional relationship of the flat parts 51 to 54 in B) is the circle W.
When rotated in the circumferential direction of 2, they are formed so as to be located in the same direction. This holds true even if the number of holes formed on the disk 2 increases or decreases.

In the above embodiment, a case was shown in which the carrier of the present invention was applied to a lapping machine, but the polishing machine also has basically the same configuration although the materials are different.

〔Effect of the invention〕

As described above, according to the present invention, by providing a flat portion in the hole of the carrier, the workpiece can be forcibly moved by the rotation and revolution of the carrier, and a workpiece with high processing accuracy can be manufactured. I can do it.

[Brief explanation of drawings]

Fig. 1 is a configuration diagram of an embodiment of the present invention, Fig. 2 is a conceptual diagram of a wrapping device to which the carrier of the present invention is applied, and Fig. 3 explains an experimental example comparing the present invention and the conventional method and its results. 4 is a block diagram of another embodiment of the present invention, FIG. 5 is a block diagram of a conventional carrier, and FIG. 6 is a graph of thickness variations of semiconductor wafers due to a conventional carrier. In the figure, 1 is a carrier, 2 is a disk, 3 is a gear, 41 to 44 are holes, and 51 to 54 are flat parts. (B) Figures 3 and 6 for explaining experimental examples comparing the present invention and the conventional method and their results.

Claims (1)

[Claims] In a carrier in which a disc-shaped workpiece having an orientation flat is fitted into a predetermined number of holes (4_1 to 4_4) and both sides of the workpiece are processed, the holes (4_1 to 4_4) are Flat part corresponding to orientation flat (5_1~
5_4) A carrier characterized in that it is formed into a circular shape.