JPH03262149A - Lsi package - Google Patents
Lsi packageInfo
- Publication number
- JPH03262149A JPH03262149A JP6138390A JP6138390A JPH03262149A JP H03262149 A JPH03262149 A JP H03262149A JP 6138390 A JP6138390 A JP 6138390A JP 6138390 A JP6138390 A JP 6138390A JP H03262149 A JPH03262149 A JP H03262149A
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- package
- lsi
- groove
- connecting terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims abstract description 20
- 238000005476 soldering Methods 0.000 abstract description 2
- 239000004020 conductor Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 238000004806 packaging method and process Methods 0.000 abstract 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、LSI素子のパッケージに関し、特に素子自
体にコンデンサを実装する構造に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a package for an LSI element, and particularly to a structure in which a capacitor is mounted on the element itself.
従来、IC,LSI等の半導体を組み合せて回路を構成
する場合、電源の安定化の為にバイパスコンデンサを同
時に近接して実装していたが、実装する場所が制限され
る。又は無い等の理由により、LSI素子の離れた場所
になるという状態で、LSIの機能が充分に発揮出来な
い場合が有った。Conventionally, when a circuit is constructed by combining semiconductors such as ICs and LSIs, bypass capacitors have been mounted in close proximity at the same time to stabilize the power supply, but the mounting locations are limited. For some reason, such as the absence of an LSI element, there have been cases where the LSI element is located far away, and the LSI function cannot be fully demonstrated.
上述した従来のLSIパッケージでのコンデンサの実装
方式は、LSI素子とバイパスコンデンサが分離されて
いる為、近接する距離に限界が有るという欠点が有った
、
〔課題を解決するための手段〕
本発明のコンデンサ実装のLSIパッケージは、コンデ
ンサを実装する講と、前記コンデンサの端子と電気的な
接続をする為の接続端子を前記溝の内部に有している。The above-mentioned conventional method of mounting capacitors in LSI packages had the disadvantage that there was a limit to how close they could be because the LSI element and bypass capacitor were separated. The capacitor-mounted LSI package of the invention has a hole for mounting the capacitor and a connection terminal for electrically connecting with the terminal of the capacitor inside the groove.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例の正面図である。FIG. 1 is a front view of one embodiment of the present invention.
パッケージ1はLSI素子自体である。コンデンサ2は
パッケージ1に実装された形態を示す。The package 1 is the LSI element itself. Capacitor 2 is shown mounted in package 1.
第2図は本実施例の側面図、第3図は本実施例の上面図
である。第4図は本発明の一部分の分解斜視図である。FIG. 2 is a side view of this embodiment, and FIG. 3 is a top view of this embodiment. FIG. 4 is an exploded perspective view of a portion of the present invention.
パッケージ1に準備された講7の内部に設けられた接続
端子5及び接続端子6がそれぞれ半田付は等により接続
されて、コンデンサ2がバイパスコンデンサとして機能
する。この時、接続端子3及び接続端子4は、それぞれ
電源及び接地線に配線されている。Connection terminals 5 and 6 provided inside the capacitor 7 prepared in the package 1 are connected by soldering, etc., and the capacitor 2 functions as a bypass capacitor. At this time, the connection terminal 3 and the connection terminal 4 are wired to a power supply line and a ground line, respectively.
以上説明したように本発明は、バイパスコンデンサを素
子のパッケージ自体に実装することにより、電源変動等
の外乱を最小限に制限することが可能となり、LSIの
動作を充分に発揮出来るという効果かある。As explained above, the present invention has the effect that by mounting a bypass capacitor in the element package itself, it is possible to limit disturbances such as power supply fluctuations to a minimum, and the operation of the LSI can be fully demonstrated. .
1・・パッケージ、2・・・コンデンサ、3・・接続端
子、4・・接続端子、5・・・接続端子、6・・・接続
端子、7・・・溝。1...Package, 2...Capacitor, 3...Connection terminal, 4...Connection terminal, 5...Connection terminal, 6...Connection terminal, 7...Groove.
Claims (1)
記コンデンサの端子と電気的な接続をする為の接続端子
を前記溝の内側に有していることを特徴とするLSIパ
ッケージ。An LSI package characterized by having a groove for mounting a chip-shaped capacitor, and having connection terminals for electrically connecting with terminals of the capacitor inside the groove.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6138390A JPH03262149A (en) | 1990-03-12 | 1990-03-12 | Lsi package |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6138390A JPH03262149A (en) | 1990-03-12 | 1990-03-12 | Lsi package |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03262149A true JPH03262149A (en) | 1991-11-21 |
Family
ID=13169598
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6138390A Pending JPH03262149A (en) | 1990-03-12 | 1990-03-12 | Lsi package |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03262149A (en) |
-
1990
- 1990-03-12 JP JP6138390A patent/JPH03262149A/en active Pending
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