JPH0325960A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH0325960A
JPH0325960A JP16154089A JP16154089A JPH0325960A JP H0325960 A JPH0325960 A JP H0325960A JP 16154089 A JP16154089 A JP 16154089A JP 16154089 A JP16154089 A JP 16154089A JP H0325960 A JPH0325960 A JP H0325960A
Authority
JP
Japan
Prior art keywords
package
thin film
plastic
conductive thin
leads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16154089A
Other languages
Japanese (ja)
Inventor
Junichi Yoshinaga
純一 吉永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP16154089A priority Critical patent/JPH0325960A/en
Publication of JPH0325960A publication Critical patent/JPH0325960A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent damages such as gate breakdown and junction breakdown of semiconductor elements caused by the charged static electricity produced by friction between a package and a hot blast against the package at the time of high-temperature inspection by providing a conductive thin film to a part of the surface of the package which is not in contact with leads of the package. CONSTITUTION:A conductive thin film 2 is formed over the surface of a plastic package. The plastic part is 1 and 3 are leads. By connecting a conductive push-rod 4 of an auto-handler with a GND, the charge 6 applied to a plastic package 8 can be discharged from the conductive thin film 2 to the push-rod 4 and then the GND.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体装置に関し、特にプラスティックパッ
ケージの表面構造の改良に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to semiconductor devices, and particularly to improvement of the surface structure of plastic packages.

〔従来の技術〕[Conventional technology]

従来、この種のプラスティックパッケージは、第4図の
斜視図に示される様にその内部から表面に致るまで同一
の材質、すなわちプラスティックで構成されていた。
Conventionally, this type of plastic package has been made of the same material from the inside to the surface, that is, plastic, as shown in the perspective view of FIG.

(発明が解決しようとする課題〕 上述した従来のプラスティックパッケージは帯電し易い
材質であり、その内部から表面に致るまで同一材料で楕
戒されていた。従って、例えば高温電気検査時に吹きが
ける熱風とパッケージとの摩擦によって生じた静電気が
帯電し半導体素子に対しゲート破壊,ジャンクション破
壊等のダメージを与えるという欠点がある。
(Problems to be Solved by the Invention) The conventional plastic package described above is made of a material that is easily charged, and is made of the same material from the inside to the surface.Therefore, for example, when spraying during high temperature electrical inspection, The drawback is that static electricity generated by friction between the hot air and the package is charged and causes damage to semiconductor devices, such as gate destruction and junction destruction.

〔課題を解決するための手段〕[Means to solve the problem]

本発明によるプラスティックパッケージは、パッケージ
のリードに接触していない表面の一部に導電性の薄膜を
有しており、薄膜をグランドに落すことで、薄膜を通し
て静電気が逃げることにより内部半導体素子を保護する
ことができる。
The plastic package according to the present invention has a conductive thin film on a part of the surface not in contact with the package leads, and by dropping the thin film to ground, static electricity escapes through the thin film, protecting the internal semiconductor elements. can do.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する, 第1図は本発明の第1の実施例を示すDIP型のプラス
ティックパッケージの斜視図である。本実施例では、プ
ラスティックバッゲージの表面に導電性の薄膜2が形成
されている。図において、1はプラスティック部、−3
はリード部である。
Next, the present invention will be described with reference to the drawings. FIG. 1 is a perspective view of a DIP type plastic package showing a first embodiment of the present invention. In this embodiment, a conductive thin film 2 is formed on the surface of a plastic baggage. In the figure, 1 is the plastic part, -3
is the lead part.

第2図は半導体装置の電気的検査時の縦断面図である。FIG. 2 is a longitudinal sectional view of the semiconductor device during electrical inspection.

第2図に示されるように例えばオートハンドラの導電性
プッシュロッド4をGNDと接続しておけば、プラステ
ィックパッケージ8に帯電したチャージ6を導電薄膜2
→プッシュロツド4→GNDと逃がすことができる。
For example, if the conductive push rod 4 of the autohandler is connected to GND as shown in FIG.
→ Push rod 4 → GND.

第3図は本発明の第2の実施例の縦断面図である。本実
施例では上方にリード戒形されたフラットパッケージ8
の電気的検査時の様子を示す。
FIG. 3 is a longitudinal sectional view of a second embodiment of the invention. In this embodiment, the flat package 8 is lead-shaped upward.
This shows the state during electrical inspection.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明では、プラスティックパッケ
ージのリードに接触していない表面の一部に導電性の薄
膜を設けることにより、この薄膜を通して帯電したチャ
ージを逃がすことにより内部素子の静電破壊等を防止で
きる効果がある。
As explained above, in the present invention, by providing a conductive thin film on a part of the surface of the plastic package that is not in contact with the leads, the electrical charges can be released through this thin film, thereby preventing electrostatic damage to internal elements. It has a preventive effect.

1の実施例の電気的検査時の様子を示す縦断面図、第3
図は本発明の第2の実施例の縦断面図、第4図は従来の
DIP型プラスティックパッケージの斜視図である. 1・・・プラスティック部、2・・・導電性薄膜部、3
・・・リード部、4・・・オートハンドラのプッシュロ
ッド、5・・・ソケット、6・・・帯電したチャージ、
7・・・フラットパッケージのリード部、8・・・パッ
ケージ。
3 is a vertical sectional view showing the state of the electrical inspection of the first embodiment; FIG.
The figure is a longitudinal sectional view of the second embodiment of the present invention, and FIG. 4 is a perspective view of a conventional DIP type plastic package. 1... Plastic part, 2... Conductive thin film part, 3
...Lead part, 4...Auto handler push rod, 5...Socket, 6...Electrically charged charge,
7...Lead part of flat package, 8...Package.

Claims (1)

【特許請求の範囲】[Claims] 半導体装置のパッケージにおいて、該パッケージのリー
ドに接触していない表面の一部に導電性の薄膜を有する
ことを特徴とする半導体装置。
A semiconductor device package comprising a conductive thin film on a part of the surface of the package that is not in contact with the leads.
JP16154089A 1989-06-23 1989-06-23 Semiconductor device Pending JPH0325960A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16154089A JPH0325960A (en) 1989-06-23 1989-06-23 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16154089A JPH0325960A (en) 1989-06-23 1989-06-23 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH0325960A true JPH0325960A (en) 1991-02-04

Family

ID=15737044

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16154089A Pending JPH0325960A (en) 1989-06-23 1989-06-23 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0325960A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100761861B1 (en) * 2006-10-11 2007-09-28 삼성전자주식회사 Semiconductor package preventing the static electricity

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60247951A (en) * 1984-05-23 1985-12-07 Seiko Epson Corp Plastic-package semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60247951A (en) * 1984-05-23 1985-12-07 Seiko Epson Corp Plastic-package semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100761861B1 (en) * 2006-10-11 2007-09-28 삼성전자주식회사 Semiconductor package preventing the static electricity

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