JPH0325957U - - Google Patents
Info
- Publication number
- JPH0325957U JPH0325957U JP8401189U JP8401189U JPH0325957U JP H0325957 U JPH0325957 U JP H0325957U JP 8401189 U JP8401189 U JP 8401189U JP 8401189 U JP8401189 U JP 8401189U JP H0325957 U JPH0325957 U JP H0325957U
- Authority
- JP
- Japan
- Prior art keywords
- setting circuit
- microcomputer
- input port
- resistors
- voltage setting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 5
- 239000011159 matrix material Substances 0.000 description 1
Landscapes
- Microcomputers (AREA)
Description
第1図乃至第4図はこの考案に係る仕様設定回
路の実施例を示し、第1図は回路図、第2図は3
個の抵抗の状態を示した電圧設定表、第3図は4
ビツトの仕様データを示した説明図、第4図は第
3図の動作を表わしたフローチヤートである。第
5図乃至第7図は従来例を示し、第5図は回路図
、第6図は第5図の論理値表、第7図はキーマト
リツクスを用いた設定回路図である。
主な符号の説明、1……マイクロコンピユータ
、2……マイクロコンピユータのアナログ入力ポ
ート、P0〜P3……入力ポート、R1〜R4…
…抵抗器。
1 to 4 show an embodiment of the specification setting circuit according to this invention, FIG. 1 is a circuit diagram, and FIG.
Voltage setting table showing the status of each resistor, Figure 3 is 4
FIG. 4 is an explanatory diagram showing bit specification data, and FIG. 4 is a flowchart showing the operation of FIG. 3. 5 to 7 show conventional examples, where FIG. 5 is a circuit diagram, FIG. 6 is a logic value table of FIG. 5, and FIG. 7 is a setting circuit diagram using a key matrix. Explanation of main symbols, 1...Microcomputer, 2...Analog input port of microcomputer, P0-P3...Input port, R1-R4...
…Resistor.
補正 平1.11.13
図面の簡単な説明を次のように補正する。
明細書、第9頁5行目の「状態を示した電圧設
定表、」と記載があるのを「状態の電圧設定を示
した図表、」と補正する。
明細書、第9頁9行目の「論理値表、」と記載
があるのを「論理値を示した図表、」と補正する
。Amendment 1.11.13. The brief description of the drawing is amended as follows. In the specification, page 9, line 5, the statement ``voltage setting table showing the status,'' has been corrected to ``chart showing the voltage setting of the status.'' In the specification, page 9, line 9, the statement "logical value table" is corrected to "diagram showing logical values."
Claims (1)
クロコンピユータの入力ポートに複数の設定電圧
を供給して、複数の仕様データを生成することの
できる仕様設定回路において、 上記マイクロコンピユータの一つの入力ポート
に対して少なくとも3個の抵抗器から成る電圧設
定回路を設けて、複数の仕様データを構成するよ
うにしたことを特徴とする仕様設定回路。[Claims for Utility Model Registration] In a specification setting circuit that can generate a plurality of specification data by supplying a plurality of setting voltages to an input port of a microcomputer from a voltage setting circuit consisting of a plurality of resistors, the above-mentioned A specification setting circuit characterized in that a voltage setting circuit consisting of at least three resistors is provided for one input port of a microcomputer to configure a plurality of specification data.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8401189U JPH0325957U (en) | 1989-07-19 | 1989-07-19 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8401189U JPH0325957U (en) | 1989-07-19 | 1989-07-19 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0325957U true JPH0325957U (en) | 1991-03-18 |
Family
ID=31632149
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8401189U Pending JPH0325957U (en) | 1989-07-19 | 1989-07-19 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0325957U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58115547A (en) * | 1981-12-29 | 1983-07-09 | Fujitsu Ltd | Operation mode setting system for microprocessor |
JPH02190984A (en) * | 1989-01-19 | 1990-07-26 | Nippondenso Co Ltd | Microcomputer device |
-
1989
- 1989-07-19 JP JP8401189U patent/JPH0325957U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58115547A (en) * | 1981-12-29 | 1983-07-09 | Fujitsu Ltd | Operation mode setting system for microprocessor |
JPH02190984A (en) * | 1989-01-19 | 1990-07-26 | Nippondenso Co Ltd | Microcomputer device |
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