JPH03258133A - Synchronizing clock extraction circuit - Google Patents

Abstract

PURPOSE:To prevent out of synchronism by monitoring each transmission line, using a monitor signal so as to select an extracted clock from a predetermined transmission line when the transmission line is normal and from other normal transmission line when a fault takes place as a synchronization clock of a communication equipment main body. CONSTITUTION:Transmission line monitor circuits 52, 54, 56 provided to transmission lines a, b, c monitor the transmission lines a, b, c and output a normal signal N when each transmission line is normal and output a fault signal A when a fault takes place. The monitor signals a, b, c are fed to a clock changeover circuit 40, when only the signal (a) is the signal N, the clock (a) is controlled and selected based on the signals a, b, c, when only the signal (b) is the signal N, the clock (b) is controlled and selected based on the signals a, b, c, and when only the signal (c) is the signal N, the clock (c) is controlled and selected based on the signals a, b, c, and the result is fed to the communication equipment main body. When the signals a, b, c are all the signals A, a self-running clock (a) is selected. Thus, the synchronization clock from a normal transmission line is selected automatically to prevent disturbance of synchronization.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a synchronous clock extraction circuit suitable for application to a 8-way device that accommodates a plurality of transmission lines, such as an I5DN indoor system.

``Prior Art'' As shown in FIG.
Data is received through each transmission path a''-n, and data is transmitted from this.Generally, this communication device 10 operates in synchronization with data received from transmission paths a''-n, and also mutually transmits data on the transmission path. is synchronized between each transmission path.

In order for the communication device 10 to operate in synchronization with the data on the transmission path, it is necessary to extract a synchronization clock from the received signal data on the transmission path. For this reason, the communication device IO is provided with a synchronous clock extraction circuit 100 including an interface circuit for receiving ε data. An example of this is shown in FIG.

This figure shows an example in which three transmission paths a + b + c are connected to the communication device 10. Each transmission path a
, br c has an interface circuit 22゜24.26
is provided, and the data output from this is sent to the main body of the communication device.

In addition, synchronized clocks are extracted from the data transmitted on the respective transmission lines a, b, and c from these interface circuits 22, 24, and 26, and the extracted synchronized clocks are guided to a changeover switch 30 and transferred to one of them. The synchronous clocks a+b+c are selected, and the selected synchronous clocks are supplied to the main body of the communication device.

Thereby, the communication device operates in synchronization with the selected synchronization clock.

That is, when the communication device IO is using the transmission path a, the changeover switch 30 is controlled so that the synchronized clock a extracted from the interface circuit 22 provided in connection therewith is selected. .

"Problem to be solved by the invention" As described above, in the conventional synchronous clock extraction circuit,
Since the synchronous clock extracted from the data propagating on the transmission path used is supplied to the communication device itself, if a failure occurs on the transmission path and data is not input to the interface circuit, the Since the output clock of the interface circuit runs free, it cannot be synchronized with the synchronization clocks of other interface circuits.

For example, if the synchronous clock a of the interface circuit 22 is used as the synchronous clock in the communication device 10, and the transmission line a is disconnected, the synchronous clocks b and c obtained from the transmission lines S and c It becomes impossible to synchronize between the two.

In order to eliminate such drawbacks, for example, after confirming that the synchronous clock is not synchronized with the data on the transmission line,
It is conceivable to manually switch the changeover switch 30, but this requires constant confirmation that the synchronization clock is not synchronized with the data on the transmission line, which is a cumbersome operation.

Therefore, this invention solves these problems, and provides synchronization in a communication device that automatically selects the necessary synchronization clock and prevents synchronization deviation between each transmission path. This paper proposes a clock extraction circuit.

"Means for Solving the Problems" In order to solve the above-mentioned problems, the present invention accommodates a plurality of transmission paths, extracts a clock based on data received from each transmission path, and uses the extracted clocks. In a synchronous clock extraction circuit of a communication device that operates synchronously, a transmission path monitoring means monitors the state of each transmission path, and a synchronous clock of the communication device itself is selected based on the monitoring signals from these plurality of transmission path monitoring means. The clock switching means selects the clock extracted from the interface circuit of the predetermined transmission line as the synchronization clock when the transmission line is normal, and selects the clock extracted from the interface circuit of the predetermined transmission line as the synchronization clock when a failure occurs on the transmission line. The present invention is characterized in that when there is a normal transmission line, the extracted clock of the interface circuit of the normal transmission line is selected as the synchronization clock.

"Function" The transmission line monitoring circuits 52, 54, and 56 provided in the respective transmission lines a, b, and c are connected to the respective transmission lines a, b, and c.

Monitor the status of C. If each transmission path is in a normal state, a normal signal N is output, and if an abnormality occurs in the transmission path, an abnormal signal A is output.

These monitoring signals a, b, and c are supplied to a clock switching circuit 40, and an appropriate synchronization clock is extracted based on a truth table as shown in FIG.

For example, when only the monitoring signal a outputs the normal signal N, the clock switching circuit 4 selects the clock a.
0 is controlled based on these monitoring signals a, b, and c.

Furthermore, when a normal signal N is obtained only from monitor signal 13, clock b is selected, and when a normal signal N is obtained only from monitor signal C, clock C is selected regardless of which transmission path is used. It is selected and sent to the main body of the communication device.

In addition, in any of the monitoring (g items a, b, c), when abnormality No. 45 A is output, it is the same no matter which transmission path is used to obtain the synchronized clock, so in this example, the clock The logic configuration is such that a (free running clock) is selected.

As a result, if a failure occurs in a transmission path, the synchronization clock obtained from the normal transmission path is immediately selected, so there is no fear that the synchronization with the synchronization clocks of other transmission paths will be disrupted.

Embodiment Next, an example of a synchronous clock extraction circuit in a communication device according to the present invention will be described in detail with reference to FIGS. 1 and 2.

In the synchronous clock extraction circuit 100 shown in FIG. 1, interface circuits 22, 24, and 26 are connected to the transmission lines a, , b, and c (the number is just an example) as in the past, and the data output from these is sent to the main body of the communication device (not shown).

Further, clocks are extracted from these interface circuits 22, 24 and 26 based on the data transmitted on the respective transmission lines a, b, and c, and these extracted synchronized clocks a, b, and C are transferred to the clock switching port '#! 40. One synchronous clock output from the clock switching circuit 40 is supplied to the main body of the communication device as the synchronous clock.

In this invention, each transmission line a, b is further provided.

In order to monitor the state of C, transmission path monitoring circuits 52, 54.
56 are provided respectively. Monitoring numbers 43 a and b output from these transmission path monitoring circuits 52, 54, and 56
, c are supplied to the clock switching circuit 4o.

The monitoring signals a, b, and c each output a normal signal N when the transmission lines a to n are in a normal state, and output an abnormal signal A when an abnormality occurs in the transmission line. Monitoring signal a
Output synchronous clocks a, b selected as + b + C
, c is shown in FIG.

In other words, the logical configuration is such that when only the monitoring signal a is output as the normal signal N, a is selected as the synchronization clock, and in the same way, when only the monitoring signal a and the normal signal N are obtained, The configuration is such that the synchronous clock b is selected, and when the normal signal N is obtained only from the monitoring signal C, the synchronous clock C is selected.

Therefore, no matter which transmission path you are currently using,
The synchronous clock to be used is selected depending on the states of the monitoring signals a + b and c.

Monitoring (epsilon) When abnormal signal A is output for both a and b a is selected.

Monitoring (If No. 8 a, b, and c all output an abnormal signal A, the synchronous clock a output from the interface circuit 22 is used, but this synchronous clock a is free-running in the interface circuit 22. This is the clock.

Note that in FIG. 2, X indicates a state in which it does not matter whether the monitoring signals a, b, and c indicate a normal state or an abnormal state.

In addition, in the above description, three transmission lines are used as an example, but this is only an example.

"Effects of the Invention" As explained above, in the present invention, a transmission line monitoring circuit is provided for each transmission line, and a synchronization clock is selected based on the monitoring signal obtained from these circuits. be.

According to this configuration, if there is a failure in the transmission path, the synchronized clock from the normal transmission path will be automatically selected, so the communication device will synchronize with the data on the normal transmission path. It can be made to work.

[Brief explanation of drawings]

FIG. 1 is a system diagram showing an example of a synchronous clock extraction circuit in a communication device according to the present invention, FIG. 2 is a diagram showing truth value contents of an output synchronous clock, and FIG. 3 is an explanatory diagram of the communication device.
FIG. 4 is a system diagram showing an example of a conventional synchronous clock extraction circuit. a + b + ... n ・ 10 ・ 22, 24. 26 ・ 40 ・ 52, 54. 56 ・ 100 ◆ ・Transmission line, communication device, interface circuit, clock switching circuit, transmission line monitoring circuit, synchronous clock extraction circuit

Claims (1)

[Claims] (1) In a synchronous clock extraction circuit of a communication device that accommodates multiple transmission paths, extracts a clock based on data received from each transmission path, and operates in synchronization with the extracted clock, It has a transmission line monitoring means for monitoring the state, and a clock switching means for selecting a synchronization clock of the communication device main body based on the monitoring signals from the plurality of transmission line monitoring means, and when the transmission line is normal, The clock extracted from the interface circuit of the specified transmission path is selected as the synchronization clock, and if a failure occurs in the transmission path and there is another normal transmission path, the clock extracted from the interface circuit of the normal transmission path is selected. A synchronous clock extraction circuit characterized in that a synchronous clock is selected as a synchronous clock.